Methods for depositing premetal dielectric layer at sub-atmospheric and
high temperature conditions
    1.
    发明授权
    Methods for depositing premetal dielectric layer at sub-atmospheric and high temperature conditions 失效
    在低于大气压和高温条件下沉积金属前介质层的方法

    公开(公告)号:US5963840A

    公开(公告)日:1999-10-05

    申请号:US748960

    申请日:1996-11-13

    摘要: The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.

    摘要翻译: 本发明提供用于半导体晶片的高温(至少约500-800℃)处理的系统,方法和装置。 本发明的系统,方法和装置允许多个工艺步骤在相同的腔室中原位进行,以减少总处理时间,并确保对高宽比装置的高质量处理。 在同一个室内执行多个工艺步骤也可以增加工艺参数的控制并减少设备损坏。 特别地,本发明可以提供用于形成具有厚度均匀性,良好间隙填充能力,高密度,低湿度和其它所需特性的介电膜的高温沉积,加热和有效清洁。

    Methods and apparatus for shallow trench isolation
    4.
    发明授权
    Methods and apparatus for shallow trench isolation 有权
    浅沟槽隔离的方法和装置

    公开(公告)号:US06352591B1

    公开(公告)日:2002-03-05

    申请号:US09613934

    申请日:2000-07-11

    IPC分类号: C23C1652

    摘要: The present invention provides systems, methods and apparatus for high temperature (at least about 500-800° C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.

    摘要翻译: 本发明提供用于半导体晶片的高温(至少约500-800℃)处理的系统,方法和装置。 本发明的系统,方法和装置允许多个工艺步骤在相同的腔室中原位进行,以减少总处理时间,并确保对高宽比装置的高质量处理。 在同一个室内执行多个工艺步骤也可以增加工艺参数的控制并减少设备损坏。 特别地,本发明可以提供用于形成具有厚度均匀性,良好间隙填充能力,高密度,低湿度和其它所需特性的介电膜的高温沉积,加热和有效清洁。

    Methods and apparatus for gettering fluorine from chamber material surfaces
    5.
    发明授权
    Methods and apparatus for gettering fluorine from chamber material surfaces 有权
    从室材料表面吸除氟的方法和设备

    公开(公告)号:US06347636B1

    公开(公告)日:2002-02-19

    申请号:US09340602

    申请日:1999-06-25

    IPC分类号: B08B600

    摘要: The present invention provides systems, methods and apparatus for high temperature (at least about 500-800° C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.

    摘要翻译: 本发明提供用于半导体晶片的高温(至少约500-800℃)处理的系统,方法和装置。 本发明的系统,方法和装置允许多个工艺步骤在相同的腔室中原位进行,以减少总处理时间,并确保对高宽比装置的高质量处理。 在同一个室内执行多个工艺步骤也可以增加工艺参数的控制并减少设备损坏。 特别地,本发明可以提供用于形成具有厚度均匀性,良好间隙填充能力,高密度,低湿度和其它所需特性的介电膜的高温沉积,加热和有效清洁。

    Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers
    6.
    发明授权
    Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers 失效
    双频等离子体增强化学气相沉积碳化硅层

    公开(公告)号:US06465366B1

    公开(公告)日:2002-10-15

    申请号:US09660268

    申请日:2000-09-12

    IPC分类号: H01L2131

    摘要: A method for forming a silicon carbide layer for use in integrated circuit fabrication is disclosed. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and an inert gas in the presence of an electric field. The electric field is generated using mixed frequency radio frequency (RF) power. The silicon carbide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the silicon carbide layer is used as a hardmask for fabricating integrated circuit structures such as, for example, a damascene structure. In another integrated circuit fabrication process, the silicon carbide layer is used as an anti-reflective coating (ARC) for DUV lithography.

    摘要翻译: 公开了一种用于形成用于集成电路制造的碳化硅层的方法。 通过在电场的存在下使包含硅源,碳源和惰性气体的气体混合物反应来形成碳化硅层。 使用混频射频(RF)功率产生电场。 碳化硅层与集成电路制造工艺兼容。 在一个集成电路制造工艺中,碳化硅层用作用于制造集成电路结构的硬掩模,例如镶嵌结构。 在另一个集成电路制造工艺中,碳化硅层用作用于DUV光刻的抗反射涂层(ARC)。

    Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers
    9.
    发明授权
    Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers 有权
    双频等离子体增强化学气相沉积碳化硅层

    公开(公告)号:US06589888B2

    公开(公告)日:2003-07-08

    申请号:US10238195

    申请日:2002-09-09

    IPC分类号: H01L2131

    摘要: A method for forming a silicon carbide layer for use in integrated circuit fabrication is disclosed. The silicon carbide layer is formed by reacting a gas mixture of a silicon source, a carbon source, and an inert gas in the presence of an electric field. The electric field is generated using mixed frequency radio frequency (RE) power. The silicon carbide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the silicon carbide layer is used as a hardmask for fabricating integrated circuit structures such as, for example, a damascene structure. In another integrated circuit fabrication process, the silicon carbide layer is used as an anti-reflective coating (ARC) for DUV lithography.

    摘要翻译: 公开了一种用于形成用于集成电路制造的碳化硅层的方法。 碳化硅层通过在电场存在下使硅源,碳源和惰性气体的气体混合物反应而形成。 使用混合频率射频(RE)功率产生电场。 碳化硅层与集成电路制造工艺兼容。 在一个集成电路制造工艺中,碳化硅层用作用于制造集成电路结构的硬掩模,例如镶嵌结构。 在另一个集成电路制造工艺中,碳化硅层用作用于DUV光刻的抗反射涂层(ARC)。