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公开(公告)号：US20240234368A1
公开(公告)日：2024-07-11
申请号：US18615067
申请日：2024-03-25
发明人： Po-Hao TSAI , Ming-Da CHENG , Mirng-Ji LII
IPC分类号： H01L25/065 , H01L21/52 , H01L21/56 , H01L23/31 , H01L23/42 , H01L23/538 , H01L25/00
CPC分类号： H01L25/0652 , H01L21/52 , H01L21/56 , H01L23/3128 , H01L23/42 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L23/5389 , H01L25/50
摘要： A package structure is provided. The package structure includes a substrate including a cavity and a plurality of thermal vias connecting a bottom surface of the cavity to a bottom surface of the substrate. The package structure also includes an electronic device disposed in the cavity and thermally coupled to the plurality of thermal vias. The package structure further includes a plurality of conductive connectors formed over the electronic device and vertically overlapping the plurality of thermal vias. The package structure also includes an encapsulating material extending from top surfaces of the plurality of conductive connectors to the bottom surface of the cavity. The package structure further includes an insulating layer formed over the encapsulating material and including a redistribution layer structure electrically connected to the electronic device through the plurality of conductive connectors.
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公开(公告)号：US20230207476A1
公开(公告)日：2023-06-29
申请号：US18177921
申请日：2023-03-03
发明人： Po-Hao TSAI , Techi WONG , Yi-Wen WU , Po-Yao CHUANG , Shin-Puu JENG
IPC分类号： H01L23/538 , H01L23/31 , H01L23/00 , H01L21/56
CPC分类号： H01L23/5389 , H01L23/5386 , H01L23/3128 , H01L24/32 , H01L24/16 , H01L21/568 , H01L24/92 , H01L24/73 , H01L2224/92225 , H01L2224/32225 , H01L2224/16225 , H01L2224/73253
摘要： A package structure is provided. The package structure includes a redistribution structure and a semiconductor chip over the redistribution structure. The package structure also includes an adhesive element over the semiconductor chip. Opposite outermost edges of the adhesive element are laterally between opposite outermost edges of the redistribution structure. The package structure further includes a protective layer laterally surrounding the semiconductor chip and the adhesive element. In addition, the package structure includes a thermal conductive element over the semiconductor chip. The thermal conductive element is surrounded by the adhesive element.
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公开(公告)号：US20210384125A1
公开(公告)日：2021-12-09
申请号：US17405389
申请日：2021-08-18
发明人： Po-Hao TSAI , Techi WONG , Meng-Liang LIN , Yi-Wen WU , Po-Yao CHUANG , Shin-Puu JENG
IPC分类号： H01L23/528 , H01L23/00 , H01L23/31 , H01L25/00 , H01L25/065 , H01L23/495 , H01L23/498 , H01L23/538 , H01L25/07
摘要： A method for forming a package structure is provided. The method includes forming a first interconnect structure over a carrier substrate and disposing a first die structure over the first interconnect structure. The method includes forming a dam structure over the first die structure. The method also includes forming a protection layer over a second interconnect structure. The method further includes bonding the second interconnect structure over the dam structure. In addition, the method includes forming a package layer between the first interconnect structure and the second interconnect structure. The method also includes removing the protection layer.
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公开(公告)号：US20210242122A1
公开(公告)日：2021-08-05
申请号：US17233852
申请日：2021-04-19
发明人： Shin-Puu JENG , Po-Hao TSAI , Po-Yao CHUANG , Feng-Cheng HSU , Shuo-Mao CHEN , Techi WONG
IPC分类号： H01L23/498 , H01L25/10 , H01L21/52 , H01L23/053 , H01L21/56 , H01L23/00 , H01L21/683 , H01L21/48 , H01L25/00
摘要： A chip package is provided. The chip package includes a substrate structure. The substrate structure includes a redistribution structure, a third insulating layer, and a fourth insulating layer. The first wiring layer has a conductive pad. The conductive pad is exposed from the first insulating layer, and the second wiring layer protrudes from the second insulating layer. The third insulating layer is under the first insulating layer of the redistribution structure and has a through hole corresponding to the conductive pad of the first wiring layer. The conductive pad overlaps the third insulating layer. The fourth insulating layer disposed between the redistribution structure and the third insulating layer. The chip package includes a chip over the redistribution structure and electrically connected to the first wiring layer and the second wiring layer.
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公开(公告)号：US20240347439A1
公开(公告)日：2024-10-17
申请号：US18753091
申请日：2024-06-25
发明人： Shin-Puu JENG , Po-Hao TSAI , Po-Yao CHUANG , Feng-Cheng HSU , Shuo-Mao CHEN , Techi WONG
IPC分类号： H01L23/498 , H01L21/48 , H01L21/52 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/053 , H01L23/31 , H01L25/00 , H01L25/10
CPC分类号： H01L23/49838 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/52 , H01L21/563 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/053 , H01L23/49822 , H01L24/16 , H01L24/27 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/96 , H01L25/105 , H01L25/50 , H01L21/561 , H01L23/3128 , H01L2221/68345 , H01L2221/68359 , H01L2221/68368 , H01L2224/0401 , H01L2224/16227 , H01L2224/16235 , H01L2224/26175 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2224/81191 , H01L2224/83191 , H01L2224/92125 , H01L2224/92225 , H01L2224/97 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2924/15311
摘要： A chip package is provided. The chip package includes a substrate structure including: a redistribution structure having a conductive pad; and an insulating layer under the redistribution structure. The chip package includes a first chip over the redistribution structure. The chip package includes a second chip under the substrate structure. A top portion of the second chip extends into the insulating layer from a bottom surface of the insulating layer, the bottom surface faces away from the first chip, and a portion of the insulating layer is between the second chip and the redistribution structure. The chip package includes a first molding layer over the redistribution structure and the first chip. A first sidewall of the first molding layer and a second sidewall of the redistribution structure are substantially level with each other.
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公开(公告)号：US20240222318A1
公开(公告)日：2024-07-04
申请号：US18608296
申请日：2024-03-18
发明人： Jing-Cheng LIN , Po-Hao TSAI
IPC分类号： H01L23/00 , B23K1/00 , H01L21/768 , H01L23/498 , B23K101/42
CPC分类号： H01L24/83 , B23K1/0016 , H01L21/76898 , H01L23/49816 , H01L23/49838 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/17 , B23K2101/42 , H01L23/49811 , H01L23/49827 , H01L24/16 , H01L2224/03912 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/1146 , H01L2224/1147 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/1403 , H01L2224/16225 , H01L2224/16235 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81193 , H01L2924/00013 , H01L2924/00014 , H01L2924/15311 , H01L2924/3841
摘要： A method of making a semiconductor device includes patterning a photoresist on a substrate to form a plurality of openings. A first opening has a first width, a second opening has a second width, smaller than the first width, and a third opening is between the first opening and the second opening and has a third width, different from the first width and the second width. The width is measured in a direction parallel to a top surface of the substrate. The method further includes plating a first conductive material into each opening of the plurality of openings in the photoresist. Plating the first conductive material includes plating of the first conductive material to a first height in the first opening, plating the first conductive material to a second height in the second opening, and plating the first conductive material to a third height in the third opening.
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公开(公告)号：US20240079381A1
公开(公告)日：2024-03-07
申请号：US18388290
申请日：2023-11-09
发明人： Chen-Hua YU , An-Jhih SU , Jing-Cheng LIN , Po-Hao TSAI
IPC分类号： H01L25/065 , H01L21/56 , H01L21/78 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/552 , H01L23/60 , H01L25/00 , H01L25/10
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/78 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L23/552 , H01L23/562 , H01L23/60 , H01L25/105 , H01L25/50 , H01L21/568 , H01L23/5389 , H01L2224/18 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/06568 , H01L2924/181
摘要： A chip package structure is provided. The chip package structure includes a chip structure. The chip package structure includes a first ground bump below the chip structure. The chip package structure includes a conductive shielding film disposed over the chip structure and extending onto the first ground bump. The conductive shielding film has a concave upper surface facing the first ground bump.
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公开(公告)号：US20240047403A1
公开(公告)日：2024-02-08
申请号：US18484609
申请日：2023-10-11
发明人： Neng-Chieh CHANG , Po-Hao TSAI , Ming-Da CHENG , Wen-Hsiung LU , Hsu-Lun LIU
CPC分类号： H01L24/20 , H01L24/19 , H01L24/24 , H01L24/82 , H01L21/561 , H01L25/105 , H01L24/96 , H01L2225/1058 , H01L2224/214 , H01L2224/215 , H01L2924/01029 , H01L2924/01013 , H01L24/13 , H01L2224/13024 , H01L24/04 , H01L24/05 , H01L2224/0401 , H01L2224/05569 , H01L2224/19 , H01L2224/24175 , H01L2224/821 , H01L2225/1035
摘要： A semiconductor package structure includes a conductive pad formed over a substrate. The semiconductor package structure also includes a passivation layer formed over the conductive pad. The semiconductor package structure further includes a first via structure formed through the passivation layer and in contact with the conductive pad. The semiconductor package structure also includes a first encapsulating material surrounding the first via structure. The semiconductor package structure further includes a redistribution layer structure formed over the first via structure. The first via structure has a lateral extending portion embedded in the first encapsulating material near a top surface of the first via structure, and the lateral extending portion has a width increasing in a direction toward the redistribution layer structure.
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公开(公告)号：US20220310468A1
公开(公告)日：2022-09-29
申请号：US17838434
申请日：2022-06-13
发明人： Meng-Liang LIN , Po-Hao TSAI , Po-Yao CHUANG , Yi-Wen WU , Techi WONG , Shin-Puu JENG
IPC分类号： H01L23/31 , H01L23/498 , H01L23/24 , H01L23/00 , H01L25/16 , H01L25/065 , H01L25/18 , H01L21/56 , H01L21/48
摘要： A package structure is provided. The package structure includes a redistribution structure, and the redistribution structure has multiple insulating layers and multiple conductive features. The package structure also includes a semiconductor die and a device element over opposite surfaces of the redistribution structure. The package structure further includes a first protective layer at least partially surrounding the semiconductor die. In addition, the package structure includes a second protective layer at least partially surrounding the device element. The second protective layer is thicker than the first protective layer, and the second protective layer and the first protective layer have different coefficients of thermal expansion.
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公开(公告)号：US20220216143A1
公开(公告)日：2022-07-07
申请号：US17142809
申请日：2021-01-06
发明人： Ting-Li YANG , Po-Hao TSAI , Ching-Wen HSIAO , Hong-Seng SHUE , Yu-Tse SU
IPC分类号： H01L23/522 , H01L23/00 , H01L23/528 , H01L21/48 , H01L21/768
摘要： A chip structure is provided. The chip structure includes a substrate. The chip structure includes a conductive line over the substrate. The chip structure includes a first passivation layer over the substrate and the conductive line. The chip structure includes a conductive pad over the first passivation layer covering the conductive line. The conductive pad is thicker and wider than the conductive line. The chip structure includes a first conductive via structure and a second conductive via structure passing through the first passivation layer and directly connected between the conductive pad and the conductive line. The chip structure includes a conductive pillar over the conductive pad.
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