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    METHOD OF CONTROLLING BUMP HEIGHT VARIATION
    3.
    发明申请
    METHOD OF CONTROLLING BUMP HEIGHT VARIATION 审中-公开

    公开(公告)号：US20170229422A1

    公开(公告)日：2017-08-10

    申请号：US15497669

    申请日：2017-04-26

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Jing-Cheng LIN ,  Po-Hao TSAI

    IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L23/498

    摘要： A method of making a semiconductor device includes patterning a photoresist on a substrate to form a plurality of openings in the photoresist. A first opening is near a center of the substrate and has a first width. A second opening is near an edge of the substrate and has a second width smaller than the first width. A third opening is between the first opening and the second opening and has a third width greater than the second width and smaller than the first width. The method further includes plating a conductive material into each opening. Plating the conductive material includes plating the first conductive material in the first opening at a first current density; plating the first conductive material in the second opening at a second current density greater than the first current density; and plating the conductive material in the third opening at a third current density.

    FRONT-TO-BACK BONDING WITH THROUGH-SUBSTRATE VIA (TSV)
    8.
    发明申请
    FRONT-TO-BACK BONDING WITH THROUGH-SUBSTRATE VIA (TSV) 有权

    公开(公告)号：US20210043547A1

    公开(公告)日：2021-02-11

    申请号：US17080564

    申请日：2020-10-26

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Jing-Cheng LIN

    IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L25/00 ,  H01L27/06 ,  H01L25/065 ,  H01L21/768 ,  H01L21/762

    摘要： Methods for forming a semiconductor device structure are provided. The method includes forming a conductive feature in a first wafer, and forming a first bonding layer over the conductive feature. The method includes forming a second bonding layer over a second wafer, and bonding the first wafer and the second wafer by bonding the first bonding layer and the second bonding layer. The method also includes forming a second transistor in a front-side of the second wafer, and after forming the second transistor in the front-side of the second wafer, forming a first TSV through the second wafer, wherein the first TSV stops at the conductive feature.

    SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION
    9.
    发明申请
    SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION 审中-公开

    公开(公告)号：US20200350277A1

    公开(公告)日：2020-11-05

    申请号：US16936112

    申请日：2020-07-22

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Jing-Cheng LIN ,  Po-Hao TSAI

    IPC分类号： H01L23/00 ,  B23K1/00 ,  H01L23/498 ,  H01L21/768

    摘要： A semiconductor device includes a first substrate and a second substrate. The semiconductor device includes a plurality of conductive pillars between the first and second substrates. The plurality of conductive pillars includes a first conductive pillar having a first width, wherein the first width is substantially uniform along an entire first height of the first conductive pillar, a second conductive pillar having a second width, wherein the second width is substantially uniform along an entire second height of the second conductive pillar, the first width is different from the second width, and the entire first height is equal to the entire second height, and a third conductive pillar having a third width, wherein the third width is substantially uniform along an entire third height of the third conductive pillar, and the third conductive pillar is between the first conductive pillar and the second conductive pillar in the first direction.