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公开(公告)号：US07298081B2
公开(公告)日：2007-11-20
申请号：US11132295
申请日：2005-05-19
IPC分类号： H01J1/62
CPC分类号： H01J31/123 , H01J29/87
摘要： A display apparatus is disclosed with a vacuum seal member which has a shell structure. The display apparatus includes an anode substrate, a planar cathode substrate forming an electron emitting chamber vacuously sealed between the cathode substrate and the anode substrate, electron sources formed on the cathode substrate, phosphors formed on the anode substrate, and a vacuum seal member forming a pressure balancing chamber on the back of the electron emitting chamber side of the cathode substrate. The vacuum seal member is placed covering the back of the electron emitting chamber side, and has a shell structure for receiving the atmospheric pressure.
摘要翻译： 公开了具有壳结构的真空密封构件的显示装置。 显示装置包括阳极基板，形成在阴极基板和阳极基板之间真空密封的电子发射室的平面阴极基板，形成在阴极基板上的电子源，形成在阳极基板上的荧光体和形成在阳极基板上的真空密封部件 阴极基板的电子发射室侧背面的压力平衡室。 真空密封构件被覆盖在电子发射室侧的背面，并且具有用于接收大气压的壳结构。
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公开(公告)号：US20050258736A1
公开(公告)日：2005-11-24
申请号：US11133305
申请日：2005-05-20
CPC分类号： H01J31/123 , H01J29/87
摘要： To achieve high resolution, lightening, and thinning in a display apparatus, the display apparatus includes a thin display panel and a control unit. The display panel includes an anode substrate, a cathode substrate forming an electron emitting chamber vacuously sealed between itself and the anode substrate, phosphors formed on the anode substrate, and a pressure support formed on the back of the electron emitting chamber side of the cathode substrate. The pressure support includes a vacuum seal member forming a pressure supporting chamber vacuously sealed between itself and the cathode substrate independently of the electron emitting chamber, and a reinforcement member which is formed of a member having a gap, which is sandwiched between the vacuum seal member and cathode substrate in the pressure supporting member, and at least both end portions of which span a bonding area of the cathode substrate for the anode substrate.
摘要翻译： 为了在显示装置中实现高分辨率，减轻和减薄，显示装置包括薄的显示面板和控制单元。 显示面板包括阳极基板，形成在其自身与阳极基板之间真空密封的电子发射室的阴极基板，形成在阳极基板上的荧光体和形成在阴极基板的电子发射室侧背面的压力支架 。 压力支架包括一个真空密封件，该真空密封件形成一个与电子发射室无关地密封在其本身与阴极基板之间的压力支撑室;以及一个加强件，该加强件由一个具有间隙的部件形成，该加强件夹在真空密封件 和阴极基板，并且其至少两端部跨越阳极基板的阴极基板的接合区域。
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公开(公告)号：US20050258735A1
公开(公告)日：2005-11-24
申请号：US11132295
申请日：2005-05-19
CPC分类号： H01J31/123 , H01J29/87
摘要： An object of the present invention is to achieve high resolution, lightening, and thinning of a display apparatus. The display apparatus includes an anode substrate, a planar cathode substrate forming an electron emitting chamber vacuously sealed between the cathode substrate and the anode substrate, electron sources formed on the cathode substrate, phosphors formed on the anode substrate, and a vacuum seal member forming a pressure balancing chamber on the back of the electron emitting chamber side of the cathode substrate. The vacuum seal member is placed covering the back of the electron emitting chamber side, and has a shell structure for receiving the atmospheric pressure.
摘要翻译： 本发明的目的是实现显示装置的高分辨率，减轻和减薄。 显示装置包括阳极基板，形成在阴极基板和阳极基板之间真空密封的电子发射室的平面阴极基板，形成在阴极基板上的电子源，形成在阳极基板上的荧光体和形成在阳极基板上的真空密封部件 阴极基板的电子发射室侧背面的压力平衡室。 真空密封构件被覆盖在电子发射室侧的背面，并且具有用于接收大气压的壳结构。
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公开(公告)号：US06331730B1
公开(公告)日：2001-12-18
申请号：US09296466
申请日：1999-04-22
申请人： Takeshi Terasaki , Hideo Miura , Chikara Nakajima , Makoto Kitano
发明人： Takeshi Terasaki , Hideo Miura , Chikara Nakajima , Makoto Kitano
IPC分类号： H02K1936
CPC分类号： H01L24/01 , H01L23/049 , H01L23/3121 , H01L24/33 , H01L2224/83385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01042 , H01L2924/01047 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/181 , H01L2924/18301 , H01L2924/3512 , H01L2924/00 , H01L2924/00012
摘要： A push-in type semiconductor chip has a semiconductor device, a support electrode body bonded to one of the end portions of the semiconductor chip and supported by, and fixed to, a heat spreader at a support fixing portion thereof, a lead electrode body bonded to the other end portion of the semiconductor chip and an insulating/sealing member disposed at the bond portion between the semiconductor chip and the support electrode body and at the bond portion between the semiconductor chip and the lead electrode body. The support electrode body includes a first portion having an outer diameter different from that of the support fixing portion at which the support electrode body is supported and fixed by the heat spreader. By setting a predetermined relationship between the outer diameters of the first portion and the support fixing portion, deformation and breakage of the semiconductor chip during assembly can be prevented.
摘要翻译： 推入型半导体芯片具有半导体器件，支撑电极体，其结合到半导体芯片的一个端部并由其支撑固定部分上的散热器支撑并固定到其上，引线电极体接合 到半导体芯片的另一端部以及设置在半导体芯片和支撑电极体之间的接合部以及半导体芯片和引线电极体的接合部的绝缘/密封构件。 支撑电极体包括具有与支撑固定部分不同的外径的第一部分，支撑电极主体由散热器支撑和固定。 通过设置第一部分的外径和支撑固定部分之间的预定关系，可以防止组装期间半导体芯片的变形和断裂。
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公开(公告)号：US06844219B2
公开(公告)日：2005-01-18
申请号：US10136409
申请日：2002-05-02
申请人： Makoto Kitano , Akihiro Yaguchi , Naotaka Tanaka , Takeshi Terasaki , Ichiro Anjoh , Ryo Haruta , Asao Nishimura , Junichi Saeki
发明人： Makoto Kitano , Akihiro Yaguchi , Naotaka Tanaka , Takeshi Terasaki , Ichiro Anjoh , Ryo Haruta , Asao Nishimura , Junichi Saeki
IPC分类号： H01L23/12 , H01L21/60 , H01L23/00 , H01L23/02 , H01L23/16 , H01L23/31 , H01L23/488 , H01L23/495 , H01L23/498 , H05K3/34 , H01L21/44
CPC分类号： H01L23/16 , H01L23/3128 , H01L23/49572 , H01L23/49816 , H01L23/562 , H01L24/45 , H01L24/48 , H01L24/50 , H01L2224/05554 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2924/00014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01082 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H01L2924/1815 , H05K3/3426 , H05K3/3436 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor device which can improve the connection reliability of solder bumps and productivity in manufacturing. Insulating tape having wiring patterns on its surface is bonded to a lead frame. Semiconductor elements are loaded and circuit formed surfaces and sides of the semiconductor elements are sealed with sealing resin. After arrangements of individual semiconductor devices are formed, the lead frame is separated into individual metal plates to form individual semiconductor devices. Such simultaneous production of a plurality of semiconductor devices enhances productivity, and improves flatness of the insulating tape, whereby the connection reliability of solder bumps is improved.
摘要翻译： 可以提高焊料凸块的连接可靠性和制造生产率的半导体器件。 在其表面具有布线图案的绝缘带被粘合到引线框架上。 半导体元件被加载并且电路形成的表面和半导体元件的侧面被密封树脂密封。 在形成各个半导体器件的布置之后，将引线框架分离成单独的金属板以形成单独的半导体器件。 这种同时生产多个半导体器件提高了生产率，并且提高了绝缘带的平坦度，从而提高了焊料凸块的连接可靠性。
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公开(公告)号：US06465876B1
公开(公告)日：2002-10-15
申请号：US08974682
申请日：1997-11-19
申请人： Makoto Kitano , Akihiro Yaguchi , Naotaka Tanaka , Takeshi Terasaki , Ichiro Anjoh , Ryo Haruta , Asao Nishimura , Junichi Saeki
发明人： Makoto Kitano , Akihiro Yaguchi , Naotaka Tanaka , Takeshi Terasaki , Ichiro Anjoh , Ryo Haruta , Asao Nishimura , Junichi Saeki
IPC分类号： H01L2302
CPC分类号： H01L23/16 , H01L23/3128 , H01L23/49572 , H01L23/49816 , H01L23/562 , H01L24/45 , H01L24/48 , H01L24/50 , H01L2224/05554 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2924/00014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01082 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H01L2924/1815 , H05K3/3426 , H05K3/3436 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor device which can improve the connection reliability of solder bumps and productivity in manufacturing. Insulating tape having wiring patterns on its surface is bond ed to a lead frame. Semiconductor elements are loaded and circuit formed surfaces and sides of the semiconductor elements are sealed with sealing resin. After arrangements of individual semiconductor devices are formed, the lead frame is separated into individual metal plates to form individual semiconductor devices. Such simultaneous production of a plurality of semiconductor devices enhances productivity, and improves flatness of the insulating tape, whereby the connection reliability of solder bumps is improved.
摘要翻译： 可以提高焊料凸块的连接可靠性和制造生产率的半导体器件。 在其表面上具有布线图案的绝缘带与引线框架结合。 半导体元件被加载并且电路形成的表面和半导体元件的侧面被密封树脂密封。 在形成各个半导体器件的布置之后，将引线框架分离成单独的金属板以形成单独的半导体器件。 这种同时生产多个半导体器件提高了生产率，并且提高了绝缘带的平坦度，从而提高了焊料凸块的连接可靠性。
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公开(公告)号：US06232653B1
公开(公告)日：2001-05-15
申请号：US09270500
申请日：1999-03-17
申请人： Naotaka Tanaka , Akihiro Yaguchi , Ryuji Kohno , Kiyomi Kojima , Takeshi Terasaki , Hideo Miura , Junichi Arita , Chikako Imura
发明人： Naotaka Tanaka , Akihiro Yaguchi , Ryuji Kohno , Kiyomi Kojima , Takeshi Terasaki , Hideo Miura , Junichi Arita , Chikako Imura
IPC分类号： H01L2348
CPC分类号： H01L23/4951 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/32014 , H01L2224/32245 , H01L2224/451 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/49175 , H01L2224/73215 , H01L2224/92147 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/05599
摘要： A TSOP type semiconductor device having a LOC structure employing a copper (alloy) type frame prevents resin cracks that occur in a reliability test such as a temperature cycle test. The TSOP type semiconductor device has narrower common inner leads where a resin crack would be likely to occur first, and has a thinner chip.
摘要翻译： 具有采用铜（合金）型框架的LOC结构的TSOP型半导体器件防止了在诸如温度循环测试的可靠性测试中发生的树脂裂纹。 TSOP型半导体器件具有较窄的公共内引线，其中首先可能发生树脂裂纹，并且具有更薄的芯片。
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公开(公告)号：US20070182023A1
公开(公告)日：2007-08-09
申请号：US11654051
申请日：2007-01-16
IPC分类号： H01L23/48
CPC分类号： H01L23/24 , H01L23/051 , H01L23/492 , H01L24/01 , H01L24/33 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01074 , H01L2924/01082 , H01L2924/181 , H01L2924/3512 , H01L2924/00 , H01L2924/00012
摘要： By making coefficients of linear thermal expansion of stress relief members on upper and lower surface sides of a semiconductor chip small, thermal strain on joint members above and below the semiconductor chip is decreased and development of a crack therein is suppressed to ensure a joint area. Furthermore, by making areas of electrodes and stress relief members large enough to include a project plane of the semiconductor chip projected onto the joint surfaces thereof, even if a crack develops into the joint member between the stress relief member and the electrode, a joint area larger than the area of the semiconductor chip can be ensured for a certain amount of time. As a result, a semiconductor device capable of simultaneously ensuring the joint areas of the respective joint members and preventing a decrease in heat release capability is provided.
摘要翻译： 通过使半导体芯片的上表面和下表面侧上的应力消除构件的线性热膨胀系数小，半导体芯片上下接合构件的热应变减小，并且其中的裂纹的发展被抑制以确保接合面积。 此外，通过使电极和应力消除构件的面积足够大以包括投影到其接合表面上的半导体芯片的突出面，即使在应力消除构件和电极之间的接合构件中产生裂纹， 大于半导体芯片的面积可以确保一定的时间。 结果，提供能够同时确保各接合部件的接合部位并防止散热能力降低的半导体器件。
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公开(公告)号：US09252793B2
公开(公告)日：2016-02-02
申请号：US13990030
申请日：2010-11-29
申请人： Toshiaki Tsutsumi , Yoshihiro Funato , Tomonori Okudaira , Tadato Yamagata , Akihisa Uchida , Takeshi Terasaki , Tomohisa Suzuki , Yoshiharu Kanegae
发明人： Toshiaki Tsutsumi , Yoshihiro Funato , Tomonori Okudaira , Tadato Yamagata , Akihisa Uchida , Takeshi Terasaki , Tomohisa Suzuki , Yoshiharu Kanegae
IPC分类号： H03L7/24 , H01L23/522 , H01L27/06 , H01L23/31 , H01L23/00
CPC分类号： H03B5/24 , H01L23/3107 , H01L23/5228 , H01L24/05 , H01L24/06 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0629 , H01L28/20 , H01L28/24 , H01L2224/05554 , H01L2224/06179 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/01015 , H01L2924/07802 , H01L2924/14 , H01L2924/181 , H03L7/24 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor device is formed by sealing, with a resin, a semiconductor chip (CP1) having an oscillation circuit utilizing a reference resistor. The oscillation circuit generates a reference current by utilizing the reference resistor, a voltage is generated in accordance with this reference current and an oscillation frequency of the oscillation unit, and the oscillation unit oscillates at a frequency in accordance with the generated voltage. The reference resistor is formed of a plurality of resistors, which extend in a first (Y) direction orthogonal to a first side, inside a first region (RG1, RG2, RG3, and RG4) surrounded by the first side (S1, S2, S3, and S4) of a main surface of the semiconductor chip (CP1), a first line (42, 43, 44, and 45) connecting between one end of the first side and the center (CT1) of the main surface of the semiconductor chip, and a second line (42, 43, 44, and 45) connecting between the other end of the first side and the center of the main surface of the semiconductor chip.
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公开(公告)号：US20130314165A1
公开(公告)日：2013-11-28
申请号：US13990030
申请日：2010-11-29
申请人： Toshiaki Tsutsumi , Yoshihiro Funato , Tomonori Okudaira , Tadato Yamagata , Akihisa Uchida , Takeshi Terasaki , Tomohisa Suzuki , Yoshiharu Kanegae
发明人： Toshiaki Tsutsumi , Yoshihiro Funato , Tomonori Okudaira , Tadato Yamagata , Akihisa Uchida , Takeshi Terasaki , Tomohisa Suzuki , Yoshiharu Kanegae
IPC分类号： H03L7/24
CPC分类号： H03B5/24 , H01L23/3107 , H01L23/5228 , H01L24/05 , H01L24/06 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0629 , H01L28/20 , H01L28/24 , H01L2224/05554 , H01L2224/06179 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/01015 , H01L2924/07802 , H01L2924/14 , H01L2924/181 , H03L7/24 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A semiconductor device is formed by sealing, with a resin, a semiconductor chip (CP1) having an oscillation circuit utilizing a reference resistor. The oscillation circuit generates a reference current by utilizing the reference resistor, a voltage is generated in accordance with this reference current and an oscillation frequency of the oscillation unit, and the oscillation unit oscillates at a frequency in accordance with the generated voltage. The reference resistor is formed of a plurality of resistors, which extend in a first (Y) direction orthogonal to a first side, inside a first region (RG1, RG2, RG3, and RG4) surrounded by the first side (S1, S2, S3, and S4) of a main surface of the semiconductor chip (CP1), a first line (42, 43, 44, and 45) connecting between one end of the first side and the center (CT1) of the main surface of the semiconductor chip, and a second line (42, 43, 44, and 45) connecting between the other end of the first side and the center of the main surface of the semiconductor chip.
摘要翻译： 通过用树脂密封具有利用参考电阻器的振荡电路的半导体芯片（CP1）形成半导体器件。 振荡电路利用参考电阻产生参考电流，根据该参考电流产生电压和振荡单元的振荡频率，并且振荡单元根据所产生的电压以频率振荡。 参考电阻器由多个电阻器构成，该多个电阻器在与第一侧面正交的第一（Y）方向上在由第一侧（S1，S2，RG3，RG3和RG4）包围的第一区域（RG1，RG2， S3和S4），连接在第一侧的一端与第一侧的主表面的中心（CT1）之间的第一线（42,43,44和45） 半导体芯片和连接在第一侧的另一端和半导体芯片的主表面的中心之间的第二线（42,43,44和45）。
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