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    Dual port semiconductor memory having random and serial access modes
    1.
    发明授权
    Dual port semiconductor memory having random and serial access modes 失效
    具有随机和串行访问模式的双端口半导体存储器

    公开(公告)号：US4858190A

    公开(公告)日：1989-08-15

    申请号：US5104

    申请日：1987-01-20

    申请人： Yasunori Yamaguchi ,  Akirahiko Yoshida ,  Masami Nei ,  Masamichi Ishihara ,  Yukio Yamamoto

    发明人： Yasunori Yamaguchi ,  Akirahiko Yoshida ,  Masami Nei ,  Masamichi Ishihara ,  Yukio Yamamoto

    IPC分类号： G11C7/00 ,  G11C7/10 ,  G11C8/00 ,  G11C8/04 ,  G11C8/16 ,  G11C11/401

    CPC分类号： G11C7/1075 ,  G11C8/16

    摘要： A semiconductor memory is provided in which a column decoder is used commonly for the random input and output and the serial input/output by providing both a signal path for transmitting signals in parallel to the data lines of a memory array and a latch circuit and a switch path for connecting said latch circuit and a serial input/output common data line in response to a selection signal generated by a shift register, and by feeding the output signal of a random input/output column decoder as an initial value to the individual bits of said shift register.

    摘要翻译： 提供一种半导体存储器，其中列解码器通常用于随机输入和输出以及串行输入/输出，通过提供用于与存储器阵列和锁存电路的数据线并行发送信号的信号路径和 用于响应于由移位寄存器产生的选择信号连接所述锁存电路和串行输入/输出公共数据线的开关路径，并且通过将随机输入/输出列解码器的输出信号作为初始值馈送到各个位 的移位寄存器。

    Semiconductor memory
    6.
    发明授权
    Semiconductor memory 失效
    半导体存储器

    公开(公告)号：US4819213A

    公开(公告)日：1989-04-04

    申请号：US940292

    申请日：1986-12-11

    申请人： Yasunori Yamaguchi ,  Masamichi Ishihara

    发明人： Yasunori Yamaguchi ,  Masamichi Ishihara

    IPC分类号： G11C11/401 ,  G09G5/14 ,  G09G5/377 ,  G11C7/10 ,  G11C11/4096 ,  G11C8/00

    CPC分类号： G11C7/1018 ,  G11C11/4096

    摘要： A semiconductor memory for serially reading data of memory cells connected to the selected one word line based on the clock signal which defines a picture element and for writing the write data serially input to the latch circuit based on such clock signal to the memory cells, during the horizontal blanking time of a CRT monitor.

    摘要翻译： 一种半导体存储器，用于基于定义图像元素的时钟信号串行读取连接到所选择的一条字线的存储器单元的数据，并且用于基于这样的时钟信号向存储器单元写入串行输入到锁存电路的写入数据 CRT监视器的水平消隐时间。

    SEMICONDUCTOR DEVICE YIELD PREDICTION SYSTEM AND METHOD
    10.
    发明申请
    SEMICONDUCTOR DEVICE YIELD PREDICTION SYSTEM AND METHOD 失效
    半导体器件输出预测系统及方法

    公开(公告)号：US20080140330A1

    公开(公告)日：2008-06-12

    申请号：US11836199

    申请日：2007-08-09

    申请人： Natsuyo Morioka ,  Seiji Ishikawa ,  Katsumi Ikegaya ,  Yasunori Yamaguchi ,  Kazuo Ito ,  Yuichi Hamamura

    发明人： Natsuyo Morioka ,  Seiji Ishikawa ,  Katsumi Ikegaya ,  Yasunori Yamaguchi ,  Kazuo Ito ,  Yuichi Hamamura

    IPC分类号： G06F17/18 ,  G06F19/00

    CPC分类号： G05B15/02 ,  G05B17/02

    摘要： An average fault ratio is calculated from product characteristics of a product as a target of yield prediction, in order to predict yield accurately in the course of manufacturing the prediction target product.With respect to a reference product, whose wiring pattern is different from the prediction target product but manufactured by the same manufacturing process, a monthly electric fault density is calculated from actually measured data. Respective average fault ratios are obtained from product characteristics of the prediction target product and the reference product. A monthly electric fault density of the prediction target product is obtained by multiplying the monthly electric fault density of the reference product by the ratio of the average fault ratios. The yield is calculated by using the monthly electric fault density of the month in which a yield prediction target lot of the prediction target product was processed.

    摘要翻译： 从作为产量预测目标的产品的产品特性计算平均故障率，以便在制造预测目标产品的过程中准确地预测产量。 对于其参考产品，其布线图案与预测目标产品不同但通过相同的制造工艺制造，每月电故障密度由实际测量数据计算。 相应的平均故障率是从预测目标产品和参考产品的产品特性获得的。 通过将参考产品的每月电气故障密度乘以平均故障率的比率来获得预测目标乘积的每月电气故障密度。 通过使用处理预测目标产品的产量预测目标批次的月份的每月电气故障密度来计算产量。