公开(公告)号：US20110113873A1

公开(公告)日：2011-05-19

申请号：US13000781

申请日：2009-06-23

申请人： Yoshiyuki Saito ,  Kouji Moriyama

发明人： Yoshiyuki Saito ,  Kouji Moriyama

IPC分类号： G01M15/04 ,  G01K1/00

CPC分类号： F02D41/22 ,  F02B77/083 ,  F02B77/089 ,  F02D35/025 ,  F02F5/00 ,  G01M15/05 ,  Y02T10/40

摘要： The present invention is an apparatus and a method for monitoring a sliding state of a piston ring. The present invention detects a cycle of rotation of a piston ring based on a temperature at a predetermined site of a cylinder liner, and determines a sign of burning of a piston based on a state of the rotation. As a result, it is possible to detect a sign of burning of a piston by an apparatus less expensive than apparatuses using a conventional technique of detecting a capacitance.

摘要翻译： 本发明是用于监测活塞环的滑动状态的装置和方法。 本发明基于气缸套的预定位置处的温度来检测活塞环的旋转周期，并且基于旋转状态确定活塞的燃烧的符号。 结果，可以通过比使用传统的电容检测技术的装置更便宜的装置来检测活塞燃烧的符号。

公开(公告)号：US07886085B2

公开(公告)日：2011-02-08

申请号：US12295051

申请日：2007-02-20

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Noriaki Takeda ,  Toru Iwata ,  Takaharu Yoshida ,  Yoshiyuki Saito

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Noriaki Takeda ,  Toru Iwata ,  Takaharu Yoshida ,  Yoshiyuki Saito

IPC分类号： G06F13/00 ,  G06F3/00

CPC分类号： H04L7/10 ,  G06F1/12 ,  H04L7/0008 ,  H04L7/033 ,  H04L7/044 ,  H04L7/046

摘要： An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time. A removable memory device that transmits/receives data to and from a host terminal, which includes: a clock reception section that receives a transmission/reception clock, which is used for transmitting/receiving data between the host terminal and the removable memory device, from the host terminal; a phase synchronization pattern generation section that generates a phase synchronization pattern, which is for adjusting a phase of internal reception clock which the host terminal incorporates for receiving data from the removable memory device, based on the transmission/reception clock; and a transmission section that transmits the generated phase synchronization pattern to the host terminal, and in which the phase synchronization pattern includes a first level signal which lasts for at least two cycles, and a second level signal which follows the first level signal and lasts for one cycle, is provided.

摘要翻译： 本发明的目的是提供一种提高数据传输效率的技术，其允许同时正确地接收数据。 一种向主机终端发送/接收数据的可移动存储装置，包括：接收用于在主机终端和可移动存储装置之间发送/接收数据的发送/接收时钟的时钟接收部分， 主机终端; 相位同步模式生成部，其基于所述发送接收时钟生成相位同步模式，所述相位同步模式用于调整所述主机终端结合的用于从所述可移动存储装置接收数据的内部接收时钟的相位; 以及发送部，其将所生成的相位同步模式发送到所述主机终端，并且所述相位同步模式包括持续至少两个周期的第一电平信号，以及在所述第一电平信号之后持续的第二电平信号， 提供一个循环。

公开(公告)号：US20100289534A1

公开(公告)日：2010-11-18

申请号：US12847161

申请日：2010-07-30

申请人： Hiroshi SUENAGA ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

发明人： Hiroshi SUENAGA ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

IPC分类号： H03B1/00

CPC分类号： H04L25/028 ,  H04L25/0272

摘要： An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.

摘要翻译： 本发明的目的是实现在两个传输系统之间切换的接口电路中的输出级驱动器的面积的减小。 接口电路具有两个驱动电路和驱动控制电路，该电路可以在作为电压驱动系统和电流驱动系统的两个驱动系统之间切换。 两个驱动电路通过驱动控制电路连接到电源电位。 通过选择电路输入输入信号的两个输入信号和反相逻辑信号。 根据输入到驱动控制电路的控制信号，接口电路在电压驱动型单端传输系统和电流驱动型差动传输系统之间切换。

公开(公告)号：US07737553B2

公开(公告)日：2010-06-15

申请号：US11242955

申请日：2005-10-05

申请人： Osamu Shibata ,  Yoshiyuki Saito

发明人： Osamu Shibata ,  Yoshiyuki Saito

IPC分类号： H01L23/52

CPC分类号： H01L23/60 ,  H01L23/552 ,  H01L23/66 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00

摘要： Fine-pitch first and second bonding pads are formed on a chip along its perimeter. The first bonding pads are formed at the peripheral parts on the chip, while the second bonding pads are formed inside the peripheral parts. An ESD protection circuit is connected to the first bonding pad, and an I/O circuit is connected to the second bonding pad. First and second bonding wires connect the first and second bonding pads to the same package pin, respectively. The second bonding wire is configured to be sufficiently longer than the first bonding wire, regardless of the pitch of the first bonding pads.

摘要翻译： 细间距第一和第二接合焊盘沿其周边形成在芯片上。 第一接合焊盘形成在芯片的周边部分，而第二接合焊盘形成在周边部分内部。 ESD保护电路连接到第一焊盘，并且I / O电路连接到第二接合焊盘。 第一和第二接合线分别将第一和第二接合焊盘连接到相同的封装引脚。 第二接合线被配置为比第一接合线充分长，而与第一接合焊盘的间距无关。

公开(公告)号：US07568550B2

公开(公告)日：2009-08-04

申请号：US10537791

申请日：2003-12-05

申请人： Hirotaka Yasuda ,  Hirotsugu Kusano ,  Wataru Yamada ,  Yoshiyuki Saito ,  Shuzo Hirakushi

发明人： Hirotaka Yasuda ,  Hirotsugu Kusano ,  Wataru Yamada ,  Yoshiyuki Saito ,  Shuzo Hirakushi

IPC分类号： B62D5/04

CPC分类号： B62D5/0409 ,  F16C19/06 ,  F16C19/54 ,  F16C33/585 ,  F16C2240/76 ,  F16C2326/24 ,  F16C2361/61 ,  F16C2380/27 ,  F16H1/16 ,  F16H55/24 ,  F16H57/021 ,  F16H2057/0213 ,  Y10T74/19828

摘要： Deep groove ball bearings are used as bearings supporting both side portions of a worm. In the first bearing on the side of a motor, the curvature radius of a raceway groove in an inner ring or the curvature radius of a raceway groove in an outer ring are set to a specific numerical range with respect to the diameter of a ball.

摘要翻译： 深沟球轴承用作支撑蜗杆两侧的轴承。 在电动机侧的第一轴承中，内圈的轨道槽的曲率半径或外圈的轨道槽的曲率半径相对于球的直径设定在规定的数值范围。

公开(公告)号：US20090097301A1

公开(公告)日：2009-04-16

申请号：US11915816

申请日：2006-05-18

申请人： Eiji Takahashi ,  Yoshiyuki Saito

发明人： Eiji Takahashi ,  Yoshiyuki Saito

IPC分类号： G11C11/24 ,  G11C7/00

CPC分类号： H01L27/101 ,  G11C11/404 ,  G11C11/4074 ,  G11C11/4076 ,  H01L27/1085 ,  H01L27/10882

摘要： An object is to provide a semiconductor memory device which can dynamically change the number of memory cells used as by-pass capacitors. In each memory block, one selector signal line is provided in parallel to one word line. In a pair of the word line and the selector signal line adjacent to each other, states are maintained opposite to each other. Further, in a memory block, one branch of a supply line is provided in parallel to one bit line. In each of the memory cells, a first transistor connects a capacitor to the bit line in accordance with the state of the word line. Furthermore, a second transistor connects the same capacitor to the branch of the supply line in accordance with the state of the selector signal line. In the memory cells aligned in a row direction, gates of the first transistors are connected to the same word line, and gates of the second transistors are connected to the same selector signal line.

摘要翻译： 本发明的目的是提供一种半导体存储器件，其可以动态地改变用作旁路电容器的存储单元的数量。 在每个存储块中，一条选择器信号线与一条字线平行地提供。 在彼此相邻的一对字线和选择器信号线中，状态保持彼此相对。 此外，在存储块中，供给线的一个分支与一个位线并行设置。 在每个存储单元中，第一晶体管根据字线的状态将电容器连接到位线。 此外，第二晶体管根据选择器信号线的状态将相同的电容器连接到电源线的分支。 在沿行方向排列的存储单元中，第一晶体管的栅极连接到相同的字线，第二晶体管的栅极连接到相同的选择信号线。

公开(公告)号：US20080036723A1

公开(公告)日：2008-02-14

申请号：US11905356

申请日：2007-09-28

申请人： Takahiro Fujioka ,  Shigeru Ito ,  Mitsuru Goto ,  Yozo Nakayasu ,  Yoshiyuki Saito

发明人： Takahiro Fujioka ,  Shigeru Ito ,  Mitsuru Goto ,  Yozo Nakayasu ,  Yoshiyuki Saito

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011 ,  G09G5/18 ,  G09G2370/08

摘要： A liquid crystal display device capable of improving display quality by enabling proper execution of receipt and acceptance of image signals through compensation for variation in duty ratios of clock signals as input to liquid crystal driver circuitry, is provided. In a liquid crystal display device comprising a liquid crystal display element and liquid crystal driver circuitry, the liquid crystal driver circuitry is operable to receive an image signal as input thereto for taking it into a bus at the timing of a change of an internal clock signal from a first level to a second level or alternatively its change from the second level to the first level and then select from the image signal as taken or “accepted” into the bus a voltage used to drive the liquid crystal display element, wherein the internal clock signal is the clock signal that causes a first level period and a second level period of an external clock signal being input to the liquid crystal driver circuitry to be made identical or equalized by a clock compensation circuit to specified values respectively.

摘要翻译： 提供一种液晶显示装置，其能够通过对作为输入到液晶驱动电路的时钟信号的占空比的变化进行补偿来适当地执行图像信号的接收和接收来提高显示质量。 在包括液晶显示元件和液晶驱动器电路的液晶显示装置中，液晶驱动器电路可操作以接收作为其输入的图像信号，以在内部时钟信号改变的定时将其输入总线 从第一电平到第二电平或者其从第二电平到第一电平的变化，然后从图像信号中选择被采取或“接受”到总线中用于驱动液晶显示元件的电压，其中内部 时钟信号是使得输入到液晶驱动器电路的外部时钟信号的第一电平周期和第二电平周期分别由时钟补偿电路相同或均衡的时钟信号。

公开(公告)号：US20050289269A1

公开(公告)日：2005-12-29

申请号：US11149171

申请日：2005-06-10

申请人： Takeshi Nakayama ,  Eiji Takahashi ,  Yoshiyuki Saito ,  Yukihiro Ishimaru ,  Hideki Iwaki

发明人： Takeshi Nakayama ,  Eiji Takahashi ,  Yoshiyuki Saito ,  Yukihiro Ishimaru ,  Hideki Iwaki

IPC分类号： G06F13/00 ,  G06F13/40 ,  G06F13/42

CPC分类号： G06F13/409 ,  G06F13/4226 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A stacked device is disclosed which is easily manufactured while identifying a plurality of devices that are stacked in the stacked device. The stacked device includes a stack of a plurality of slave devices and a master device having identical terminal arrangements. Here, the master device includes command transmission unit configured to input an identification command to a terminal of an adjacent slave device. Furthermore, the slave device includes a through-wire for interconnecting at least one terminal of that same device and an adjacent slave device; command reception unit configured to receive the identification command; and ID (identifier) setting unit configured to set the ID of that same device based on the identification command; the positions of the terminals that are interconnected with the adjacent slave devices differing in each slave device, so that, in each slave device, the slave device command reception unit receive an identification command having a modified value as a result of transiting through-wires that are connected at differing positions in each slave device.

摘要翻译： 公开了一种容易制造的堆叠式装置，同时识别堆叠在堆叠装置中的多个装置。 堆叠式装置包括多个从装置的堆叠和具有相同端子装置的主装置。 这里，主设备包括命令传输单元，其被配置为向相邻从设备的终端输入识别命令。 此外，从设备包括用于互连同一设备的至少一个终端和相邻从设备的通线; 命令接收单元，被配置为接收所述识别命令; ID（识别符）设定部，其基于所述识别命令来设定同一设备的ID; 与相邻从设备互连的终端的位置在每个从设备中不同，从而在每个从设备中，从设备命令接收单元接收作为转接通线的结果具有修改值的标识命令， 被连接在每个从设备中的不同位置。

公开(公告)号：US20050199420A1

公开(公告)日：2005-09-15

申请号：US11075578

申请日：2005-03-08

申请人： Yukihiro Ishimaru ,  Seiichi Nakatani ,  Yoshiyuki Saito

发明人： Yukihiro Ishimaru ,  Seiichi Nakatani ,  Yoshiyuki Saito

IPC分类号： H01L21/48 ,  H01L23/14 ,  H05K1/00 ,  H05K1/09 ,  H05K1/16 ,  H05K3/00 ,  H05K3/10 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K3/4038 ,  H05K1/167 ,  H05K3/105 ,  H05K3/4644 ,  H05K2201/0326 ,  H05K2203/107 ,  H05K2203/171 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

摘要： In a circuit board according to the present invention, on a substrate, in at least a portion of a phase change layer including a phase change material that is capable of changing alternately between an electrically insulating state and an electrically conductive state, a conductive path is formed that has been put into an electrically conductive state by a phase change in the phase change layer, wherein the phase change material includes a chalcogenide semiconductor, changes between the electrically insulating state and the electrically conductive state by irradiation of laser light, goes into the electrically conductive state in a crystalline phase, and goes into the electrically insulating state in an amorphous phase. In this way, a conductive path is formed by irradiating laser light onto a phase change layer using phase change in a phase change layer formed from a phase change material that is capable of changing alternately between an electrically insulating state and an electrically conductive state, and therefore very small-dimension minute vias and conductors can be formed. Furthermore, subsequent repair, rework, or trimming also is easy.

摘要翻译： 在根据本发明的电路板中，在基板上，在包括能够在电绝缘状态和导电状态之间交替变化的相变材料的相变层的至少一部分中，导电路径为 形成为通过相变层中的相变而导致导电状态，其中相变材料包括硫族化物半导体，通过激光的照射在电绝缘状态和导电状态之间的变化进入 在结晶相中导电状态，并且在非晶相中进入电绝缘状态。 以这种方式，通过使用在能够在电绝缘状态和导电状态之间交替变化的相变材料形成的相变层中的相变来将激光照射到相变层上形成导电路径，以及 因此可以形成非常小尺寸的微通孔和导体。 此外，随后的修理，返修或修整也很容易。

公开(公告)号：US06812741B2

公开(公告)日：2004-11-02

申请号：US10394677

申请日：2003-03-21

申请人： Osamu Shibata ,  Yoshiyuki Saito ,  Yukihiro Fukumoto

发明人： Osamu Shibata ,  Yoshiyuki Saito ,  Yukihiro Fukumoto

IPC分类号： H03K190175

CPC分类号： H04L25/0292 ,  G06F13/4086 ,  H04L5/16 ,  H04L25/0278 ,  H04L25/028

摘要： A bidirectional transmission circuit for inputting/outputting a signal from/onto a bidirectional transmission line includes: a transceiver for transmitting/receiving a signal; a first element having an impedance; a second element being a short line; and a switching unit for coupling the transceiver to the bidirectional transmission line via the first element when the transceiver transmits a signal, and coupling the transceiver to the bidirectional transmission line via the second element when the transceiver receives a signal.

摘要翻译： 用于从双向传输线路输入/输出信号的双向传输电路包括：用于发送/接收信号的收发器; 具有阻抗的第一元件; 第二个元素是短线; 以及切换单元，用于当收发器发送信号时，经由第一元件将收发器耦合到双向传输线，并且当收发器接收到信号时，将收发器经由第二元件耦合到双向传输线。