公开(公告)号：US06378756B1

公开(公告)日：2002-04-30

申请号：US09593385

申请日：2000-06-14

申请人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： B23K3102

CPC分类号： B23K35/0244 ,  B23K3/0623 ,  B23K2101/40 ,  H01L21/4853 ,  H01L24/11 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3478 ,  H05K2201/0116 ,  H05K2203/041 ,  H05K2203/082

摘要： A solder ball arrangement device has a thin arrangement plate having a plurality of through-holes of a truncated pyramid shape, a porous member bonded to the arrangement plate, and a housing member for receiving the arrangement plate and the porous member for defining an air space inside the housing member. A suction pump is provided to evacuate the air space and to receive an array of solder balls in the through-holes by suction. The through-holes are formed by etching, and the porous member reinforces the thin arrangement plate.

摘要翻译： 焊球配置装置具有薄排列板，其具有多个截锥形通孔，接合到排列板的多孔构件，以及用于容纳布置板的壳体构件和用于限定空间的多孔构件 在壳体内。 提供抽吸泵以抽空空气空间并通过抽吸在通孔中容纳焊球阵列。 通孔是通过蚀刻形成的，并且多孔构件加强了薄排列板。

公开(公告)号：US5793117A

公开(公告)日：1998-08-11

申请号：US684617

申请日：1996-07-22

申请人： Yuzo Shimada ,  Naoji Senba ,  Nobuaki Takahashi

发明人： Yuzo Shimada ,  Naoji Senba ,  Nobuaki Takahashi

IPC分类号： G01R1/06 ,  G01R1/073 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L29/41 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： G01R1/07314 ,  G01R31/2886 ,  H01L24/19 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351

摘要： The invention provides a semiconductor device including a semiconductor substrate formed thereon with at least one recessed portion, an electrically conductive layer covering at least a surface of the recessed portion therewith, and a ball-bump formed on the electrically conductive layer within the recessed portion. The semiconductor device can act as a probe card by additionally having a tester device formed in the semiconductor substrate and provided with a function of testing electrical performances of a semiconductor device. Since the recessed portion can be formed by lithography technique, it is possible to arrange the greater number of pins in a smaller pitch, and in addition, it is also possible to locate ball-bumps in place with higher accuracy than a conventional semiconductor device.

摘要翻译： 本发明提供了一种半导体器件，其包括在其上形成有至少一个凹部的半导体衬底，至少覆盖其凹部的表面的导电层，以及形成在凹部内的导电层上的球凸点。 半导体器件可以通过另外具有形成在半导体衬底中的测试器器件并且具有测试半导体器件的电性能的功能而用作探针卡。 由于可以通过光刻技术形成凹部，因此可以以更小的间距布置更多数量的销，另外也可以比现有的半导体装置更高精度地定位球形凸块。

公开(公告)号：US06422452B1

公开(公告)日：2002-07-23

申请号：US09768837

申请日：2001-01-25

申请人： Takumi Yamamoto ,  Kazuhiko Futakami ,  Akira Hatase ,  Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Takumi Yamamoto ,  Kazuhiko Futakami ,  Akira Hatase ,  Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： B23K100

摘要： An apparatus for lining up micro-balls in accordance with the present invention includes: ball carrying pallets having a plurality of pits for holding the micro-balls, respectively, on its surface, a pallet holder for holding the ball carrying pallets, a lining-up container defining a sealed chamber in association with the pallet holder hermetically fitted thereto, a storing tank for storing liquid carrier in which micro-balls are dispersed, and applying/collecting device for communicating the storing tank with the lining-up container via a passage to supply the micro-balls together with the liquid carrier from the storing tank to the sealed chamber and return the surplus micro-balls together with the liquid carrier from the sealed chamber to the storing tank.

公开(公告)号：US6095398A

公开(公告)日：2000-08-01

申请号：US88069

申请日：1998-06-01

申请人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： H05K13/02 ,  B23K3/06 ,  B23K35/02 ,  H01L21/48 ,  H01L21/60 ,  H05K3/34 ,  B23K1/00 ,  B23K35/12

CPC分类号： B23K35/0244 ,  B23K3/0623 ,  H01L21/4853 ,  H01L24/11 ,  H05K3/3478 ,  B23K2201/40 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/0116 ,  H05K2203/041 ,  H05K2203/082

摘要： A solder ball arrangement device has a thin arrangement plate having a plurality of through-holes of a truncated pyramid shape, a porous member bonded to the arrangement plate, and a housing member for receiving the arrangement plate and the porous member for defining an air space inside the housing member. A suction pump is provided to evacuate the air space and to receive an array of solder balls in the through-holes by suction. The through-holes are formed by etching, and the porous member reinforces the thin arrangement plate.

公开(公告)号：US6096259A

公开(公告)日：2000-08-01

申请号：US925724

申请日：1997-09-09

申请人： Nobuaki Takahashi ,  Koji Soejima ,  Naoji Senba ,  Yuzo Shimada

发明人： Nobuaki Takahashi ,  Koji Soejima ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： B29C33/12 ,  B29L31/36 ,  H01L23/50 ,  H01R43/24 ,  B29C70/72

CPC分类号： H01R43/24 ,  H01L2924/0002

摘要： A fabrication method of a plastic-molded lead component is provided, in which leads are aligned at a fine pitch of approximately 100 .mu.m or less with a high accuracy, a simplified process sequence, and a low cost. First, a template having opened V-grooves is prepared. The V-grooves extend along a straight line and are aligned in parallel at a fixed pitch. Second, wire pieces are placed in the respective grooves of the template. Third, the placed pieces of the wire pieces are aligned in parallel on the template at a same pitch as that of the grooves. Fourth, a molding compound is supplied onto the template with or without the use of a mold to bury the aligned wire pieces placed in the grooves. Fifth, the molding compound supplied onto the template is cured to form an encapsulation plastic on the template. The wire pieces placed in the grooves are encapsulated by the encapsulation plastic in such a way that both ends of the wire pieces are exposed from opposite sides of the encapsulation plastic. The encapsulated wire pieces serve as leads. Finally, the template is removed from tie encapsulated wire pieces and the encapsulation plastic. The template is preferably formed by a semiconductor material such as silicon.

摘要翻译： 提供了一种塑料成型引线部件的制造方法，其中以高精度，简化的工艺顺序和低成本，以大约100μm或更小的精细间距排列引线。 首先，制备具有开口V形槽的模板。 V形槽沿着直线延伸并且以固定间距平行对准。 第二，将线材放置在模板的相应凹槽中。 第三，放置的线片件在模板上以与凹槽相同的间距平行排列。 第四，使用或不使用模具将模塑料供应到模板上以埋置放置在凹槽中的对准的线材。 第五，提供给模板的模塑料被固化以在模板上形成封装塑料。 放置在凹槽中的线材由封装塑料封装，使得线片的两端从封装塑料的相对侧露出。 封装的线件用作引线。 最后，将模板从封装的线材和封装塑料中取出。 模板优选由硅等半导体材料形成。

公开(公告)号：US5976965A

公开(公告)日：1999-11-02

申请号：US98528

申请日：1998-06-17

申请人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： H01L21/60 ,  H01L21/48 ,  H01L23/12 ,  H05K3/34 ,  H01L21/607

CPC分类号： H05K3/3478 ,  H01L21/4853 ,  H01L2224/11003 ,  H05K2203/0113 ,  H05K2203/016 ,  H05K2203/0292 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/0776

摘要： A method for arranging metallic balls to form an array of bump electrodes comprises the steps of immersing a silicon template in ethanol dropping metallic balls through the ethanol onto the template to receive the metallic balls in the holes of the template. The metallic balls are free from cohesion caused by electrostatic charge or moisture. The template may be inclined in the ethanol. The holes are formed by anisotropic etching a silicon plate.

摘要翻译： 一种用于布置金属球以形成凸起电极阵列的方法包括以下步骤：将硅模板浸入乙醇中的乙醇滴入金属球到模板上以接收模板孔中的金属球。 金属球没有由静电荷或水分引起的内聚力。 模板可能在乙醇中倾斜。 孔通过各向异性蚀刻硅板形成。

公开(公告)号：US5936845A

公开(公告)日：1999-08-10

申请号：US880390

申请日：1997-06-23

申请人： Koji Soejima ,  Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Koji Soejima ,  Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： G01R31/26 ,  G01R1/06 ,  G01R1/073 ,  G01R31/28 ,  H01L21/56 ,  H01L21/60 ,  H01L21/66 ,  H01L23/12 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01R9/00 ,  H01L23/48 ,  G01R31/02 ,  H05K7/02

CPC分类号： H01L23/49827 ,  G01R31/2886 ,  H01L21/563 ,  H01L23/13 ,  H01L23/49811 ,  H01L24/81 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01044 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181

摘要： An IC package includes an IC chip substrate having a first surface on which a plurality of electrodes are formed, and an organic substrate having a first surface on which a plurality of bump electrodes are provided. The organic substrate is combined with the IC chip substrate. Each of the bump electrodes is in contact with a corresponding one of the electrodes on the IC chip substrate. The organic substrate has a plurality of through holes and metallization patterns electrically connecting each of the bump electrodes to a corresponding one of the through holes.

摘要翻译： IC封装包括具有形成有多个电极的第一表面的IC芯片基板和具有设置多个凸起电极的第一表面的有机基板。 有机基板与IC芯片基板结合。 每个凸块电极与IC芯片基板上相应的一个电极接触。 有机基板具有将每个凸起电极与对应的一个通孔电连接的多个通孔和金属化图案。

公开(公告)号：US5973392A

公开(公告)日：1999-10-26

申请号：US33674

申请日：1998-03-03

申请人： Naoji Senba ,  Yuzo Shimada ,  Ikusi Morizaki ,  Hideki Kusamitu ,  Makoto Ohtsuka ,  Katsumasa Hashimoto

发明人： Naoji Senba ,  Yuzo Shimada ,  Ikusi Morizaki ,  Hideki Kusamitu ,  Makoto Ohtsuka ,  Katsumasa Hashimoto

IPC分类号： H01L25/18 ,  G11C5/00 ,  H01L25/065 ,  H01L25/07 ,  H01L27/10 ,  H05K7/02 ,  H01L27/14 ,  H01L23/34 ,  H01L27/00 ,  H05K7/20

CPC分类号： H01L25/0657 ,  H01L25/0652 ,  H05K7/023 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/15331

摘要： A three-dimensional memory module includes a plurality of semiconductor device units, every adjacent two of which are stack-connected via through-holes by a bump connecting method. Each of the plurality of semiconductor device units includes a carrier having a circuit pattern and the through-holes connected to the circuit pattern. The semiconductor device unit also includes at least one semiconductor memory chip mounted on the carrier such that the semiconductor memory chip is connected to the circuit pattern, and at least one chip select semiconductor chip mounted on the carrier to be connected to the circuit pattern such that the chip select semiconductor chip can select the semiconductor memory chip.

摘要翻译： 三维存储模块包括多个半导体器件单元，每个相邻的两个半导体器件单元通过凸点连接方法通过通孔堆叠连接。 多个半导体器件单元中的每一个包括具有电路图案的载体和连接到电路图案的通孔。 半导体器件单元还包括安装在载体上的至少一个半导体存储器芯片，使得半导体存储器芯片连接到电路图案，以及安装在载体上的至少一个芯片选择半导体芯片以连接到电路图案，使得 芯片选择半导体芯片可以选择半导体存储芯片。

公开(公告)号：US06188127B1

公开(公告)日：2001-02-13

申请号：US08604115

申请日：1996-02-20

申请人： Naoji Senba ,  Yuzo Shimada ,  Kazuaki Utsumi ,  Kenichi Tokuno ,  Ikushi Morizaki ,  Akihiro Dohya ,  Manabu Bonkohara

发明人： Naoji Senba ,  Yuzo Shimada ,  Kazuaki Utsumi ,  Kenichi Tokuno ,  Ikushi Morizaki ,  Akihiro Dohya ,  Manabu Bonkohara

IPC分类号： H01L2302

CPC分类号： H01L24/28 ,  H01L21/563 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00012

摘要： In a semiconductor package stack module, an LSI (Large Scale Integrated circuit) is mounted, via fine bumps, on a ceramic carrier substrate or a flexible carrier film on which wiring conductors are formed. After a seal resin has been injected, the chip is thinned by, e.g., grinding. A plurality of such carrier substrates or carrier films are connected to each other by bumps via through holes which are electrically connected to the wiring conductors, thereby completing a tridimensional stack module. The module achieves a miniature, thin, dense, low cost, and reliable structure without resorting to a wire bonding system or a TAB (Tape Automated Bonding) system. In addition, the module has a minimum of wiring length and a desirable electric characteristic.

摘要翻译： 在半导体封装堆叠模块中，通过微小的凸块将LSI（大规模集成电路）安装在陶瓷载体基板或形成布线导体的柔性载体膜上。 在注入密封树脂之后，通过例如研磨使芯片变薄。 多个这样的载体基板或载体膜通过与导线导电连接的通孔而由凸块彼此连接，从而完成三维叠层模块。 该模块实现了微型，薄型，致密，低成本和可靠的结构，而不需要使用引线接合系统或TAB（磁带自动接合）系统。 此外，该模块具有最小的布线长度和期望的电特性。

公开(公告)号：US06486540B2

公开(公告)日：2002-11-26

申请号：US09829945

申请日：2001-04-11

申请人： Naoji Senba ,  Takao Yamazaki ,  Yuzo Shimada

发明人： Naoji Senba ,  Takao Yamazaki ,  Yuzo Shimada

IPC分类号： H01L2302

CPC分类号： H01L23/34 ,  H01L25/0652 ,  H01L2924/0002 ,  H01L2924/00

摘要： A three-dimensional semiconductor device includes a cylindrical heat sink, wherein a CPU is provided on a substantially center of an inner bottom surface of the cylindrical heat sink, semiconductor chips are respectively mounted on an outer peripheral surface and an inner peripheral surface of the cylindrical heat sink, and the CPU is connected to an upper heat sink.

摘要翻译： 三维半导体器件包括圆柱形散热器，其中CPU设置在圆柱形散热器的内底表面的大致中心上，半导体芯片分别安装在圆柱形散热器的外周表面和圆柱形 散热器，CPU连接到上部散热器。