公开(公告)号：US06798070B2

公开(公告)日：2004-09-28

申请号：US09730849

申请日：2000-12-07

申请人： Takuo Funaya ,  Tadanori Shimoto ,  Naoji Senba ,  Koji Matsui

发明人： Takuo Funaya ,  Tadanori Shimoto ,  Naoji Senba ,  Koji Matsui

IPC分类号： H01L2348

CPC分类号： H05K3/284 ,  H01L21/563 ,  H01L23/49811 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/162 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： An electronic device assembly for dense mounting of electronic devices and method of connecting the electronic devices are disclosed. Conductive portions implemented by metal bumps and sealing portions implemented by adhesive seal resin are connected by thermocompression at the same time between two electronic devices. This may be repeated between three or more electronic device.

摘要翻译： 公开了一种用于密集安装电子设备的电子设备组件和连接电子设备的方法。 由金属凸块实现的导电部分和由粘合密封树脂实现的密封部分在两个电子器件之间同时通过热压连接。 这可以在三个或更多个电子设备之间重复。

公开(公告)号：US5973392A

公开(公告)日：1999-10-26

申请号：US33674

申请日：1998-03-03

申请人： Naoji Senba ,  Yuzo Shimada ,  Ikusi Morizaki ,  Hideki Kusamitu ,  Makoto Ohtsuka ,  Katsumasa Hashimoto

发明人： Naoji Senba ,  Yuzo Shimada ,  Ikusi Morizaki ,  Hideki Kusamitu ,  Makoto Ohtsuka ,  Katsumasa Hashimoto

IPC分类号： H01L25/18 ,  G11C5/00 ,  H01L25/065 ,  H01L25/07 ,  H01L27/10 ,  H05K7/02 ,  H01L27/14 ,  H01L23/34 ,  H01L27/00 ,  H05K7/20

CPC分类号： H01L25/0657 ,  H01L25/0652 ,  H05K7/023 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/15331

摘要： A three-dimensional memory module includes a plurality of semiconductor device units, every adjacent two of which are stack-connected via through-holes by a bump connecting method. Each of the plurality of semiconductor device units includes a carrier having a circuit pattern and the through-holes connected to the circuit pattern. The semiconductor device unit also includes at least one semiconductor memory chip mounted on the carrier such that the semiconductor memory chip is connected to the circuit pattern, and at least one chip select semiconductor chip mounted on the carrier to be connected to the circuit pattern such that the chip select semiconductor chip can select the semiconductor memory chip.

摘要翻译： 三维存储模块包括多个半导体器件单元，每个相邻的两个半导体器件单元通过凸点连接方法通过通孔堆叠连接。 多个半导体器件单元中的每一个包括具有电路图案的载体和连接到电路图案的通孔。 半导体器件单元还包括安装在载体上的至少一个半导体存储器芯片，使得半导体存储器芯片连接到电路图案，以及安装在载体上的至少一个芯片选择半导体芯片以连接到电路图案，使得 芯片选择半导体芯片可以选择半导体存储芯片。

公开(公告)号：US5600180A

公开(公告)日：1997-02-04

申请号：US505152

申请日：1995-07-21

申请人： Teruo Kusaka ,  Naoji Senba ,  Atsushi Nishizawa ,  Nobuaki Takahashi

发明人： Teruo Kusaka ,  Naoji Senba ,  Atsushi Nishizawa ,  Nobuaki Takahashi

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H01L23/48

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/31 ,  H01L24/83 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29355 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/81903 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/83851 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/1579

摘要： A sealing structure for bumps on a semiconductor integrated circuit chip to be bonded through the bumps onto a circuit board is provided wherein a plurality of pads are formed on the semiconductor integrated circuit chip. Each of the pads is formed with a bump thereon. A coating material is provided to coat at least surfaces of the above a plurality of bumps. The material is made of an insulation material having a hardness sufficiently small for showing, when bonding the chip onto the circuit board, a deformation thereby at least a top portion of each of the bumps is made contact with pads provided on the circuit board.

摘要翻译： 在半导体集成电路芯片上形成有用于通过凸块与电路板接合的半导体集成电路芯片上的凸块的密封结构，其中多个焊盘形成在半导体集成电路芯片上。 每个垫在其上形成有凸块。 提供涂覆材料以涂覆上述多个凸块的至少表面。 该材料由具有足够小的硬度的绝缘材料制成，用于在将芯片接合到电路板上时形成变形，从而使每个凸块的至少顶部与设置在电路板上的焊盘接触。

公开(公告)号：US06625883B2

公开(公告)日：2003-09-30

申请号：US09837423

申请日：2001-04-19

申请人： Koji Soejima ,  Naoji Senba

发明人： Koji Soejima ,  Naoji Senba

IPC分类号： H01R900

CPC分类号： H01L24/12 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1111 ,  H01L2224/13011 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/20 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10257 ,  H05K2201/10378 ,  H05K2203/0113 ,  H05K2203/0338 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/05442 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

摘要： Disclosed is a bump structure, which has a hollow body, for electrically connecting a first member and a second member. Also disclosed is a method for making a bump structure, which has the steps of: preparing a molding plate with a concave mold to mold a bump-forming member; forming a conductive thin film so as to form a predetermined cavity in the concave mold of the molding plate; preparing a substrate to which the conductive thin film is to be transferred; and transferring the conductive thin film formed on the molding plate to the substrate.

摘要翻译： 公开了一种凸块结构，其具有中空体，用于电连接第一构件和第二构件。 还公开了一种制造凸块结构的方法，其具有以下步骤：制备具有凹模的模制板以模制凸块形成构件; 形成导电薄膜，以在模板的凹模中形成预定的空腔; 准备要传输导电薄膜的基板; 以及将形成在所述成型板上的导电性薄膜转移到所述基板。

公开(公告)号：US06191482B1

公开(公告)日：2001-02-20

申请号：US09062657

申请日：1998-04-20

申请人： Naoji Senba ,  Nobuaki Takahashi

发明人： Naoji Senba ,  Nobuaki Takahashi

IPC分类号： H01L2348

CPC分类号： H01L23/49838 ,  H01L21/563 ,  H01L23/49822 ,  H01L23/5382 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15331 ,  H01L2924/00

摘要： A semiconductor chip is mounted on a semiconductor chip carrier through a flip chip bonding technique; the semiconductor chip carrier includes an insulating layer such as synthetic resin having a mounting area assigned to the semiconductor chip and a conductive pattern having pads bonded to bumps of the semiconductor chip, and only the pads are formed in the mounting area so that melted synthetic resin smoothly flows into the gaps between the insulating synthetic resin layer and the semiconductor chip.

摘要翻译： 通过倒装芯片接合技术将半导体芯片安装在半导体芯片载体上; 半导体芯片载体包括具有分配给半导体芯片的安装区域的合成树脂的绝缘层和具有焊接到半导体芯片的凸块的焊盘的导电图案，并且在安装区域中仅形成焊盘，使得熔融的合成树脂 平滑地流入绝缘合成树脂层和半导体芯片之间的间隙。

公开(公告)号：US5793117A

公开(公告)日：1998-08-11

申请号：US684617

申请日：1996-07-22

申请人： Yuzo Shimada ,  Naoji Senba ,  Nobuaki Takahashi

发明人： Yuzo Shimada ,  Naoji Senba ,  Nobuaki Takahashi

IPC分类号： G01R1/06 ,  G01R1/073 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L29/41 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： G01R1/07314 ,  G01R31/2886 ,  H01L24/19 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351

摘要： The invention provides a semiconductor device including a semiconductor substrate formed thereon with at least one recessed portion, an electrically conductive layer covering at least a surface of the recessed portion therewith, and a ball-bump formed on the electrically conductive layer within the recessed portion. The semiconductor device can act as a probe card by additionally having a tester device formed in the semiconductor substrate and provided with a function of testing electrical performances of a semiconductor device. Since the recessed portion can be formed by lithography technique, it is possible to arrange the greater number of pins in a smaller pitch, and in addition, it is also possible to locate ball-bumps in place with higher accuracy than a conventional semiconductor device.

摘要翻译： 本发明提供了一种半导体器件，其包括在其上形成有至少一个凹部的半导体衬底，至少覆盖其凹部的表面的导电层，以及形成在凹部内的导电层上的球凸点。 半导体器件可以通过另外具有形成在半导体衬底中的测试器器件并且具有测试半导体器件的电性能的功能而用作探针卡。 由于可以通过光刻技术形成凹部，因此可以以更小的间距布置更多数量的销，另外也可以比现有的半导体装置更高精度地定位球形凸块。

公开(公告)号：US06378756B1

公开(公告)日：2002-04-30

申请号：US09593385

申请日：2000-06-14

申请人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： B23K3102

CPC分类号： B23K35/0244 ,  B23K3/0623 ,  B23K2101/40 ,  H01L21/4853 ,  H01L24/11 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3478 ,  H05K2201/0116 ,  H05K2203/041 ,  H05K2203/082

摘要： A solder ball arrangement device has a thin arrangement plate having a plurality of through-holes of a truncated pyramid shape, a porous member bonded to the arrangement plate, and a housing member for receiving the arrangement plate and the porous member for defining an air space inside the housing member. A suction pump is provided to evacuate the air space and to receive an array of solder balls in the through-holes by suction. The through-holes are formed by etching, and the porous member reinforces the thin arrangement plate.

摘要翻译： 焊球配置装置具有薄排列板，其具有多个截锥形通孔，接合到排列板的多孔构件，以及用于容纳布置板的壳体构件和用于限定空间的多孔构件 在壳体内。 提供抽吸泵以抽空空气空间并通过抽吸在通孔中容纳焊球阵列。 通孔是通过蚀刻形成的，并且多孔构件加强了薄排列板。

公开(公告)号：US06194787B1

公开(公告)日：2001-02-27

申请号：US08833159

申请日：1997-04-04

申请人： Naoji Senba ,  Kazuyuki Mikubo

发明人： Naoji Senba ,  Kazuyuki Mikubo

IPC分类号： H01L2348

CPC分类号： H01L23/5382 ,  H01L23/538 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0286 ,  H05K1/11 ,  H01L2924/00

摘要： The present invention adopts a circuit pattern in which in a carrier of a package for coupling semiconductor devices at multistage, drawing out lines for selecting individual semiconductor devices are coupled in parallel. Thus, the present invention achieves the multistage coupling semiconductor device which can be completed with a circuit pattern of one kind regardless of the number of stages of a multistage. Using the carrier having the foregoing structure, the semiconductor device is assembled and is subjected to characteristic inspections. Thereafter, the circuit patterns, coupled in parallel, having good electrical characteristics are partially cut by either laser, sand-blast, or etching. The products can be specified according to the circuit pattern which is cut.

摘要翻译： 本发明采用电路图案，其中在用于多级耦合半导体器件的封装的载体中，并联耦合用于选择各个半导体器件的线。 因此，本发明实现了可以用一种电路图案完成的多级耦合半导体器件，而不管多级的级数如何。 使用具有上述结构的载体，组装半导体器件并进行特性检查。 此后，具有良好电特性的并联耦合的电路图案被激光，喷砂或蚀刻部分切割。 产品可以根据切割的电路图案来指定。

公开(公告)号：US5310965A

公开(公告)日：1994-05-10

申请号：US936300

申请日：1992-08-28

申请人： Naoji Senba ,  Atsushi Nishizawa

发明人： Naoji Senba ,  Atsushi Nishizawa

IPC分类号： H01L23/057 ,  H01L23/13 ,  H01L23/498 ,  H05K1/00

CPC分类号： H01L23/49866 ,  H01L23/057 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49894 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49109 ,  H01L2224/85444 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/19107

摘要： To perform a stable wire bonding connecting against a multi-level wiring board using an organic material for the interlayer insulating film, a silicon oxide film and organic interlayer insulating films, for example, polyimide layers, and the first to the fourth level wirings, including a nickel layer by plating are formed on the surface of the silicon substrate as a base in order. By adjusting the thickness of the nickel layer in the wiring, the total Vickers hardness from the substrate to each wiring is adjusted to more than 100, respectively.

摘要翻译： 为了使用层间绝缘膜的有机材料，与氧化硅膜和有机层间绝缘膜（例如聚酰亚胺层）和第一至第四层布线来实现与多层布线板连接的稳定的引线键合，包括 在硅衬底的表面上依次形成镀层的镍层作为基底。 通过调整布线中镍层的厚度，从基板到各布线的维氏硬度总和分别调整到100以上。

公开(公告)号：US06422452B1

公开(公告)日：2002-07-23

申请号：US09768837

申请日：2001-01-25

申请人： Takumi Yamamoto ,  Kazuhiko Futakami ,  Akira Hatase ,  Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

发明人： Takumi Yamamoto ,  Kazuhiko Futakami ,  Akira Hatase ,  Nobuaki Takahashi ,  Naoji Senba ,  Yuzo Shimada

IPC分类号： B23K100

摘要： An apparatus for lining up micro-balls in accordance with the present invention includes: ball carrying pallets having a plurality of pits for holding the micro-balls, respectively, on its surface, a pallet holder for holding the ball carrying pallets, a lining-up container defining a sealed chamber in association with the pallet holder hermetically fitted thereto, a storing tank for storing liquid carrier in which micro-balls are dispersed, and applying/collecting device for communicating the storing tank with the lining-up container via a passage to supply the micro-balls together with the liquid carrier from the storing tank to the sealed chamber and return the surplus micro-balls together with the liquid carrier from the sealed chamber to the storing tank.