公开(公告)号：US06486540B2

公开(公告)日：2002-11-26

申请号：US09829945

申请日：2001-04-11

申请人： Naoji Senba ,  Takao Yamazaki ,  Yuzo Shimada

发明人： Naoji Senba ,  Takao Yamazaki ,  Yuzo Shimada

IPC分类号： H01L2302

CPC分类号： H01L23/34 ,  H01L25/0652 ,  H01L2924/0002 ,  H01L2924/00

摘要： A three-dimensional semiconductor device includes a cylindrical heat sink, wherein a CPU is provided on a substantially center of an inner bottom surface of the cylindrical heat sink, semiconductor chips are respectively mounted on an outer peripheral surface and an inner peripheral surface of the cylindrical heat sink, and the CPU is connected to an upper heat sink.

摘要翻译： 三维半导体器件包括圆柱形散热器，其中CPU设置在圆柱形散热器的内底表面的大致中心上，半导体芯片分别安装在圆柱形散热器的外周表面和圆柱形 散热器，CPU连接到上部散热器。

公开(公告)号：US06524905B2

公开(公告)日：2003-02-25

申请号：US09903316

申请日：2001-07-11

申请人： Shintaro Yamamichi ,  Toru Mori ,  Akinobu Shibuya ,  Takao Yamazaki ,  Yuzo Shimada

发明人： Shintaro Yamamichi ,  Toru Mori ,  Akinobu Shibuya ,  Takao Yamazaki ,  Yuzo Shimada

IPC分类号： H01L218242

CPC分类号： H01L28/40 ,  H01L23/5223 ,  H01L24/05 ,  H01L27/0688 ,  H01L2221/68363 ,  H01L2224/04042 ,  H01L2224/4847 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00

摘要： A semiconductor device provided with a thin film capacitor having a small equivalent series inductance is provided, which can be operated at a high frequency range and contributes to size reduction of the electronic devices. The semiconductor device comprises a device formed on a silicon substrate 1a, interlayer insulating films 3a, 3b, and 3c, wiring blocks including a power source wire block and a ground wire block, and a thin film capacitor 14 formed on an uppermost insulating layer. The thin film capacitor 14 comprises a lower electrode 6 connected to the ground wire block 4e through a contact 5d, an upper electrode 8 which is connected to the power source wire block 4d through a contact 5d, and which extends above the lower electrode 6, and a dielectric layer 7 which is inserted between the lower and the upper electrodes.

摘要翻译： 提供了具有小等效串联电感的薄膜电容器的半导体器件，其可以在高频范围下操作并且有助于电子器件的尺寸减小。 半导体器件包括形成在硅衬底1a，层间绝缘膜3a，3b和3c上的器件，包括电源线块和接地线块的布线块，以及形成在最上层绝缘层上的薄膜电容器14。 薄膜电容器14包括通过接触件5d连接到接地线块4e的下电极6，通过接触件5d连接到电源线块4d并且在下电极6上方延伸的上电极8， 以及插入在下电极和上电极之间的电介质层7。

公开(公告)号：US06703705B2

公开(公告)日：2004-03-09

申请号：US09996054

申请日：2001-11-28

申请人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

发明人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

IPC分类号： H01L2352

CPC分类号： H01L24/81 ,  H01L23/50 ,  H01L23/642 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and adhered to the LSI device via an insulation layer, and decoupling capacitors mounted on one surface of the metal foil leads.

摘要翻译： 半导体器件具有在电路形成面的周边部分设置有多个电源线连接焊盘和接地线连接焊盘的LSI器件，电连接到每个焊盘并粘附到LSI的金属箔引线5 通过绝缘层的器件，以及安装在金属箔引线的一个表面上的去耦电容器。

公开(公告)号：US06515324B2

公开(公告)日：2003-02-04

申请号：US09942817

申请日：2001-08-30

申请人： Akinobu Shibuya ,  Shintaro Yamamichi ,  Toru Mori ,  Takao Yamazaki ,  Yuzo Shimada

发明人： Akinobu Shibuya ,  Shintaro Yamamichi ,  Toru Mori ,  Takao Yamazaki ,  Yuzo Shimada

IPC分类号： H01L27178

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/00

摘要： A capacitor has a lower electrode, a dielectric thin film, an upper electrode, and an insulation cover layer formed on an insulation substrate made of an organic film or a ceramic material, and through holes formed at positions corresponding to input and output pads of a semiconductor element or to input and output terminals of a semiconductor package, with electrodes for connection to input and output pads of a semiconductor element or to input and output terminals of a semiconductor package provided within through holes. In a method for mounting the capacitor, the capacitor is interposed between a flip-chip connected semiconductor element and a mounting substrate.

公开(公告)号：US06949815B2

公开(公告)日：2005-09-27

申请号：US10746603

申请日：2003-12-23

申请人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

发明人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

IPC分类号： H05K3/34 ,  H01L21/60 ,  H01L21/822 ,  H01L23/12 ,  H01L23/50 ,  H01L23/64 ,  H01L27/04 ,  H01L23/52 ,  H01L23/32 ,  H01L23/48 ,  H01G9/05

CPC分类号： H01L24/81 ,  H01L23/50 ,  H01L23/642 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and adhered to the LSI device via an insulation layer, and decoupling capacitors mounted on one surface of the metal foil leads.

摘要翻译： 半导体器件具有在电路形成面的周边部分设置有多个电源线连接焊盘和接地线连接焊盘的LSI器件，电连接到每个焊盘并粘附到LSI的金属箔引线5 通过绝缘层的器件，以及安装在金属箔引线的一个表面上的去耦电容器。

公开(公告)号：US08338940B2

公开(公告)日：2012-12-25

申请号：US12920265

申请日：2009-03-26

申请人： Takao Yamazaki ,  Shinji Watababe ,  Shizuaki Masuda ,  Katsuhiko Suzuki

发明人： Takao Yamazaki ,  Shinji Watababe ,  Shizuaki Masuda ,  Katsuhiko Suzuki

IPC分类号： H05K7/02 ,  H01L23/48

CPC分类号： H01L21/50 ,  H01L23/4985 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06575 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00014

摘要： Provided is a semiconductor device including a flexible circuit board which includes a first external electrode provided on a first face and second and third external electrodes provided on a second face; a plurality of memory devices and passive components; a supporter which is provided with a groove on one face; and a computing processor device. The memory devices and the passive components are connected to the first external electrode, the one face of the supporter is bonded on the first face of the flexible circuit board so that the groove houses the memory devices and the passive components. The flexible circuit board is bent along a perimeter of the supporter to be wrapped around a side face and another face of the supporter. On the flexible circuit board, the second external electrode is provided on the second face which is opposite to the first external electrode, and the third external electrode is provided on the second face which is bent to the another face of the supporter. The computing processor device is connected to the second external electrode, and a bump is formed on the third external electrode.

摘要翻译： 本发明提供一种半导体器件，包括：柔性电路板，包括设置在第一面上的第一外部电极和设置在第二面上的第二和第三外部电极; 多个存储器件和无源部件; 在一个面上设置有凹槽的支撑件; 和计算处理器装置。 存储器件和无源部件连接到第一外部电极，支撑体的一个面接合在柔性电路板的第一面上，使得沟槽容纳存储器件和无源部件。 柔性电路板沿着支撑件的周边弯曲以包裹在支撑件的侧面和另一面。 在柔性电路板上，第二外部电极设置在与第一外部电极相对的第二面上，第三外部电极设置在与支撑体的另一面弯曲的第二面上。 计算处理器装置连接到第二外部电极，并且在第三外部电极上形成凸块。

公开(公告)号：US07928556B2

公开(公告)日：2011-04-19

申请号：US12515437

申请日：2008-09-19

申请人： Takao Yamazaki

发明人： Takao Yamazaki

IPC分类号： H01L21/60

CPC分类号： H01L23/4985 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/5387 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/81001 ,  H01L2224/81011 ,  H01L2224/8112 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83855 ,  H01L2224/8388 ,  H01L2224/92225 ,  H01L2225/1005 ,  H01L2225/107 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3511 ,  H05K1/189 ,  H05K2201/056 ,  H05K2201/10515 ,  H05K2201/10734 ,  H01L2924/07025 ,  H01L2924/00 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/00015 ,  H01L2224/0401

摘要： There is provided a low-cost semiconductor device that commercial and quality-assured (inspected) chip size packages can be stacked and has a small co-planarity value and a high mounting reliability. A semiconductor device in which a flexible circuit substrate is adhered to at least a part of a lateral side of a semiconductor package, and the flexible circuit substrate, which is on a side facing solder balls of the semiconductor package, is folded at a region inside of an edge of the semiconductor package.

摘要翻译： 提供了一种廉价的半导体器件，可以堆叠商业和质量保证（检查）的芯片尺寸封装，并且具有小的共平面度值和高安装可靠性。 一种半导体器件，其中柔性电路基板粘附到半导体封装的横向侧的至少一部分，并且位于半导体封装的焊球侧的柔性电路基板在内部的区域内折叠 的半导体封装的边缘。

公开(公告)号：US20100246144A1

公开(公告)日：2010-09-30

申请号：US12161825

申请日：2007-01-25

申请人： Takao Yamazaki ,  Yoshimichi Sogawa ,  Tomohiro Nishiyama

发明人： Takao Yamazaki ,  Yoshimichi Sogawa ,  Tomohiro Nishiyama

IPC分类号： H05K7/02

CPC分类号： H01L23/13 ,  H01L23/5387 ,  H01L23/5389 ,  H01L23/642 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19105 ,  H01L2224/0401

摘要： The present invention is directed to provide a semiconductor package and the like realizing reduced manufacturing cost and improved reliability by enhancing a ground line and/or a power supply line. A semiconductor package 50 includes: a semiconductor device 1 including a circuit face on which an external electrode is formed; an insertion substrate 2 forming a housing part in which the semiconductor device 1 is disposed; and an interposer substrate 5 including a wiring pattern 7 and whose both ends are bent along the insertion substrate 2. The insertion substrate 2 is made of a conductive material and is electrically connected to a ground line or a power supply line in the wiring pattern 7 in the interposer substrate 5.

摘要翻译： 本发明旨在提供一种通过增强接地线和/或电源线来实现降低制造成本和提高可靠性的半导体封装等。 半导体封装50包括：半导体器件1，其包括形成有外部电极的电路面; 形成半导体装置1的壳体部的插入基板2; 以及包括布线图案7并且其两端沿着插入基板2弯曲的插入基板5.插入基板2由导电材料制成并且电连接到布线图案7中的接地线或电源线 在内插基片5中。

公开(公告)号：US20070210400A1

公开(公告)日：2007-09-13

申请号：US11708142

申请日：2007-02-20

申请人： Shigeru Moribayashi ,  Yoshiaki Morishita ,  Kowashi Taketomi ,  Takao Yamazaki ,  Shinji Watanabe ,  Ichiro Hatakeyama

发明人： Shigeru Moribayashi ,  Yoshiaki Morishita ,  Kowashi Taketomi ,  Takao Yamazaki ,  Shinji Watanabe ,  Ichiro Hatakeyama

IPC分类号： H01L31/00

CPC分类号： G02B6/4249 ,  G02B6/4214 ,  G02B6/4232 ,  G02B6/425 ,  G02B6/4292 ,  G02B6/43 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12032 ,  H01S5/02248 ,  H01S5/02272 ,  H01S5/02276 ,  H01S5/02284 ,  H01S5/02292 ,  H01S5/183 ,  H01L2924/00

摘要： In an optical unit including a photoelectric conversion chip adapted to be optically connected to an optical fiber, and a semiconductor chip for driving the photoelectric conversion chip, both the photoelectric conversion chip and the semiconductor chip are wrapped with a flexible sheet, to thereby produce an enveloper enveloping the photoelectric conversion chip and the semiconductor chip therein. At least a part of the enveloper is formed as a transparent area for allowing an optical connection between the optical fiber and the photoelectric conversion chip.

摘要翻译： 在包括适于与光纤光学连接的光电转换芯片的光学单元和用于驱动光电转换芯片的半导体芯片中，光电转换芯片和半导体芯片都用柔性片包裹，从而产生 封装光电转换芯片和其中的半导体芯片。 至少一部分加热器形成为允许光纤和光电转换芯片之间的光学连接的透明区域。

公开(公告)号：US20120106085A1

公开(公告)日：2012-05-03

申请号：US13148524

申请日：2010-01-27

申请人： Takao Yamazaki ,  Masahiko Sano ,  Seiji Kurashina

发明人： Takao Yamazaki ,  Masahiko Sano ,  Seiji Kurashina

IPC分类号： H05K7/20 ,  H05K7/10

CPC分类号： H05K5/066 ,  G01J5/029 ,  G01J5/045 ,  H01L23/057 ,  H01L23/10 ,  H01L23/26 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： A vacuum sealed package includes a package main body portion in which a first main body portion and a second main body portion are bonded via a hollow portion, and a getter material and an electronic device that are provided within the hollow portion, and in the state of the hollow portion being evacuated via a through-hole that brings the inside and the outside of the hollow portion into communication, the package main body portion is sealed with a sealing member, the getter material and the electronic device are connected to a first conductor pad and a second conductor pad, the first conductor pad is connected with a third conductor pad via a thermally conductive material, and the second conductor pad is electrically connected with a fourth conductor pad on a wiring substrate.

摘要翻译： 真空密封包装体包括：封装体主体部分，其中第一主体部分和第二主体部分经由中空部分接合;以及吸气材料和电子装置，其设置在中空部分内，并且处于该状态 通过使中空部的内部和外部连通的通孔而使空心部抽真空，将封装主体部用密封部件密封，吸气材料和电子装置与第一导体 焊盘和第二导体焊盘，第一导体焊盘通过导热材料与第三导体焊盘连接，并且第二导体焊盘与布线基板上的第四导体焊盘电连接。