公开(公告)号：EP3041592A1

公开(公告)日：2016-07-13

申请号：EP14841564.9

申请日：2014-09-03

Applicant: Brixo Smart Toys Ltd.

Inventor： ALMOG, Boaz ,  SARAF, Amir

IPC: A63H33/04 ,  H05K3/00

CPC classification number: A63H33/042 ,  A63H33/086 ,  H05K1/0284 ,  H05K1/119 ,  H05K3/326 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2201/0999 ,  H05K2201/209

Abstract: The present invention relates to a selectively conductive toy building element, comprising: a body adapted for releasable engagement to at least one other toy building element body or to a corresponding baseplate, the body including at least one conductive portion having at least one contact area adapted to generate pressure on a conductive portion or contact area of an adjacent toy building element body, in such a way that ensures electrical conduction between said toy building elements in a desired location and direction.

Abstract translation: 本发明涉及一种选择性导电的玩具构建元件，包括：主体，其适于与至少一个其他玩具构建元件主体或相应的底板可释放地接合，所述主体包括至少一个导电部分，所述至少一个导电部分具有适于 以在相邻的玩具构建元件主体的导电部分或接触区域上产生压力，以便确保所述玩具构建元件之间在期望的位置和方向上的电传导。

公开(公告)号：EP3005848A1

公开(公告)日：2016-04-13

申请号：EP14733466.8

申请日：2014-05-29

Applicant: Finisar Corporation

Inventor： SHI, Wei

IPC: H05K3/34 ,  H01L23/00 ,  H05K3/36

CPC classification number: H05K3/363 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49855 ,  H01L2924/0002 ,  H05K3/36 ,  H05K2201/0367 ,  H05K2201/09445 ,  H05K2201/09781 ,  H05K2201/099 ,  H05K2201/2036 ,  H01L2924/00

Abstract: In an example embodiment, a circuit interconnect includes a first printed circuit board (PCB), a second PCB, a spacer, and an electrically conductive solder joint. The first PCB includes a first electrically conductive pad. The second PCB includes a second electrically conductive pad. The spacer is configured to position the first PCB relative to the second PCB such that a space remains between the first PCB and the second PCB after the first electrically conductive pad and the second electrically conductive pad are conductively connected in a soldering process. The electrically conductive solder joint conductively connects the first electrically conductive pad and the second electrically conductive pad.

Abstract translation: 在示例性实施例中，电路互连包括第一印刷电路板（PCB），第二PCB，间隔物和导电焊接点。 第一PCB包括第一导电焊盘。 第二PCB包括第二导电焊盘。 间隔件配置成相对于第二PCB定位第一PCB，使得在第一导电焊盘和第二导电焊盘在焊接工艺中导电连接之后，第一PCB和第二PCB之间留有空间。 导电焊接点导电连接第一导电焊盘和第二导电焊盘。

公开(公告)号：EP3001784A1

公开(公告)日：2016-03-30

申请号：EP15185821.4

申请日：2015-09-18

Applicant: OCE-Technologies B.V.

Inventor： VAN DEN BERSSELAAR, Hendrikus J.T.M.

IPC: H05K3/46

CPC classification number: H05K1/03 ,  H05K1/0298 ,  H05K3/0085 ,  H05K3/061 ,  H05K3/38 ,  H05K3/462 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09881 ,  H05K2203/013

Abstract: A method of manufacturing a multi-layer printed circuit board by bonding together a plurality of circuit board layers (10) each of which includes a substrate (14) and a conductive circuit pattern (16) on at least one surface of the substrate (14), the method comprising the steps of:
- coating the surface of the substrate (14) with a continuous layer of conductive material (16'),
- masking the layer with a resist (26),
- etching away a part of the conductive material so as to obtain the circuit pattern (16) with conductive parts (18) separated by gaps (20), and
- filling the gaps (20) with an electrically insulating adhesive material (28) to a level that is at least equal to the thickness of the layer of conductive material, characterized in that the resist (26) is left on the conductive parts (18) and the adhesive material (28) is selected to be chemically compatible with the resist (26).

Abstract translation: 一种多层印刷电路板的制造方法，其中，所述多层印刷电路板通过在基板（14）的至少一个表面上将包括基板（14）和导电电路图案（16）的多个电路板层（10） ），所述方法包括以下步骤： - 用导电材料（16'）的连续层涂覆所述衬底（14）的表面， - 用抗蚀剂（26）掩蔽所述层， - 蚀刻所述导电材料的一部分 材料，以便获得具有由间隙（20）分开的导电部分（18）的电路图案（16），以及 - 用电绝缘粘合剂材料（28）将间隙（20）填充到至少等于 导电材料层的厚度，其特征在于，抗蚀剂（26）留在导电部分（18）上，粘合材料（28）被选择为与抗蚀剂（26）化学相容。

公开(公告)号：EP1973158B1

公开(公告)日：2016-03-16

申请号：EP07006090.0

申请日：2007-03-23

Applicant: Delphi International Operations Luxembourg S.à r.l.

Inventor： Wirths, Jochen ,  Kortwig, Carsten ,  Stadler, Peter ,  Stier, Martin

IPC: H01L23/498 ,  H01L23/13

CPC classification number: H01L23/4985 ,  H01L23/13 ,  H01L2924/0002 ,  H05K1/111 ,  H05K1/189 ,  H05K3/321 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/091 ,  H05K2201/10674 ,  H01L2924/00

公开(公告)号：EP2958141A1

公开(公告)日：2015-12-23

申请号：EP14189598.7

申请日：2014-10-20

Applicant: Phoenix Pioneer Technology Co., Ltd.

Inventor： Hsu, Che-Wei ,  Hsu, Shih-Ping

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/295 ,  H01L23/49822 ,  H01L23/49861 ,  H01L23/5383 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/15311 ,  H01L2924/19106 ,  H05K1/0298 ,  H05K1/0326 ,  H05K1/0333 ,  H05K1/115 ,  H05K3/10 ,  H05K3/4007 ,  H05K2201/0367 ,  Y10T29/49149

Abstract: A package apparatus comprises a first conductive wiring layer, a first conductive pillar layer, a dielectric material layer, a second conductive wiring layer, a second conductive pillar layer, and a first molding compound layer. The first conductive wiring layer has a first surface and a second surface opposite to the first surface. The first conductive pillar layer is disposed on the first surface of the first conductive wiring layer, wherein the first conductive wiring layer and the first conductive pillar layer are disposed inside the dielectric material layer. The second conductive wiring layer is disposed on the first conductive pillar layer and the dielectric material layer. The second conductive pillar layer is disposed on the second conductive wiring layer, wherein the second conductive wiring layer and the second conductive pillar layer are disposed inside the first molding compound layer.

Abstract translation: 封装装置包括第一导电布线层，第一导电柱层，介电材料层，第二导电布线层，第二导电柱层和第一模塑料层。 第一导电布线层具有与第一表面相对的第一表面和第二表面。 第一导电柱层设置在第一导电布线层的第一表面上，其中第一导电布线层和第一导电柱层设置在介电材料层的内部。 第二导电布线层设置在第一导电柱层和电介质层上。 第二导电柱层设置在第二导电布线层上，其中第二导电布线层和第二导电柱层位于第一模塑料层内。

公开(公告)号：EP2290590B1

公开(公告)日：2015-03-11

申请号：EP10008397.1

申请日：2010-08-12

Applicant: Giesecke & Devrient GmbH

Inventor： Olbrich, Magnus

IPC: G06K19/077 ,  H01L23/13 ,  H01L23/498 ,  H01L23/52 ,  H05K1/18 ,  H05K3/30 ,  H05K3/32 ,  H05K3/40

CPC classification number: G06K19/07745 ,  G06K19/07749 ,  G06K19/0775 ,  H01L23/13 ,  H01L23/49855 ,  H01L2924/0002 ,  H05K1/183 ,  H05K3/305 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09472 ,  H05K2201/0969 ,  H05K2201/10727 ,  H01L2924/00

公开(公告)号：EP2690941A4

公开(公告)日：2014-09-03

申请号：EP12760032

申请日：2012-03-21

Applicant: MURATA MANUFACTURING CO

Inventor： ITO SATOSHI ,  MORIYA YOICHI ,  KANAMORI TETSUO ,  YAGI YUKIHIRO ,  YAMAMOTO YUKI

IPC: H05K3/46 ,  H01L23/538 ,  H05K1/11 ,  H05K1/18 ,  H05K3/40

CPC classification number: H05K1/0298 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/18 ,  H05K1/0313 ,  H05K1/09 ,  H05K1/181 ,  H05K1/188 ,  H05K3/4007 ,  H05K3/4038 ,  H05K3/4647 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2203/0323 ,  H05K2203/1476

公开(公告)号：EP1792528B1

公开(公告)日：2014-07-16

申请号：EP05802474.6

申请日：2005-09-13

Applicant: OBERTHUR CARD SYSTEMS SA ,  François Charles Oberthur Fiduciaire

Inventor： ENOUF, Guy ,  BORDE, Xavier ,  DEMAIMAY, Florian

IPC: G06K19/077 ,  H01L23/66 ,  H05K3/32 ,  G07D7/00 ,  H01L23/00 ,  H01L23/13

CPC classification number: H01L23/66 ,  G06K19/07745 ,  G07D7/01 ,  H01L23/13 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83138 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01094 ,  H01L2924/10253 ,  H01L2924/15151 ,  H01L2924/18301 ,  H05K3/326 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/1189 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T428/25 ,  Y10T428/2804 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

公开(公告)号：EP2117082A4

公开(公告)日：2012-05-16

申请号：EP06822495

申请日：2006-10-27

Applicant: ASAHI DENKA KENKYUSHO CO LTD

Inventor： MIZOGUCHI MASANORI

IPC: H05K1/14 ,  H01R12/52 ,  H05K3/32 ,  H05K3/36

CPC classification number: H01R12/592 ,  H01R12/58 ,  H01R12/613 ,  H01R12/62 ,  H01R12/777 ,  H01R12/778 ,  H01R12/78 ,  H01R12/79 ,  H05K1/118 ,  H05K3/326 ,  H05K3/365 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09063 ,  H05K2201/091 ,  H05K2201/0969 ,  H05K2201/1059 ,  H05K2201/209

公开(公告)号：EP2307895B1

公开(公告)日：2012-03-14

申请号：EP09757872.8

申请日：2009-06-03

Applicant: Eles Semiconductor Equipment S.P.A.

Inventor： DI LELLO, Stefano

IPC: G01R31/319 ,  G01R31/28 ,  H05K3/32 ,  H05K3/40 ,  H05K3/00

CPC classification number: G01R31/2891 ,  G01R1/0483 ,  G01R3/00 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/10204 ,  H05K2201/10393 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/0108 ,  H05K2203/162

Abstract: A test board (115;115') is proposed for testing electronic devices (105;105'), each one of them having a plurality of terminals (220;220') for electrically contacting the electronic device. The test board includes a support substrate (205;205'). A set of banks of electrically conductive receptacles (210;210') are arranged on the substrate each one for resting a corresponding electronic device; each receptacle (250,255;250',255') is adapted to receive a terminal of the corresponding electronic device. Locking means (225) are further arranged on the substrate for mechanically locking the electronic devices on the test board. The test board further includes assembly means (230-245) for mounting the locking means on the substrate independently of the receptacles.