公开(公告)号：US09041182B2

公开(公告)日：2015-05-26

申请号：US13688823

申请日：2012-11-29

Applicant: Toshihiko Nagano ,  Kazuhide Abe ,  Hiroshi Yamada ,  Kazuhiko Itaya ,  Taihei Nakada

Inventor： Toshihiko Nagano ,  Kazuhide Abe ,  Hiroshi Yamada ,  Kazuhiko Itaya ,  Taihei Nakada

IPC: H01L23/48 ,  H01L21/78 ,  H01L23/055 ,  H01L23/10 ,  H01L23/00 ,  H01L23/66

CPC classification number: H01L23/48 ,  H01L21/78 ,  H01L23/055 ,  H01L23/10 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/13007 ,  H01L2224/13111 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/14181 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81205 ,  H01L2224/814 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/81986 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/1515 ,  H01L2924/15788 ,  H01L2924/16153 ,  H01L2224/81 ,  H01L2924/01079 ,  H01L2924/01014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode.

Abstract translation: 根据实施例的半导体封装包括：半导体芯片，其前表面包括前电极，背面具有背电极; 在半导体芯片和前侧盖部分之间的部分中包括气隙的前侧盖部分和前侧穿透电极，并且被定位成面向半导体芯片的前表面; 与第一帽部接合以密封半导体芯片的背面盖部分至少在半导体芯片和背面侧帽部分之间的部分和背面贯通电极之间包括气隙，并且位于 面对半导体芯片的背面; 电连接前电极和前侧穿透电极的前侧连接部; 以及将背面电极和背面贯通电极电连接的背面侧连接部。

公开(公告)号：US20130256660A1

公开(公告)日：2013-10-03

申请号：US13685859

申请日：2012-11-27

Applicant: Kazuhide ABE ,  Atsuko IIDA ,  Kazuhiko ITAYA ,  Junji WADATSUMI ,  Shouhei KOUSAI

Inventor： Kazuhide ABE ,  Atsuko IIDA ,  Kazuhiko ITAYA ,  Junji WADATSUMI ,  Shouhei KOUSAI

IPC: H01L29/84

CPC classification number: H01L29/84 ,  H01L2924/1461 ,  H03H9/2405 ,  H03H2009/02314

Abstract: A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.

Abstract translation: 根据实施例的半导体器件具有：半导体衬底; 形成在所述半导体衬底上的声谐振器，具有包括通过耗尽层与所述衬底电绝缘的杂质的半导体层，并且被配置为基于在所述半导体层中激发的声驻波以预定的谐振频率谐振; 温度检测器，形成在所述半导体衬底上，并被配置为检测所述半导体衬底的温度; 计算单元，其形成在所述半导体基板上，并且被配置为基于由所述温度检测器检测到的温度进行温度补偿的计算，所述杂质的种类和所述杂质的浓度; 以及控制器，其形成在所述半导体基板上，并且被配置为基于所述计算单元的计算结果来控制所述共振频率。

公开(公告)号：US08419497B2

公开(公告)日：2013-04-16

申请号：US12923949

申请日：2010-10-15

Applicant: Isao Takasu ,  Yuko Nomura ,  Tsuyoshi Hioki ,  Isao Amemiya ,  Kazuhide Abe

Inventor： Isao Takasu ,  Yuko Nomura ,  Tsuyoshi Hioki ,  Isao Amemiya ,  Kazuhide Abe

IPC: H01J9/00

CPC classification number: H01L33/54 ,  H01L33/46 ,  H01L33/507 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2933/0041 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of manufacturing a light emitting device. The method includes: mounting a light emitting chip on a substrate; forming a transparent resin portion and a phosphor layer by using a liquid droplet discharging apparatus, the transparent resin portion being formed in a shape of a dome and covering the light emitting chip to fill an exterior thereof on the substrate, a phosphor layer containing phosphor and being formed on an exterior of the transparent resin portion close to at least a top side thereof; and forming a reflecting layer at a position exterior of the transparent resin portion and the phosphor layer close to the substrate.

Abstract translation: 一种制造发光器件的方法。 该方法包括：将发光芯片安装在基板上; 通过使用液滴喷射装置形成透明树脂部分和荧光体层，所述透明树脂部分形成为圆顶形状并且覆盖所述发光芯片以将其外部填充在所述基板上，所述荧光体层包含磷光体和 形成在透明树脂部分的至少其顶侧附近的外部; 并且在透明树脂部分的外部和靠近基板的荧光体层的位置处形成反射层。

公开(公告)号：US20120228755A1

公开(公告)日：2012-09-13

申请号：US13235386

申请日：2011-09-18

Applicant: Toshihiko NAGANO ,  Hiroshi Yamada ,  Kazuhide Abe ,  Kazuhiko Itaya ,  Taihei Nakada

Inventor： Toshihiko NAGANO ,  Hiroshi Yamada ,  Kazuhide Abe ,  Kazuhiko Itaya ,  Taihei Nakada

IPC: H01L23/053 ,  H01L21/56

CPC classification number: H01L23/04 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00

Abstract: A semiconductor module includes a high frequency chip, an insulating cap, a through electrode, interconnections, and an insulating layer. The insulating cap forms a hollow with the chip to cover the chip. The through electrode passes through a first plane of the cap and a second plane of the cap, the first plane facing the chip, the second plane being on a side opposite to the first plane. The interconnections are provided on the cap and connected to the through electrode. The insulating layer is provided on the cap and fills a portion between the interconnections therewith.

Abstract translation: 半导体模块包括高频芯片，绝缘帽，通孔，互连和绝缘层。 绝缘盖形成具有芯片的中空以覆盖芯片。 所述贯通电极通过所述盖的第一平面和所述盖的第二平面，所述第一平面面向所述芯片，所述第二平面位于与所述第一平面相对的一侧。 互连设置在盖上并连接到通孔。 绝缘层设置在盖上并填充与其互连之间的部分。

公开(公告)号：US07619470B2

公开(公告)日：2009-11-17

申请号：US11687770

申请日：2007-03-19

Applicant: Kazuhide Abe ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Hideyuki Funaki

Inventor： Kazuhide Abe ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Hideyuki Funaki

IPC: H03F3/217

CPC classification number: H03F3/2176 ,  H03F1/02 ,  H03F3/245 ,  H03F2200/366 ,  H03F2200/391 ,  H03F2203/21178 ,  H03G1/0088

Abstract: A power amplifier includes: a plurality of field effect transistors connected in parallel and each having a first and second ends, the first end being connected to ground; an amplifying unit which includes at least one of an inductor, a capacitor and a band pass filter and has a third and fourth ends, the third end being connected to the second ends of the field effect transistors, and the fourth end outputting an amplified output signal; and an amplitude controller which sends control signals respectively to gates of the field effect transistors to turn on or off the field effect transistors based on an address signal for performing selection on the field effect transistors and a clock signal. Channel widths of the field effect transistors are different from each other.

Abstract translation: 功率放大器包括：多个并联连接的场效应晶体管，每个具有第一和第二端，所述第一端连接到地; 放大单元，其包括电感器，电容器和带通滤波器中的至少一个，并具有第三和第四端，第三端连接到场效应晶体管的第二端，第四端输出放大的输出 信号; 以及幅度控制器，其基于用于对场效应晶体管进行选择的地址信号和时钟信号，分别向场效应晶体管的栅极发送控制信号以导通或关闭场效应晶体管。 场效应晶体管的沟道宽度彼此不同。

公开(公告)号：US20090134430A1

公开(公告)日：2009-05-28

申请号：US12276787

申请日：2008-11-24

Applicant: Kazuhide Abe ,  Tadahiro Sasaki ,  Kazuhiko Itaya

Inventor： Kazuhide Abe ,  Tadahiro Sasaki ,  Kazuhiko Itaya

IPC: H01L27/105

CPC classification number: H01L27/088 ,  H01L23/4824 ,  H01L27/0207 ,  H01L27/105 ,  H01L29/1033 ,  H01L29/41758 ,  H01L29/7831 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate including an element region having a polygonal shape defined by a plurality of edges, and an isolation region surrounding the element region, and a plurality of gate electrodes provided on the substrate, crossing the element region, arranged in parallel with each other, and electrically connected with each other, wherein at least one of the edges does not cross any of the gate electrodes, and is not parallel to the gate electrodes.

Abstract translation: 半导体器件包括：衬底，其包括具有由多个边缘限定的多边形形状的元件区域和围绕该元件区域的隔离区域;以及多个栅电极，设置在该衬底上，与该元件区域交叉，与该 彼此电连接，其中至少一个边缘不与任何栅电极交叉，并且不平行于栅电极。

公开(公告)号：US07508268B2

公开(公告)日：2009-03-24

申请号：US11857737

申请日：2007-09-19

Applicant: Tadahiro Sasaki ,  Kazuhide Abe ,  Kazuhiko Itaya ,  Hideyuki Funaki

Inventor： Tadahiro Sasaki ,  Kazuhide Abe ,  Kazuhiko Itaya ,  Hideyuki Funaki

IPC: H03F3/68

CPC classification number: H03F3/604 ,  H01L21/823425 ,  H01L27/088 ,  H03F1/3205 ,  H03F3/16 ,  H03F3/607 ,  H03F3/72 ,  H03F2200/108 ,  H03F2200/451 ,  H03F2200/468 ,  H03F2200/543 ,  H03F2200/78 ,  H03F2203/7236

Abstract: A power amplifier includes: a first multi-finger FET formed on a semiconductor substrate; a second multi-finger FET formed on the semiconductor substrate; a first temperature detector which detects a channel temperature of the first FET; a second temperature detector which detects a channel temperature of the second FET; a third temperature detector which detects a temperature of the semiconductor substrate; a first detection circuit detecting a difference between an output of the first temperature detector and an output of the third temperature detector and converting the difference to thermoelectromotive force; a second detection circuit detecting a difference between an output of the second temperature detector and the output of the third temperature detector and converting the difference to thermoelectromotive force; and a comparator comparing outputs of the first and second detection circuits with each other to turn on one of the first and second switches and turn off the other.

Abstract translation: 功率放大器包括：形成在半导体衬底上的第一多指FET; 形成在半导体衬底上的第二多指FET; 第一温度检测器，其检测第一FET的通道温度; 第二温度检测器，其检测第二FET的通道温度; 第三温度检测器，其检测半导体衬底的温度; 第一检测电路，检测第一温度检测器的输出和第三温度检测器的输出之间的差异，并将差值转换为热电动势; 第二检测电路，检测第二温度检测器的输出与第三温度检测器的输出之间的差异，并将差值转换为热电动势; 以及比较器，将第一和第二检测电路的输出彼此进行比较，以打开第一和第二开关中的一个并且关闭另一个。

公开(公告)号：US07471031B2

公开(公告)日：2008-12-30

申请号：US11229694

申请日：2005-09-20

Applicant: Takashi Kawakubo ,  Toshihiko Nagano ,  Kazuhide Abe ,  Michihiko Nishigaki ,  Tomio Ono

Inventor： Takashi Kawakubo ,  Toshihiko Nagano ,  Kazuhide Abe ,  Michihiko Nishigaki ,  Tomio Ono

IPC: H01L41/09

CPC classification number: H03H9/542 ,  H01G5/16 ,  H01H57/00 ,  H01H2057/006 ,  H03H9/605 ,  H03H2007/008 ,  H03H2210/025 ,  H03H2210/033

Abstract: In a MEMS type variable capacity having a piezoelectric driving mechanism, a movable head having movable electrodes are arranged thereon, stationary electrodes is positioned to face the movable electrodes, and a piezoelectric driving beam structure is joined to the movable head and have one end fixed to the substrate. The movable electrode and the stationary electrode form a variable capacity. In the variable capacity, the distance and capacitance between the movable electrode and the stationary electrode of the variable capacity can be maintained constant so as to realize a reproducibility and a reliable controllability.

Abstract translation: 在具有压电驱动机构的MEMS型可变容量中，具有可移动电极的可动头布置在其上，固定电极被定位成面对可动电极，并且压电驱动梁结构接合到可动头部，并且一端固定到 底物。 可动电极和固定电极形成可变容量。 在可变容量中，可变电容和可变电容的固定电极之间的距离和电容可以保持恒定，从而实现再现性和可靠的可控性。

公开(公告)号：US07463117B2

公开(公告)日：2008-12-09

申请号：US11169645

申请日：2005-06-30

Applicant: Ryoichi Ohara ,  Naoko Yanase ,  Kazuhiko Itaya ,  Kenya Sano ,  Takaaki Yasumoto ,  Kazuhide Abe ,  Toshihiko Nagano ,  Michihiko Nishigaki ,  Takashi Kawakubo

Inventor： Ryoichi Ohara ,  Naoko Yanase ,  Kazuhiko Itaya ,  Kenya Sano ,  Takaaki Yasumoto ,  Kazuhide Abe ,  Toshihiko Nagano ,  Michihiko Nishigaki ,  Takashi Kawakubo

IPC: H03H9/13 ,  H03H9/15 ,  H03H9/54

CPC classification number: H03H9/02094 ,  H03H3/04 ,  H03H9/02133 ,  H03H9/173 ,  H03H9/174 ,  H03H9/703 ,  H03H2003/021 ,  H03H2003/023

Abstract: A film bulk acoustic-wave resonator encompasses a substrate having a cavity; a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity; a piezoelectric layer provided on the bottom electrode; and a top electrode provided on the piezoelectric layer having crystal axes oriented along a thickness direction of the piezoelectric layer, a full width at half maximum of the distribution of the orientations of the crystal axes is smaller than or equal to about six degrees.

Abstract translation: 薄膜体声波谐振器包括具有空腔的基板; 部分地固定在基板上的底部电极，底部电极的一部分机械地悬挂在空腔上方; 设置在底部电极上的压电层; 以及设置在压电体层上的顶电极，其具有沿着压电体层的厚度方向取向的晶轴，所述晶轴的取向分布的半峰全宽小于或等于约6度。

公开(公告)号：US20080258815A1

公开(公告)日：2008-10-23

申请号：US11871451

申请日：2007-10-12

Applicant: Kazuhide ABE ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Hideyuki Funaki

Inventor： Kazuhide ABE ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Hideyuki Funaki

IPC: H03F3/16

CPC classification number: H03F3/245 ,  H01L23/66 ,  H01L27/0207 ,  H01L2223/6644 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03F3/195 ,  H03F3/211 ,  H03F3/601 ,  H03F2200/366 ,  H03F2200/451 ,  H03F2203/21178 ,  H01L2924/00

Abstract: An object is to provide a high frequency power amplifier in which lowering of output power during operation is prevented, influence of thermal noise is suppressed, high frequency operation is stable, and long-term reliability is ensured. The high frequency power amplifier includes a plurality of transistors having gate electrodes, source regions and drain regions, the gate electrodes, source regions and drain regions being respectively connected in common, and a plurality of acoustic reflection layers being buried in portions of the semiconductor substrate, the portions being located between adjacent transistors, the acoustic reflection layers being disposed in a direction which is oblique to a length direction of the gate electrode.

Abstract translation: 本发明的目的是提供一种高频功率放大器，其中防止了操作期间输出功率的降低，热噪声的影响被抑制，高频操作稳定，并且确保了长期的可靠性。 高频功率放大器包括具有栅电极，源极区和漏极区的多个晶体管，栅电极，源极区和漏区共同分别连接，并且多个声反射层被埋在半导体衬底的一部分中 ，所述部分位于相邻的晶体管之间，声反射层沿与栅电极的长度方向倾斜的方向设置。