公开(公告)号：US10432152B2

公开(公告)日：2019-10-01

申请号：US14919990

申请日：2015-10-22

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Michael E. Watts ,  Jeffrey K. Jones ,  Ning Zhu ,  Iouri Volokhine

IPC: H03F1/56 ,  H03F3/195 ,  H01G4/30 ,  H01G4/38 ,  H01L23/66 ,  H01F27/28 ,  H01G4/005 ,  H01G4/12 ,  H03F3/213 ,  H03H7/38 ,  H05K1/11 ,  H01L23/00 ,  H01G4/40

Abstract: A device includes multiple ceramic capacitors and a current path structure. A first ceramic capacitor includes a first ceramic material between first and second electrodes. A second ceramic capacitor includes a second ceramic material between third and fourth electrodes. The second ceramic material has a higher Q than the first ceramic material. The current path structure includes a lateral conductor located between the first and second ceramic materials, and first and second vertical conductors that extend from first and second ends of the lateral conductor to a device surface. The device may be coupled to a substrate of a packaged RF amplifier device, which also includes a transistor. For example, the device may form a portion of an output impedance matching circuit coupled between a current carrying terminal of the transistor and an output lead of the RF amplifier device.

公开(公告)号：US09673164B2

公开(公告)日：2017-06-06

申请号：US14261899

申请日：2014-04-25

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Michael E. Watts ,  Shun Meen Kuo ,  Margaret A. Szymanowski

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L24/49 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/06135 ,  H01L2224/45099 ,  H01L2224/48195 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling is presented. The semiconductor device has a substrate on which a first circuit and a second circuit with inputs and outputs are formed proximate to each other. An isolation structure of electrically conductive material is located between components of the first and second circuits, the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. The isolation structure may be positioned on or over exterior surfaces of the semiconductor device housing or inside the housing. In one embodiment, the isolation structure includes a first leg extending transverse to the surface of the substrate and a first cross member connected to and projecting from the first leg over the substrate.

公开(公告)号：US09564861B2

公开(公告)日：2017-02-07

申请号：US14529407

申请日：2014-10-31

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Lei Zhao ,  Jeffrey K. Jones ,  Basim H. Noori ,  Michael E. Watts

IPC: H03F3/191 ,  H03F1/56 ,  H03F1/42 ,  H03F1/02 ,  H03F3/193 ,  H01L23/66 ,  H01L23/00 ,  H01L23/31

CPC classification number: H03F1/565 ,  H01L23/3121 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2223/6688 ,  H01L2224/04042 ,  H01L2224/05644 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/48091 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/16251 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H03F1/0288 ,  H03F1/42 ,  H03F3/193 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/0665

Abstract: An embodiment of an amplifier has a bandwidth defined by low and upper cutoff frequencies. The amplifier includes an input impedance matching circuit and a transistor. The transistor has a gate, a first current conducting terminal coupled to an output of the amplifier, and a second current conducting terminal coupled to a reference node. The input impedance matching circuit has a filter input coupled to an input of the amplifier, a filter output coupled to the gate of the transistor, and a multiple pole filter coupled between the filter input and the filter output. A first pole of the filter is positioned at a first frequency within the bandwidth, and a second pole of the filter is positioned at a second frequency outside the bandwidth. The input impedance matching circuit is configured to filter the input RF signal to produce a filtered RF signal at the filter output.

Abstract translation: 放大器的实施例具有由低截止频率和上限截止频率定义的带宽。 放大器包括输入阻抗匹配电路和晶体管。 晶体管具有栅极，耦合到放大器的输出的第一电流导通端子和耦合到参考节点的第二导电端子。 输入阻抗匹配电路具有耦合到放大器的输入的滤波器输入，耦合到晶体管的栅极的滤波器输出以及耦合在滤波器输入和滤波器输出之间的多极滤波器。 滤波器的第一极点位于带宽内的第一频率处，并且滤波器的第二极点位于带宽外的第二频率处。 输入阻抗匹配电路被配置为对输入RF信号进行滤波以在滤波器输出处产生经滤波的RF信号。

公开(公告)号：US09484222B2

公开(公告)日：2016-11-01

申请号：US14184266

申请日：2014-02-19

Applicant: Freescale Semiconductor, Inc.

Inventor： Hussain H. Ladhani ,  Lu Li ,  Mahesh K. Shah ,  Lakshminarayan Viswanathan ,  Michael E. Watts

IPC: H01L23/02 ,  H01L27/08 ,  H01L21/48 ,  H03F3/193 ,  H03F3/21 ,  H01L25/00 ,  H01L23/66 ,  H03F1/56 ,  H03F3/195

CPC classification number: H01L21/4853 ,  H01L23/66 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/21 ,  H03F2200/423 ,  H03F2200/451 ,  H01L2924/00014

Abstract: A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias.

Abstract translation: 公开了一种半导体器件，相关封装及其制造方法。 在至少一个实施例中，半导体器件包括具有第一端口，第二端口和第三端口的射频（RF）功率放大器晶体管。 半导体器件还包括输出引线，第二端口和输出引线之间的第一输出阻抗匹配电路，以及耦合在输出引线和接地端子之间的第一附加电路。 第一附加电路的至少一个部件至少部分地通过多个城堡和多个通孔中的一个或多个形成。

公开(公告)号：US20160126905A1

公开(公告)日：2016-05-05

申请号：US14529407

申请日：2014-10-31

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： LEI ZHAO ,  Jeffrey K. Jones ,  Basim H. Noori ,  Michael E. Watts

IPC: H03F1/56 ,  H03F1/02 ,  H01L23/64 ,  H03F3/21 ,  H01L25/00 ,  H01L25/18 ,  H03F1/42 ,  H03F3/19

CPC classification number: H03F1/565 ,  H01L23/3121 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2223/6688 ,  H01L2224/04042 ,  H01L2224/05644 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/48091 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/16251 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H03F1/0288 ,  H03F1/42 ,  H03F3/193 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/0665

Abstract: An embodiment of an amplifier has a bandwidth defined by low and upper cutoff frequencies. The amplifier includes an input impedance matching circuit and a transistor. The transistor has a gate, a first current conducting terminal coupled to an output of the amplifier, and a second current conducting terminal coupled to a reference node. The input impedance matching circuit has a filter input coupled to an input of the amplifier, a filter output coupled to the gate of the transistor, and a multiple pole filter coupled between the filter input and the filter output. A first pole of the filter is positioned at a first frequency within the bandwidth, and a second pole of the filter is positioned at a second frequency outside the bandwidth. The input impedance matching circuit is configured to filter the input RF signal to produce a filtered RF signal at the filter output.

Abstract translation: 放大器的实施例具有由低截止频率和上限截止频率定义的带宽。 放大器包括输入阻抗匹配电路和晶体管。 晶体管具有栅极，耦合到放大器的输出的第一电流导通端子和耦合到参考节点的第二导电端子。 输入阻抗匹配电路具有耦合到放大器的输入的滤波器输入，耦合到晶体管的栅极的滤波器输出以及耦合在滤波器输入和滤波器输出之间的多极滤波器。 滤波器的第一极点位于带宽内的第一频率处，并且滤波器的第二极点位于带宽外的第二频率处。 输入阻抗匹配电路被配置为对输入RF信号进行滤波以在滤波器输出处产生经滤波的RF信号。

公开(公告)号：US10109594B2

公开(公告)日：2018-10-23

申请号：US15136326

申请日：2016-04-22

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayan Viswanathan ,  Michael E. Watts ,  David F. Abdo

IPC: H01L23/552 ,  H01L23/057 ,  H01L23/66 ,  H01L21/52 ,  H01L23/053 ,  H01L23/538 ,  H01L23/58 ,  H01L25/065 ,  H01L25/00 ,  H03F1/02 ,  H03F3/195 ,  H03F3/21 ,  H03F3/213 ,  H01L23/00

Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.

公开(公告)号：US09824995B2

公开(公告)日：2017-11-21

申请号：US14500319

申请日：2014-09-29

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayan Viswanathan ,  Michael E. Watts

IPC: H05K7/00 ,  H01L23/00 ,  H01L23/498 ,  H01L23/66 ,  H01L23/057

CPC classification number: H01L24/49 ,  H01L23/057 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/50 ,  H01L24/73 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/40157 ,  H01L2224/45099 ,  H01L2224/48101 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48157 ,  H01L2224/49109 ,  H01L2224/49176 ,  H01L2224/50 ,  H01L2224/73229 ,  H01L2224/83101 ,  H01L2224/8384 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/1421 ,  H01L2924/161 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30111 ,  H01L2924/014 ,  H01L2224/37099

Abstract: A packaged RF device is provided that utilizes flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement the RF device. The IC die is contained inside a package. In accordance with the embodiments described herein, a flexible circuit is implemented as a lead. Specifically, the flexible circuit lead is coupled to the at least one IC die inside the package and extends to outside the package, the flexible circuit lead thus providing an electrical connection to the at least one IC die inside the package.

公开(公告)号：US20160240488A1

公开(公告)日：2016-08-18

申请号：US15136326

申请日：2016-04-22

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayn Viswanathan ,  Michael E. Watts ,  David F. Abdo

IPC: H01L23/552 ,  H01L23/58 ,  H01L23/538 ,  H01L25/00 ,  H03F1/02 ,  H01L23/057 ,  H01L23/66 ,  H03F3/195 ,  H03F3/213 ,  H03F3/21 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L21/52 ,  H01L23/053 ,  H01L23/057 ,  H01L23/5386 ,  H01L23/585 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6644 ,  H01L2224/04042 ,  H01L2224/48091 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/1421 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H03F1/0288 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F2200/222 ,  H03F2200/451 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.

公开(公告)号：US20150235933A1

公开(公告)日：2015-08-20

申请号：US14184266

申请日：2014-02-19

Applicant: Freescale Semiconductor, Inc.

Inventor： Hussain H. Ladhani ,  Lu Li ,  Mahesh K. Shah ,  Lakshminarayan Viswanathan ,  Michael E. Watts

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/00 ,  H03F3/193 ,  H03F3/21

CPC classification number: H01L21/4853 ,  H01L23/66 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/21 ,  H03F2200/423 ,  H03F2200/451 ,  H01L2924/00014

Abstract: A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias.

Abstract translation: 公开了一种半导体器件，相关封装及其制造方法。 在至少一个实施例中，半导体器件包括具有第一端口，第二端口和第三端口的射频（RF）功率放大器晶体管。 半导体器件还包括输出引线，第二端口和输出引线之间的第一输出阻抗匹配电路，以及耦合在输出引线和接地端子之间的第一附加电路。 第一附加电路的至少一个部件至少部分地通过多个城堡和多个通孔中的一个或多个形成。

公开(公告)号：US09013246B2

公开(公告)日：2015-04-21

申请号：US13957075

申请日：2013-08-01

Applicant: Freescale Semiconductor, Inc.

Inventor： Damon G. Holmes ,  Jeffrey K. Jones ,  Joseph Staudinger ,  Michael E. Watts

IPC: H03H7/01 ,  H03F3/21 ,  H01P1/18 ,  H01P5/02 ,  H01P5/12

CPC classification number: H03F3/211 ,  H01P1/184 ,  H01P5/028 ,  H01P5/12 ,  H03F1/56 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/222 ,  H03F2200/336 ,  H03F2200/387

Abstract: The embodiments described herein can provide improved signal feeding between hybrid couplers and associated transistors. As such, these embodiments can improve the performance of amplifiers and other such RF devices that utilize these components. In one embodiment a device includes a distribution network and a compensation resonator. The distribution network is configured to output a signal through a relatively wide output feedline. This relatively wide output feedline provides distributed signal feeding that can improve signal distribution and performance. The output feedline is coupled to the compensation resonator. In general, the compensation resonator is configured to resonate with the distribution network at the frequency band of the signal. Thus, the distribution network and compensation resonator together can provide improved signal distribution while maintaining performance at the frequencies of interest.

Abstract translation: 本文描述的实施例可以提供混合耦合器和相关联的晶体管之间改进的信号馈送。 因此，这些实施例可以改善利用这些部件的放大器和其他这样的RF器件的性能。 在一个实施例中，装置包括配电网络和补偿谐振器。 分配网络被配置为通过相对宽的输出馈线输出信号。 这种相对较宽的输出馈线提供分布式信号馈送，可以改善信号分配和性能。 输出馈线耦合到补偿谐振器。 通常，补偿谐振器被配置为在信号的频带处与分配网络共振。 因此，分配网络和补偿谐振器可以提供改善的信号分配，同时保持感兴趣的频率的性能。