公开(公告)号：US09583430B2

公开(公告)日：2017-02-28

申请号：US14457094

申请日：2014-08-11

申请人： Kyol Park ,  Jichul Kim ,  Yunhyeok Im ,  Eon Soo Jang

发明人： Kyol Park ,  Jichul Kim ,  Yunhyeok Im ,  Eon Soo Jang

IPC分类号： H01L23/538 ,  H01L23/522 ,  H01L23/552 ,  H01L25/10 ,  H01L25/00 ,  H01L23/31 ,  H01L23/36 ,  H01L23/498 ,  H05K1/02 ,  H05K1/14 ,  H01L25/065 ,  H01L23/42 ,  H01L23/00

CPC分类号： H01L23/5226 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/42 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/552 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92225 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/0207 ,  H05K1/141 ,  H05K2201/10378 ,  H01L2924/00012 ,  H01L2924/00

摘要： The inventive concepts provide package-on-package (PoP) devices. In the PoP devices, an interposer substrate and a thermal boundary material layer may be disposed between a lower semiconductor package and an upper semiconductor package to rapidly exhaust heat generated from a lower semiconductor chip included in the lower semiconductor package. The interposer substrate may be formed of one or more insulating layers, conductive vias, heat dissipating members, protection layers, and various conductive patterns.

摘要翻译： 本发明的概念提供了封装封装（PoP）器件。 在PoP器件中，可以在下半导体封装和上半导体封装之间设置插入器衬底和热边界材料层，以快速排出由下半导体封装中包括的下半导体芯片产生的热。 插入器基板可以由一个或多个绝缘层，导电通孔，散热构件，保护层和各种导电图案形成。

公开(公告)号：US09391009B2

公开(公告)日：2016-07-12

申请号：US14289900

申请日：2014-05-29

申请人： Eon Soo Jang ,  Kyol Park ,  Jongwoo Park ,  Jin-Kwon Bae ,  Yunhyeok Im ,  Jichul Kim ,  Soojae Park

发明人： Eon Soo Jang ,  Kyol Park ,  Jongwoo Park ,  Jin-Kwon Bae ,  Yunhyeok Im ,  Jichul Kim ,  Soojae Park

IPC分类号： H01L23/36 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/433 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L23/36 ,  H01L23/4334 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00

摘要： According to example embodiments, a semiconductor package includes a lower package, upper packages on the lower package and laterally spaced apart from each other, a lower heat exhaust part between the lower package and the upper packages, an intermediate heat exhaust part between the upper packages and connected to the lower heat exhaust part, and an upper heat exhaust part on the upper packages and connected to the intermediate heat exhaust part.

摘要翻译： 根据示例实施例，半导体封装包括下封装，下封装上的上封装并且彼此横向间隔开，下封装和上封装之间的下热排出部分，位于上封装之间的中间热排出部 并连接到下部散热部，以及上部热封装上的上部散热部，并与中间散热部连接。

公开(公告)号：US09013031B2

公开(公告)日：2015-04-21

申请号：US14185394

申请日：2014-02-20

申请人： Yunhyeok Im ,  Jichul Kim ,  Kyol Park ,  Seongho Shin

发明人： Yunhyeok Im ,  Jichul Kim ,  Kyol Park ,  Seongho Shin

IPC分类号： H01L23/02 ,  H01L23/36 ,  H01L23/34 ,  H01L23/48

CPC分类号： H01L23/34 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package includes a lower package including a lower semiconductor chip on a lower package substrate, an upper package on the lower package, and a heat interface material between the lower package and the upper package. The upper package includes an upper semiconductor chip on an upper package substrate including a center portion adjacent to the lower semiconductor chip and an edge portion. The heat interface material is in contact with a top surface of the lower semiconductor chip and the upper package substrate. The upper package substrate includes a heat diffusion via penetrating the center portion and an interconnection via penetrating the edge portion. The interconnection via is spaced apart from the heat diffusion via.

摘要翻译： 半导体封装包括下封装，其包括在下封装基板上的下半导体芯片，下封装上的上封装，以及下封装和上封装之间的热界面材料。 上封装包括在上封装基板上的上半导体芯片，其包括与下半导体芯片相邻的中心部分和边缘部分。 热界面材料与下半导体芯片和上封装衬底的顶表面接触。 上封装衬底包括穿过中心部分的热扩散，以及穿过边缘部分的互连。 互连通孔与热扩散通孔间隔开。

公开(公告)号：US09024434B2

公开(公告)日：2015-05-05

申请号：US13461949

申请日：2012-05-02

申请人： Yunhyeok Im ,  Kyol Park ,  Taeje Cho

发明人： Yunhyeok Im ,  Kyol Park ,  Taeje Cho

IPC分类号： H01L23/34 ,  H01L23/12 ,  H01L23/373 ,  H01L23/36 ,  H01L23/31 ,  H01L23/427

CPC分类号： H01L23/36 ,  H01L23/3128 ,  H01L23/427 ,  H01L23/4275 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/00

摘要： Semiconductor package are provided. In one embodiment, the semiconductor package may include a substrate such as a circuit substrate, a semiconductor chip mounted on the circuit substrate, a molding (or an encapsulant) covering the semiconductor chip and the circuit substrate and including a first temperature control member, and a heat dissipation member covering the molding.

摘要翻译： 提供半导体封装。 在一个实施例中，半导体封装可以包括诸如电路基板的基板，安装在电路基板上的半导体芯片，覆盖半导体芯片和电路基板并包括第一温度控制构件的模制件（或密封剂），以及 覆盖模制件的散热构件。

公开(公告)号：US09978661B2

公开(公告)日：2018-05-22

申请号：US15235958

申请日：2016-08-12

申请人： Yunhyeok Im ,  Oleg Feygenson ,  Sang Il Kim ,  Youngbae Kim ,  Jichul Kim ,  Seungkon Mok ,  Jungsu Ha

发明人： Yunhyeok Im ,  Oleg Feygenson ,  Sang Il Kim ,  Youngbae Kim ,  Jichul Kim ,  Seungkon Mok ,  Jungsu Ha

IPC分类号： H01L23/367 ,  H01L23/373 ,  H01L21/56 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L29/06

CPC分类号： H01L23/367 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/36 ,  H01L23/3736 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/105 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： Semiconductor packages and methods of fabricating the same are disclosed. The semiconductor package may include a package substrate, a semiconductor chip, which is mounted on the package substrate to have a bottom surface facing the package substrate and a top surface opposite to the bottom surface, a mold layer provided on the package substrate to encapsulate the semiconductor chip, and a heat dissipation layer provided on the top surface of the semiconductor chip. The mold layer may have a top surface substantially coplanar with the top surface of the semiconductor chip, and the top surfaces of the semiconductor chip and the mold layer may have a difference in surface roughness from each other.

公开(公告)号：US09324696B2

公开(公告)日：2016-04-26

申请号：US14468361

申请日：2014-08-26

申请人： Mi-Na Choi ,  Seran Bae ,  Yunhyeok Im

发明人： Mi-Na Choi ,  Seran Bae ,  Yunhyeok Im

IPC分类号： H01L25/10 ,  H01L23/36 ,  H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L23/552 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L25/105 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/211 ,  H01L2224/28105 ,  H01L2224/29006 ,  H01L2224/2929 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/2939 ,  H01L2224/29444 ,  H01L2224/29455 ,  H01L2224/29499 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2225/06506 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a package-on-package (PoP) device according to the inventive concepts, an anisotropic conductive film is disposed between a lower semiconductor package and an upper semiconductor package to remove an air gap between the lower and upper semiconductor packages. Thus, heat generated from a lower semiconductor chip may be rapidly and smoothly transmitted toward the upper semiconductor package, thereby increasing or maximizing a heat exhaust effect of the PoP device.

摘要翻译： 在根据本发明构思的封装封装（PoP）器件中，各向异性导电膜设置在下半导体封装和上半导体封装之间以去除下半导体封装和上半导体封装之间的气隙。 因此，从下半导体芯片产生的热可以快速平稳地向上半导体封装传输，从而增加或最大化PoP器件的排热效果。

公开(公告)号：US09356002B2

公开(公告)日：2016-05-31

申请号：US14706096

申请日：2015-05-07

申请人： Yunhyeok Im

发明人： Yunhyeok Im

IPC分类号： H01L23/02 ,  H01L25/065 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/498 ,  H01L25/10

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/3737 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49816 ,  H01L24/17 ,  H01L25/105 ,  H01L2224/16057 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/173 ,  H01L2924/17724 ,  H01L2924/17747 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package includes a lower package including a lower substrate, a lower semiconductor chip, and a lower molding layer exposing an upper surface of the lower semiconductor chip, bumps on the lower substrate, the bumps being spaced apart from the lower semiconductor chip, a lead frame on the lower semiconductor chip and on the bumps, the lead frame being electrically connected to the bumps and having a thermal conductivity of about 100 W/mk to about 10,000 W/mk, and an upper package on the lead frame and electrically connected to the lead frame.

摘要翻译： 半导体封装包括下封装，其包括下基板，下半导体芯片和暴露下半导体芯片的上表面的下模塑层，下基板上的凸块，凸块与下半导体芯片间隔开， 引线框架在下半导体芯片和凸块上，引线框架电连接到凸块并具有约100W / mk至约10,000W / mk的热导率，以及引线框架上的上封装并电连接 到引线框架。

公开(公告)号：US20120139097A1

公开(公告)日：2012-06-07

申请号：US13243806

申请日：2011-09-23

申请人： JEONGGI JIN ,  Yunhyeok Im ,  Chungsun Lee ,  Jung-Hwan Kim ,  Tae-Hong Min

发明人： JEONGGI JIN ,  Yunhyeok Im ,  Chungsun Lee ,  Jung-Hwan Kim ,  Tae-Hong Min

IPC分类号： H01L23/42 ,  H01L23/02

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/30 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/30519 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1435 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05552

摘要： Provided are a semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package may include a circuit substrate, a semiconductor chip mounted on the circuit substrate, a chip package interaction disposed between the circuit substrate and the semiconductor chip, a first molding portion covering part of the semiconductor chip and part of the chip package interaction, a second molding portion formed on the first molding portion, and an adhesion portion adhering the first and second molding portions to each other, the adhesion portion being disposed between the first and second molding portions.

摘要翻译： 提供半导体封装和制造半导体封装的方法。 半导体封装可以包括电路基板，安装在电路基板上的半导体芯片，设置在电路基板和半导体芯片之间的芯片封装相互作用，覆盖半导体芯片的一部分的第一模制部分和芯片封装相互作用的一部分， 形成在第一模制部分上的第二模制部分和将第一模制部分和第二模制部分彼此粘合的粘合部分，粘合部分设置在第一和第二模制部分之间。

公开(公告)号：US20150061095A1

公开(公告)日：2015-03-05

申请号：US14468361

申请日：2014-08-26

申请人： Mi-Na Choi ,  Seran Bae ,  Yunhyeok Im

发明人： Mi-Na Choi ,  Seran Bae ,  Yunhyeok Im

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L25/16 ,  H01L23/367

CPC分类号： H01L25/105 ,  H01L21/4853 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/211 ,  H01L2224/28105 ,  H01L2224/29006 ,  H01L2224/2929 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/2939 ,  H01L2224/29444 ,  H01L2224/29455 ,  H01L2224/29499 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2225/06506 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a package-on-package (PoP) device according to the inventive concepts, an anisotropic conductive film is disposed between a lower semiconductor package and an upper semiconductor package to remove an air gap between the lower and upper semiconductor packages. Thus, heat generated from a lower semiconductor chip may be rapidly and smoothly transmitted toward the upper semiconductor package, thereby increasing or maximizing a heat exhaust effect of the PoP device.

摘要翻译： 在根据本发明构思的封装封装（PoP）器件中，各向异性导电膜设置在下半导体封装和上半导体封装之间以去除下半导体封装和上半导体封装之间的气隙。 因此，从下半导体芯片产生的热可以快速平稳地向上半导体封装传输，从而增加或最大化PoP器件的排热效果。

公开(公告)号：US20120175782A1

公开(公告)日：2012-07-12

申请号：US13347270

申请日：2012-01-10

申请人： Yunhyeok Im ,  Tae Hong Min ,  Taeje Cho

发明人： Yunhyeok Im ,  Tae Hong Min ,  Taeje Cho

IPC分类号： H01L23/522

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

摘要： Provided are a semiconductor package and a method of manufacturing the same. a substrate including a first face and a second face, wherein the first and second faces face each other; a first ground pattern disposed on the first face; a second ground pattern disposed on the second face; a plurality of ground via plugs which connect the first ground pattern and the second ground pattern, wherein the plurality of ground via plugs penetrate the substrate; and a first aluminum oxide film interposed between the plurality of ground via plugs, wherein a ground voltage is applied to the plurality of ground via plugs. The semiconductor package may be manufactured using an anodic oxidation process.

摘要翻译： 提供半导体封装及其制造方法。 包括第一面和第二面的衬底，其中所述第一面和所述第二面彼此面对; 设置在第一面上的第一接地图案​​; 设置在所述第二面上的第二接地图案; 多个接地通孔插头，其连接第一接地图案​​和第二接地图案，其中多个接地通孔插头穿透基板; 以及插入在所述多个接地通孔插头之间的第一氧化铝膜，其中通过插头将多个接地电压施加接地电压。 半导体封装可以使用阳极氧化工艺制造。