公开(公告)号：US20170294409A1

公开(公告)日：2017-10-12

申请号：US15632774

申请日：2017-06-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Jing-Cheng Lin ,  Jui-Pin Hung

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L21/3105 ,  H01L25/00 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683

CPC分类号： H01L25/0655 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/742 ,  H01L24/82 ,  H01L24/92 ,  H01L24/94 ,  H01L24/96 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2223/54426 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1184 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24101 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/24991 ,  H01L2224/82005 ,  H01L2224/82106 ,  H01L2224/8213 ,  H01L2224/82132 ,  H01L2224/92 ,  H01L2224/9205 ,  H01L2224/94 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2224/19 ,  H01L2924/00

摘要： A package includes a die having a conductive pad at a top surface of the die, a stud bump over and connected to the conductive pad, and a redistribution line over and connected to the stud bump. An electrical connector is over and electrically coupled to the redistribution line.

公开(公告)号：US09378982B2

公开(公告)日：2016-06-28

申请号：US13791245

申请日：2013-03-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jing-Cheng Lin ,  Jui-Pin Hung ,  Li-Hui Cheng

IPC分类号： H01L23/48 ,  H01L21/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L21/683 ,  H01L25/10

CPC分类号： H01L25/105 ,  H01L21/486 ,  H01L21/565 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/24146 ,  H01L2224/24991 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/92244 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Various embodiments of mechanisms for forming through package vias (TPVs) with openings surrounding end-portions of the TPVs and a package on package (PoP) device with bonding structures utilizing the TPVs are provided. The openings are formed by removing materials, such as by laser drill, surrounding the end-portions of the TPVs. The openings surrounding the end-portions of the TPVs of the die package enable solders of the bonding structures formed between another die package to remain in the openings without sliding and consequently increases yield and reliability of the bonding structures. Polymers may also be added to fill the openings surrounding the TPVs or even the space between the die packages to reduce cracking of the bonding structures under stress.

摘要翻译： 提供了用于通过具有围绕TPV的端部部分的开口的封装通孔（TPV）形成的机构的各种实施例以及具有利用TPV的结合结构的封装（PoP）器件上的封装（PoP）器件。 通过除去TPV的端部周围的材料，例如通过激光钻孔来形成开口。 围绕模具封装的TPV的端部的开口使得形成在另一个模具封装之间的结合结构的焊料能够保持在开口中而不会滑动，从而增加了结合结构的产量和可靠性。 还可以加入聚合物以填充TPV周围的开口或甚至模具封装之间的空间，以减少在应力下的结合结构的开裂。

公开(公告)号：US20120159778A1

公开(公告)日：2012-06-28

申请号：US13330422

申请日：2011-12-19

申请人： Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

发明人： Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

IPC分类号： H05K3/36

CPC分类号： H01L24/94 ,  B81B7/007 ,  B81B2207/098 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/24991 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1068 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49126 ,  H01L2224/81 ,  H01L2224/82

摘要： A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.

摘要翻译： 公开了彼此连接的多个未封装的基板。 第一基板的第一主区域和/或第一主区域中的阶梯结构包括多个集成电路。 阶梯式结构在集成电路之间运行。 第一导体轨道从各个集成电路的至少一些接触连接延伸到阶梯式结构。 第一基板在第一主区域的一侧连接到另一基板。 第一基板从与第一主区域相对的第二主区域切断，使得第一基板被分成多个基板块。 每个衬底片具有一个集成电路。 第一导体轨迹可在基片之间的间隙中接近。 第二导体轨道由第二主区域形成。 至少一些第二导体轨道从第二主区域超过衬底片的侧壁延伸，直到第一导体轨迹。

公开(公告)号：US20230230967A1

公开(公告)日：2023-07-20

申请号：US17889916

申请日：2022-08-17

申请人： Samsung Display Co., LTD.

发明人： In Woo KIM ,  Chang Woo KWON ,  Dae Cheol KIM ,  Jong Hwan PARK ,  Yong Tae CHO ,  Kook Hyun CHOI

IPC分类号： H01L25/16 ,  H01L27/12 ,  H01L23/00

CPC分类号： H01L25/167 ,  H01L27/124 ,  H01L27/1288 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/95 ,  H01L2224/24051 ,  H01L2224/24145 ,  H01L2224/25175 ,  H01L2224/24991 ,  H01L2224/95133 ,  H01L2224/82106 ,  H01L2224/82007

摘要： A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

公开(公告)号：US11658123B2

公开(公告)日：2023-05-23

申请号：US17032544

申请日：2020-09-25

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Rahul Agarwal ,  Milind S. Bhagavat

IPC分类号： H01L23/538 ,  H01L23/00

CPC分类号： H01L23/5381 ,  H01L24/13 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2224/13024 ,  H01L2224/24137 ,  H01L2224/24991 ,  H01L2224/25171 ,  H01L2224/25174 ,  H01L2224/25177 ,  H01L2224/82801

摘要： A chip for hybrid bridged fanout chiplet connectivity, the chip comprising: a central chiplet; one or more first chiplets each coupled to the central chiplet using a plurality of fanout traces; and one or more second chiplets each coupled to the central chiplet using one or more interconnect dies (ICDs).

公开(公告)号：US09691706B2

公开(公告)日：2017-06-27

申请号：US13452140

申请日：2012-04-20

申请人： Chen-Hua Yu ,  Jing-Cheng Lin ,  Jui-Pin Hung

发明人： Chen-Hua Yu ,  Jing-Cheng Lin ,  Jui-Pin Hung

IPC分类号： H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L23/544 ,  H01L21/683 ,  H01L23/31

CPC分类号： H01L25/0655 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/742 ,  H01L24/82 ,  H01L24/92 ,  H01L24/94 ,  H01L24/96 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2223/54426 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1184 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24101 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/24991 ,  H01L2224/82005 ,  H01L2224/82106 ,  H01L2224/8213 ,  H01L2224/82132 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2224/19 ,  H01L2924/00

摘要： A package includes a die having a conductive pad at a top surface of the die, a stud bump over and connected to the conductive pad, and a redistribution line over and connected to the stud bump. An electrical connector is over and electrically coupled to the redistribution line.

公开(公告)号：US20240105658A1

公开(公告)日：2024-03-28

申请号：US17935613

申请日：2022-09-27

申请人： NXP B.V.

发明人： Tsung Nan Lo ,  Antonio Aguinaldo Marquez Macatangay

IPC分类号： H01L23/00

CPC分类号： H01L24/19 ,  H01L24/20 ,  H01L24/73 ,  H01L24/13 ,  H01L2224/13006 ,  H01L2224/13014 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/24991 ,  H01L2224/73101 ,  H01L2924/35121

摘要： A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over a semiconductor die, a portion of the RDL contacting a die pad of the semiconductor die. A non-conductive layer is formed over the RDL. An opening in the non-conductive layer is formed exposing a portion of the RDL. A plurality of plateau regions is formed in the non-conductive layer. A cavity region in the non-conductive layer separates each plateau region of the plurality of plateau regions. A metal layer is deposited over the non-conductive layer and exposed portion of the RDL and etched to expose the plurality of plateau regions through the metal layer. The cavity region remains substantially filled by a portion of the metal layer.

公开(公告)号：US20180254258A1

公开(公告)日：2018-09-06

申请号：US15759735

申请日：2016-09-14

申请人： 3DIS Technologies

发明人： Ayad Ghannam

IPC分类号： H01L23/00 ,  H01L49/02

CPC分类号： H01L24/82 ,  H01L21/4857 ,  H01L23/49822 ,  H01L24/24 ,  H01L28/10 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24105 ,  H01L2224/24146 ,  H01L2224/24226 ,  H01L2224/24265 ,  H01L2224/24991 ,  H01L2224/24998 ,  H01L2224/82051 ,  H01L2224/821 ,  H01L2224/82101 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19104 ,  H05K3/4661

摘要： The invention relates to a method for integrating at least one interconnection for the manufacture of an integrated circuit, including a step of depositing at least one insulating body onto a substrate including a horizontal surface, said insulating body comprising a first wall extending from the horizontal surface of the substrate to a high point of said insulating body and a step of depositing a one-piece electrical structure which is made of an electrically conductive material and extends on the horizontal surface of the substrate and the first wall of the insulating body, the first wall being vertically angled by more than 10 μm and having a rising slope extending from the horizontal surface of the substrate to the high point of said insulating body.

公开(公告)号：US09165905B2

公开(公告)日：2015-10-20

申请号：US13330422

申请日：2011-12-19

申请人： Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

发明人： Hans Krueger ,  Alexander Schmajew ,  Alois Stelzl

IPC分类号： H05K3/02 ,  H05K3/10 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  B81B7/00

CPC分类号： H01L24/94 ,  B81B7/007 ,  B81B2207/098 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24147 ,  H01L2224/24991 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1068 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49126 ,  H01L2224/81 ,  H01L2224/82

摘要： A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.

摘要翻译： 公开了彼此连接的多个未封装的基板。 第一基板的第一主区域和/或第一主区域中的阶梯结构包括多个集成电路。 阶梯式结构在集成电路之间运行。 第一导体轨道从各个集成电路的至少一些接触连接延伸到阶梯式结构。 第一基板在第一主区域的一侧连接到另一基板。 第一基板从与第一主区域相对的第二主区域切断，使得第一基板被分成多个基板块。 每个衬底片具有一个集成电路。 第一导体轨迹可在基片之间的间隙中接近。 第二导体轨道由第二主区域形成。 至少一些第二导体轨道从第二主区域超过衬底片的侧壁延伸，直到第一导体轨迹。

公开(公告)号：US20140210101A1

公开(公告)日：2014-07-31

申请号：US13791245

申请日：2013-03-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jing-Cheng Lin ,  Jui-Pin Hung ,  Li-Hui Cheng

IPC分类号： H01L23/538

CPC分类号： H01L25/105 ,  H01L21/486 ,  H01L21/565 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/24146 ,  H01L2224/24991 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/92244 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Various embodiments of mechanisms for forming through package vias (TPVs) with openings surrounding end-portions of the TPVs and a package on package (PoP) device with bonding structures utilizing the TPVs are provided. The openings are formed by removing materials, such as by laser drill, surrounding the end-portions of the TPVs. The openings surrounding the end-portions of the TPVs of the die package enable solders of the bonding structures formed between another die package to remain in the openings without sliding and consequently increases yield and reliability of the bonding structures. Polymers may also be added to fill the openings surrounding the TPVs or even the space between the die packages to reduce cracking of the bonding structures under stress.

摘要翻译： 提供了用于通过具有围绕TPV的端部部分的开口的封装通孔（TPV）形成的机构的各种实施例以及具有利用TPV的结合结构的封装（PoP）器件上的封装（PoP）器件。 通过除去TPV的端部周围的材料，例如通过激光钻孔来形成开口。 围绕模具封装的TPV的端部的开口使得形成在另一个模具封装之间的结合结构的焊料能够保持在开口中而不会滑动，从而增加了结合结构的产量和可靠性。 还可以加入聚合物以填充TPV周围的开口或甚至模具封装之间的空间，以减少在应力下的结合结构的开裂。