公开(公告)号：US20240268031A1

公开(公告)日：2024-08-08

申请号：US18565577

申请日：2022-05-31

Applicant: LG INNOTEK CO., LTD.

Inventor： In Jae LEE ,  Min Sung JO

IPC: H05K1/18 ,  H05K1/09

CPC classification number: H05K1/181 ,  H05K1/092 ,  H05K2201/10659

Abstract: A circuit board according to an embodiment includes: an insulating layer; and a circuit pattern layer disposed on the insulating layer and formed of an alloy, wherein the alloy includes: a first metal having a content in a range of 60 wt % to 80 wt %; a second metal having a content in a range of 10 wt % to 22 wt %; and a third metal having a content in a range of 3 wt % to 20 wt %; wherein the first metal includes any one of nickel (Ni) and iron (Fe), wherein the second metal includes chromium (Cr), and wherein the third metal includes a metal different from the first metal among nickel (Ni) and iron (Fe).

公开(公告)号：US20230284378A1

公开(公告)日：2023-09-07

申请号：US18103175

申请日：2023-01-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun-Ki YUN ,  Hwi-Jong Yoo ,  Jeonggi Yoon

IPC: H05K1/02 ,  H05K1/16 ,  G06F3/06 ,  G06F13/10

CPC classification number: H05K1/0286 ,  H05K1/0296 ,  H05K1/167 ,  G06F3/0679 ,  G06F13/10 ,  H05K2201/10159 ,  H05K2201/10659 ,  G06F2213/0026

Abstract: A storage device includes a printed circuit board including a controller site, a first memory site, a second memory site, first conductive lines connected with the controller site, second conductive lines connected with the first memory site, and third conductive lines connected with the second memory site, a controller package provided on the controller site, a first nonvolatile memory package provided on the first memory site, a second nonvolatile memory package provided on the second memory site, and at least one resistor connecting at least one conductive line of the first conductive lines with at least one conductive line of the second conductive lines.

公开(公告)号：US20150264810A1

公开(公告)日：2015-09-17

申请号：US14636356

申请日：2015-03-03

Applicant: FUJITSU LIMITED

Inventor： Shunji BABA ,  Manabu WATANABE ,  Kenji FUKUZONO ,  Satoshi OHSAWA ,  Tetsuro YAMADA ,  Akihiro WAKABAYASHI ,  Yasushi MASUDA ,  Yohei MIURA

IPC: H05K1/11 ,  H05K3/30 ,  H05K3/10 ,  H05K1/18

CPC classification number: H05K1/115 ,  H01L23/3675 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/167 ,  H01L2924/19041 ,  H01L2924/19106 ,  H05K1/0263 ,  H05K1/11 ,  H05K1/144 ,  H05K1/184 ,  H05K1/185 ,  H05K3/22 ,  H05K3/325 ,  H05K3/40 ,  H05K3/4046 ,  H05K2201/0311 ,  H05K2201/042 ,  H05K2201/045 ,  H05K2201/10 ,  H05K2201/10189 ,  H05K2201/10303 ,  H05K2201/10659 ,  H05K2201/10666 ,  H05K2201/10878 ,  H05K2201/10901 ,  H05K2203/176 ,  Y10T29/4913 ,  Y10T29/49147

Abstract: A circuit board includes: a substrate; a through hole formed in the substrate; and a connection terminal provided in the through hole; wherein the connection terminal includes a pedestal portion provided within the through hole and a pin which is provided at a center of the pedestal portion and extends from the pedestal portion toward a first surface of the substrate, so that a first end portion protrudes from the first surface.

Abstract translation: 电路板包括：基板; 形成在基板中的通孔; 以及设置在通孔中的连接端子; 其中，所述连接端子包括设置在所述通孔内的基座部分和设置在所述基座部分的中心并且从所述基座部朝向所述基板的第一表面延伸的销，使得所述第一端部从所述第一端部突出， 表面。

公开(公告)号：US20140182914A1

公开(公告)日：2014-07-03

申请号：US13727701

申请日：2012-12-27

Applicant: Kuan-Yu Chen ,  Howard L. Heck

Inventor： Kuan-Yu Chen ,  Howard L. Heck

IPC: H05K1/00 ,  H05K3/00

CPC classification number: H05K1/11 ,  H01R12/57 ,  H01R12/58 ,  H05K1/025 ,  H05K1/0269 ,  H05K1/0271 ,  H05K1/111 ,  H05K1/115 ,  H05K2201/094 ,  H05K2201/09409 ,  H05K2201/10189 ,  H05K2201/10659 ,  H05K2201/2045 ,  H05K2203/163 ,  Y10T29/49124

Abstract: A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps.

Abstract translation: 本文描述了通用串行总线混合覆盖设计。 该设计包括一排或多个表面贴装技术（SMT）触点和一列或多个印刷通孔（PTH）的内排。 混合足迹设计能够通过至少10 Gbps的数据进行数据传输。

公开(公告)号：US08279028B2

公开(公告)日：2012-10-02

申请号：US12540732

申请日：2009-08-13

Applicant: Kenichi Yokoyama ,  Shigemitsu Aoki

Inventor： Kenichi Yokoyama ,  Shigemitsu Aoki

IPC: H01H9/02 ,  H01H13/04

CPC classification number: H01H50/14 ,  H01H50/047 ,  H01H2001/5888 ,  H05K3/3415 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/10659 ,  Y02P70/613

Abstract: An electromagnetic relay including a body, a plurality of first surface-mount terminals projecting from the body, and at least one second terminal projecting from the body. Each first terminal includes a distal end portion adapted to be mounted on a surface of a circuit board. The second terminal includes a distal end portion adapted to be inserted into a through-hole of a circuit board. The distal end portion of the second terminal is positioned farther away from the body than the distal end portion of the first terminal.

Abstract translation: 一种电磁继电器，包括主体，从主体突出的多个第一表面安装端子和从主体突出的至少一个第二端子。 每个第一端子包括适于安装在电路板的表面上的远端部分。 第二端子包括适于插入电路板的通孔中的远端部分。 第二端子的远端部分比第一端子的远端部分远离主体定位。

公开(公告)号：US20120162924A1

公开(公告)日：2012-06-28

申请号：US13412881

申请日：2012-03-06

Applicant: Stanley Job Doraisamy ,  Wae Chet Yong

Inventor： Stanley Job Doraisamy ,  Wae Chet Yong

IPC: H05K7/20 ,  H05K7/06

CPC classification number: H05K1/18 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49562 ,  H01L2924/0002 ,  H05K1/0263 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/10659 ,  H01L2924/00

Abstract: A transistor outline package is provided for a semiconductor integrated device suitable for use in a control module of an automobile for connection between a printed circuit board and a bus bar of such a module. The package includes a package housing, having a first end suitable for mounting to a PCB and which has a width. The package is also formed with a leadframe which includes a heat sink and ground plane blade suitable for connection to a bus bar, a plurality of connector leads suitable for connection to a PCB and at least one source tab lead suitable for connection to a module connector of such a control module. The plurality of connection leads and the source tab lead extend from the first end of the package housing side by side in the direction along and within the width of the first end of the package housing.

Abstract translation: 为适用于汽车的控制模块的半导体集成器件提供晶体管外形封装，用于连接印刷电路板和这种模块的母线。 封装包括封装壳体，其具有适于安装到PCB并具有宽度的第一端。 该封装还形成有引线框架，该引线框架包括适于连接到母线的散热器和接地平面叶片，适合于连接到PCB的多个连接器引线和适于连接到模块连接器的至少一个源极突起引线 的这种控制模块。 多个连接引线和源极突片从包装壳体的第一端沿着包装壳体的第一端的宽度方向并排地延伸。

公开(公告)号：US20110266672A1

公开(公告)日：2011-11-03

申请号：US13142469

申请日：2009-01-30

Applicant: Jeffrey Scott Sylvester

Inventor： Jeffrey Scott Sylvester

IPC: H01L23/498 ,  B23K31/02

CPC classification number: H05K3/3436 ,  H01L24/73 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01061 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H05K3/3415 ,  H05K3/3421 ,  H05K3/3447 ,  H05K2201/10659 ,  H05K2201/10734 ,  Y02P70/613

Abstract: An integrated-circuit attachment structure comprises an integrated circuit and a package assembly. The package assembly includes a package containing the integrated circuit. The package has pins at its corners and a grid at least primarily of solder halls on its bottom face.

Abstract translation: 集成电路连接结构包括集成电路和封装组件。 封装组件包括包含集成电路的封装。 该包装在其角落处具有针脚，并且在其底面上至少主要具有焊盘。

公开(公告)号：US07833026B1

公开(公告)日：2010-11-16

申请号：US12729889

申请日：2010-03-23

Applicant: Chad William Morgan ,  David Wayne Helster ,  Michael William Woodford

Inventor： Chad William Morgan ,  David Wayne Helster ,  Michael William Woodford

IPC: H01R4/66

CPC classification number: H01R13/6474 ,  H01R12/52 ,  H01R12/585 ,  H01R12/722 ,  H01R12/724 ,  H01R13/514 ,  H01R13/6477 ,  H01R13/6587 ,  H05K1/0245 ,  H05K3/308 ,  H05K3/429 ,  H05K2201/094 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/10659 ,  H05K2203/0242 ,  Y10S439/941

Abstract: An electrical connector assembly includes a circuit board having vias each extending at least partially through the circuit board along parallel via axes and an electrical connector configured to be mounted on the circuit board. The electrical connector includes a plurality of variable depth signal terminals configured to extend different depths into respective vias of the circuit board. The signal terminals each have a terminal axis, and the signal terminals are arranged in pairs carrying differential pair signals. The signal terminals of each pair extend to the same depth in the respective vias of the circuit board. The terminal axes of the signal terminals of each pair are offset with respect to the corresponding via axes along a majority of the signal terminals within the vias.

Abstract translation: 电连接器组件包括电路板，电路板具有通孔，每个通路至少部分地沿着平行的经由轴线延伸通过电路板，以及电连接器，其构造成安装在电路板上。 电连接器包括多个可变深度信号端子，其被配置为将不同深度延伸到电路板的相应通孔中。 信号端子各自具有端子轴，并且信号端子成对地布置成携带差分对信号。 每对信号端子在电路板的相应通路中延伸到相同的深度。 每对信号端子的端子轴相对于通孔内大部分信号端子相应的通孔轴偏移。

公开(公告)号：US20100220454A1

公开(公告)日：2010-09-02

申请号：US12714275

申请日：2010-02-26

Applicant: Yuuichi KOGA

Inventor： Yuuichi KOGA

IPC: H05K7/02

CPC classification number: H01L21/563 ,  G06F1/183 ,  H01L22/32 ,  H01L23/3114 ,  H01L2224/16225 ,  H01L2224/73203 ,  H05K1/0268 ,  H05K3/321 ,  H05K3/3436 ,  H05K2201/10659 ,  H05K2201/10734 ,  H05K2203/163 ,  Y10T29/4913

Abstract: A printed circuit board including: a semiconductor package; a board; first to fourth electrodes on a second face of the semiconductor package; fifth to eighth electrodes on a mount region of the board; a first conductor connecting the first electrode with the second electrode; a second conductor connecting the third electrode with the fourth electrode; a third conductor connecting the sixth electrode with the seventh electrode; fourth conductors respectively connecting to the fifth electrode and the eighth electrode; conductive bonding portions bonding each of the electrodes on the second face with corresponding one of the electrodes on the mount region; and a determination circuit connected to the fourth conductors and configured to determine a difference between a value of current supplied to one of the fourth conductors and a value of current received through the other fourth conductor.

Abstract translation: 一种印刷电路板，包括：半导体封装; 董事会 在半导体封装的第二面上的第一至第四电极; 在板的安装区域上的第五至第八电极; 连接第一电极和第二电极的第一导体; 连接所述第三电极和所述第四电极的第二导体; 连接第六电极和第七电极的第三导体; 分别连接到第五电极和第八电极的第四导体; 导电接合部分将第二面上的每个电极与安装区域上的电极中的相应一个接合; 以及确定电路，连接到第四导体并且被配置为确定提供给第四导体中的一个的电流的值与通过另一第四导体接收的电流的值之间的差。

公开(公告)号：US07787257B2

公开(公告)日：2010-08-31

申请号：US12362149

申请日：2009-01-29

Applicant: Kenji Fukuzono

Inventor： Kenji Fukuzono

IPC: H05K7/00

CPC classification number: H05K1/0271 ,  H05K3/0058 ,  H05K3/301 ,  H05K3/325 ,  H05K3/3436 ,  H05K2201/0311 ,  H05K2201/10659 ,  H05K2201/10734 ,  H05K2201/2009 ,  H05K2201/2018

Abstract: A printed wiring board unit includes an electronic circuit component, a printed wiring board, a plurality of first conductive terminals disposed between the electronic circuit component and the printed wiring board, at least one of the first conductive terminals arranged along a quadrangular outline, and a plurality of second conductive terminals disposed between the electronic circuit component and the printed wiring board, the second conductive terminals arranged at a corner of the quadrangular outline, and the second conductive terminals contacting at least one of the printed wiring board and the electronic circuit component in a relatively displaceable manner.

Abstract translation: 印刷电路板单元包括电子电路部件，印刷线路板，布置在电子电路部件和印刷线路板之间的多个第一导电端子，沿着四边形轮廓布置的至少一个第一导电端子，以及 设置在电子电路部件和印刷线路板之间的多个第二导电端子，布置在四边形轮廓的角部的第二导电端子和与印刷线路板和电子电路部件中的至少一个接触的第二导电端子 相对位移的方式。