公开(公告)号：US08502082B2

公开(公告)日：2013-08-06

申请号：US11215206

申请日：2005-08-31

申请人： Benson Chan ,  John M. Lauffer

发明人： Benson Chan ,  John M. Lauffer

IPC分类号： H05K1/03 ,  H05K1/09

CPC分类号： H05K3/4641 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/15311 ,  H05K3/383 ,  H05K2201/0355 ,  H05K2203/0353

摘要： A circuitized substrate in which three conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to two dielectric layers. Each of the foil surfaces which physically bond to a respective dielectric layer are smooth (e.g., preferably by chemical processing) and may include a thin, organic layer thereon. One of the conductive layers may function as a ground or voltage (power) plane while the other two may function as signal planes with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided, as is a method of making the substrate.

摘要翻译： 其中三个导电层（例如，电镀铜箔）被结合（例如，层叠）到两个电介质层的电路化基板。 物理地结合到相应电介质层的每个箔表面是光滑的（例如优选通过化学处理），并且可以在其上包括薄的有机层。 导电层中的一个可以用作接地或电压（功率）面，而另外两个可以用作具有多条独立信号线作为其一部分的信号面。 还提供了利用这种电路化基板的电气组件和信息处理系统，以及制造基板的方法。

公开(公告)号：US08299371B2

公开(公告)日：2012-10-30

申请号：US12972700

申请日：2010-12-20

申请人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr.

发明人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr.

IPC分类号： H05K1/11

CPC分类号： H05K3/462 ,  H05K1/162 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2203/063 ,  Y10T29/49099 ,  Y10T29/49126 ,  Y10T29/49165

摘要： A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.

摘要翻译： 电路基板及其制造方法，其中在电介质中介层内形成有通孔数量。 基板包括两个印刷电路板（PCB）层，其结合到插入件的相对侧，每个PCB的导电特征与插入件通孔对准。 电阻浆料位于邻近通孔的导电特征上，以在两个PCB的导电特征之间形成受控的电阻连接。 还公开了电路化基板组件及其制造方法。

公开(公告)号：US08247703B2

公开(公告)日：2012-08-21

申请号：US12938759

申请日：2010-11-03

申请人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich

发明人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich

IPC分类号： H05K1/16

CPC分类号： H05K1/167 ,  H01G4/206 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/095 ,  H05K1/162 ,  H05K3/0023 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2203/1453 ,  Y10T29/49082 ,  Y10T29/49087 ,  Y10T29/49089 ,  Y10T29/49091 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/0401

摘要： A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.

摘要翻译： 一种制造电路化基板的方法，包括由包括聚合物树脂的材料和包括至少一种金属组分和至少一种陶瓷组分的混合物的纳米粉末的量组成的电阻器。 陶瓷部件可以是铁电陶瓷和/或高表面积陶瓷和/或透明氧化物和/或掺杂亚锰酸盐。 或者，材料将包括聚合物树脂和纳米粉末，其中纳米粉末包含至少一种金属涂覆的陶瓷和/或至少一种氧化物涂覆的金属组分。 还提供了使用这种电路化基板的电气组件（基板和至少一个电气部件）以及信息处理系统（例如，个人计算机）。

公开(公告)号：US08240027B2

公开(公告)日：2012-08-14

申请号：US12007820

申请日：2008-01-16

申请人： Frank D. Egitto ,  John S. Kresge ,  John M. Lauffer

发明人： Frank D. Egitto ,  John S. Kresge ,  John M. Lauffer

IPC分类号： H01C17/06 ,  H01C17/24 ,  H01C17/242

CPC分类号： H01C17/06 ,  H01C17/24 ,  H05K1/0268 ,  H05K1/167 ,  H05K2201/0355 ,  H05K2201/0969 ,  H05K2203/0361 ,  H05K2203/171 ,  Y10T29/49099 ,  Y10T29/49101

摘要： A method of making a circuitized substrate which involves forming a plurality of individual film resistors having approximate resistance values as part of at least one circuit of the substrate, measuring the resistance of a representative (sample) resistor to define its resistance, utilizing these measurements to determine the corresponding precise width of other, remaining film resistors located in a defined proximity relative to the representative resistor such that these remaining film resistors will include a defined resistance value, and then selectively isolating defined portions of the resistive material of these remaining film resistors while simultaneously defining the precise width of the resistive material in order that these film resistors will possess the defined resistance.

摘要翻译： 一种制造电路化衬底的方法，其包括形成具有近似电阻值的多个单独的膜电阻器作为衬底的至少一个电路的一部分，测量代表性（样品）电阻器的电阻以限定其电阻，利用这些测量 确定位于相对于代表性电阻器确定的接近度的其它剩余膜电阻器的对应精确宽度，使得这些剩余的膜电阻器将包括限定的电阻值，然后选择性地隔离这些剩余膜电阻器的电阻材料的限定部分，同时 同时限定电阻材料的精确宽度，以使这些薄膜电阻器具有限定的电阻。

公开(公告)号：US08144480B2

公开(公告)日：2012-03-27

申请号：US12720849

申请日：2010-03-10

申请人： Rabindra N. Das ,  John M. Lauffer ,  Irving Memis ,  Steven G. Rosser

发明人： Rabindra N. Das ,  John M. Lauffer ,  Irving Memis ,  Steven G. Rosser

IPC分类号： H05K1/16

CPC分类号： H05K1/162 ,  H05K1/023 ,  H05K1/0234 ,  H05K1/167 ,  H05K3/0032 ,  H05K3/0038 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2203/0361 ,  Y10T29/4913 ,  Y10T428/12493 ,  Y10T428/24917 ,  Y10T428/31511

摘要： A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser.

摘要翻译： 多层嵌入式电容和电阻基板芯。 提供至少一层电阻材料。 电阻材料层具有嵌入其中的导电材料层。 在电阻材料层上设置至少一层高介电常数的电容材料层。 通孔由激光形成。

公开(公告)号：US07803688B2

公开(公告)日：2010-09-28

申请号：US12380616

申请日：2009-03-02

申请人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01L21/20

CPC分类号： H05K1/162 ,  H01L27/12 ,  H01L28/40 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/4667 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2203/013

摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

摘要翻译： 电容性基板及其制造方法，其中使用第一和第二玻璃层。 第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。 然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。 形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

公开(公告)号：US20100167210A1

公开(公告)日：2010-07-01

申请号：US12720849

申请日：2010-03-10

申请人： Rabindra N. Das ,  John M. Lauffer ,  Irving Memis ,  Steven G. Rosser

发明人： Rabindra N. Das ,  John M. Lauffer ,  Irving Memis ,  Steven G. Rosser

IPC分类号： G03F7/20

CPC分类号： H05K1/162 ,  H05K1/023 ,  H05K1/0234 ,  H05K1/167 ,  H05K3/0032 ,  H05K3/0038 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2203/0361 ,  Y10T29/4913 ,  Y10T428/12493 ,  Y10T428/24917 ,  Y10T428/31511

摘要： A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser.

摘要翻译： 多层嵌入式电容和电阻基板芯。 提供至少一层电阻材料。 电阻材料层具有嵌入其中的导电材料层。 在电阻材料层上设置至少一层高介电常数的电容材料层。 通孔由激光形成。

公开(公告)号：US20090241332A1

公开(公告)日：2009-10-01

申请号：US12078206

申请日：2008-03-28

申请人： John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  James P. Paoletti ,  Kostas I. Papathomas ,  Rajinder S. Rai

发明人： John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  James P. Paoletti ,  Kostas I. Papathomas ,  Rajinder S. Rai

IPC分类号： H05K3/00

CPC分类号： H05K3/462 ,  H05K3/0032 ,  H05K3/4069 ,  H05K3/4623 ,  H05K2201/09318 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/061 ,  Y10T29/49124

摘要： A circuitized substrate and method of making same in which a first plurality of holes are formed within two bonded dielectric layers and then made conductive, e.g., plated. The substrate also includes third and fourth dielectric layers bonded to the first and second with a plurality of continuous electrically conductive thru holes extending through all four dielectric layers. Conductive paste is positioned within the thru holes for providing electrical connections between desired conductive layers of the substrate and outer layers as well. A circuitized substrate assembly and method of making same are also provided.

摘要翻译： 电路化基板及其制造方法，其中第一多个孔形成在两个接合的介电层内，然后导电，例如电镀。 衬底还包括通过延伸穿过所有四个电介质层的多个连续导电通孔与第一和第二电极结合的第三和第四电介质层。 导电浆料位于通孔内，用于在基板和外层的期望的导电层之间提供电连接。 还提供了电路化基板组件及其制造方法。

公开(公告)号：US20090206051A1

公开(公告)日：2009-08-20

申请号：US12380616

申请日：2009-03-02

申请人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01G13/00 ,  B05D5/12 ,  C23C14/34 ,  C23C14/30 ,  B05D3/00

CPC分类号： H05K1/162 ,  H01L27/12 ,  H01L28/40 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/4667 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2203/013

摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

摘要翻译： 电容性基板及其制造方法，其中使用第一和第二玻璃层。 第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。 然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。 形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

公开(公告)号：US07478472B2

公开(公告)日：2009-01-20

申请号：US11429990

申请日：2006-05-09

申请人： John M. Lauffer ,  Voya Markovich ,  Corey Seastrand ,  David L. Thomas

发明人： John M. Lauffer ,  Voya Markovich ,  Corey Seastrand ,  David L. Thomas

IPC分类号： H05K3/36 ,  H01B7/29

CPC分类号： H01L23/552 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K2201/0715 ,  H05K2201/09236 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.

摘要翻译： 一种制造电路化基板的方法，其中使用的至少一个信号线被一对相对定位的接地线屏蔽，所述接地线又电耦合到位于信号和接地线下方的接地平面，并且通过共同的中间 电介质层。 衬底可以形成较大结构的一部分，例如PCB，芯片载体等。