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公开(公告)号：US07478472B2
公开(公告)日：2009-01-20
申请号：US11429990
申请日：2006-05-09
CPC分类号： H01L23/552 , H01L2924/0002 , H01L2924/3011 , H05K1/0219 , H05K2201/0715 , H05K2201/09236 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
摘要翻译： 一种制造电路化基板的方法，其中使用的至少一个信号线被一对相对定位的接地线屏蔽，所述接地线又电耦合到位于信号和接地线下方的接地平面，并且通过共同的中间 电介质层。 衬底可以形成较大结构的一部分，例如PCB，芯片载体等。
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2.发明授权Circuitized substrate with signal wire shielding, electrical assembly utilizing same and method of making 有权具有信号线屏蔽的电路基板，利用其组合的电气组件和制造方法公开(公告)号：US07209368B2
公开(公告)日：2007-04-24
申请号：US10790747
申请日：2004-03-03
IPC分类号： H05K9/00
CPC分类号： H01L23/552 , H01L23/3128 , H01L23/5383 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/73253 , H01L2924/00014 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H01L2924/3025 , H05K1/0219 , H05K1/024 , H05K1/113 , H05K3/4623 , H05K3/4688 , H05K2201/0715 , H05K2201/09236 , H05K2201/09536 , H05K2201/096 , H05K2203/061 , H01L2224/05599
摘要： A circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. An electrical assembly including the circuitized substrate as part thereof and a method of making the circuitized substrate are also included. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
摘要翻译： 其中其中使用的至少一个信号线被一对相对定位的接地线屏蔽的电路化基板，所述接地线又电耦合到位于信号和接地线下方的接地平面，并通过共同的中间介质层与其分离。 包括作为其一部分的电路化基板的电气组件和制造电路化基板的方法也包括在内。 衬底可以形成较大结构的一部分，例如PCB，芯片载体等。
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3.发明申请Circuitized substrate with signal wire shielding, electrical assembly utilizing same and method of making 有权具有信号线屏蔽的电路基板，利用其组合的电气组件和制造方法公开(公告)号：US20050195585A1
公开(公告)日：2005-09-08
申请号：US10790747
申请日：2004-03-03
申请人： John Lauffer , Voya Markovich , Corey Seastrand , David Thomas
发明人： John Lauffer , Voya Markovich , Corey Seastrand , David Thomas
IPC分类号： H01K3/10 , H01L23/552 , H05K1/02 , H05K1/11 , H05K1/14
CPC分类号： H01L23/552 , H01L23/3128 , H01L23/5383 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/73253 , H01L2924/00014 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H01L2924/3025 , H05K1/0219 , H05K1/024 , H05K1/113 , H05K3/4623 , H05K3/4688 , H05K2201/0715 , H05K2201/09236 , H05K2201/09536 , H05K2201/096 , H05K2203/061 , H01L2224/05599
摘要： A circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. An electrical assembly including the circuitized substrate as part thereof and a method of making the circuitized substrate are also included. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
摘要翻译： 其中其中使用的至少一个信号线被一对相对定位的接地线屏蔽的电路化基板，所述接地线又电耦合到位于信号和接地线下方的接地平面，并通过共同的中间介质层与其分离。 包括作为其一部分的电路化基板的电气组件和制造电路化基板的方法也包括在内。 衬底可以形成较大结构的一部分，例如PCB，芯片载体等。
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公开(公告)号：US20060200977A1
公开(公告)日：2006-09-14
申请号：US11429990
申请日：2006-05-09
申请人： John Lauffer , Voya Markovich , Corey Seastrand , David Thomas
发明人： John Lauffer , Voya Markovich , Corey Seastrand , David Thomas
IPC分类号： H05K1/11
CPC分类号： H01L23/552 , H01L2924/0002 , H01L2924/3011 , H05K1/0219 , H05K2201/0715 , H05K2201/09236 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
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5.发明授权Information handling system including a circuitized substrate having a dielectric layer without continuous fibers 有权信息处理系统包括具有不带连续纤维的电介质层的电路化基板公开(公告)号：US07508076B2
公开(公告)日：2009-03-24
申请号：US11350777
申请日：2006-02-10
IPC分类号： H01L23/48
CPC分类号： H01L23/145 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H05K1/0373 , H05K3/4602 , H05K2201/0209
摘要： An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
摘要翻译： 一种信息处理系统，其包括作为其一部分的电路化基板，其包括由包括其中包含预定量的颗粒的树脂材料的介电材料构成的第一层，并且不包括连续纤维，半连续纤维等作为其一部分，以及 位于电介质第一层上的至少一个电路层。
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公开(公告)号：US07416996B2
公开(公告)日：2008-08-26
申请号：US11349990
申请日：2006-02-09
IPC分类号： H01L21/31
CPC分类号： H01L23/145 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H05K1/0373 , H05K3/4602 , H05K2201/0209
摘要： A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
摘要翻译： 一种制造电路化基板的方法，包括由包括其中包含预定量的颗粒的树脂材料的介电材料构成的第一层，并且不包括连续纤维，半连续纤维等作为其一部分，以及至少一个电路层 位于电介质第一层上。
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公开(公告)号：US07078816B2
公开(公告)日：2006-07-18
申请号：US10812890
申请日：2004-03-31
IPC分类号： H01L23/52
CPC分类号： H01L23/145 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H05K1/0373 , H05K3/4602 , H05K2201/0209
摘要： A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
摘要翻译： 一种电路化基板，包括由介电材料构成的第一层，所述介电材料包括其中包含预定量的颗粒的树脂材料，并且不包括作为其一部分的连续纤维，半连续纤维等，以及位于所述电介质上的至少一个电路层 第一层 还提供了电气组件和制造衬底的方法，以及包括电路化衬底与具有较小密度通孔图案的其它电路化衬底组合的电路化结构。 还提供了结合本发明的电路化基板作为其一部分的信息处理系统。
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8.发明授权Semi-conductor chip with compressible contact structure and electronic package utilizing same 有权具有可压缩接触结构的半导体芯片和利用其的电子封装公开(公告)号：US08198739B2
公开(公告)日：2012-06-12
申请号：US12836612
申请日：2010-08-13
申请人： How Lin , Frank Egitto , Voya Markovich
发明人： How Lin , Frank Egitto , Voya Markovich
CPC分类号： H01L23/3157 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/72 , H01L2224/0226 , H01L2224/02335 , H01L2224/024 , H01L2224/0401 , H01L2224/05147 , H01L2224/05644 , H01L2224/05647 , H01L2224/16225 , H01L2224/16227 , H01L2224/73251 , H01L2224/8121 , H01L2224/81815 , H01L2224/81901 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/351 , H01L2924/00 , H01L2224/16 , H01L2224/72
摘要： A method of forming a compressible contact structure on a semi-conductor chip which comprises bonding a compressible polymer layer to the chip's surface, forming a plurality of openings within the layer, depositing electrically conductive material within the openings to form electrical connections with the chip's contacts, forming a plurality of electrically conductive line elements on the polymer layer extending from a respective opening and each including an end portion, and forming a plurality of contact members each on a respective one of the line segment end portions. The compressible polymer layer allows the contact members to deflect toward (compress) the chip when the contact members are engaged by an external force or forces. A semi-conductor chip including such a compressible contact structure is also provided.
摘要翻译： 一种在半导体芯片上形成可压缩接触结构的方法，包括将可压缩的聚合物层粘合到芯片的表面，在该层内形成多个开口，在开口内沉积导电材料以形成与芯片的触点的电连接 在聚合物层上形成多个导电线元件，所述多个导电线元件从相应的开口延伸并且各自包括端部，并且在所述线段端部中的相应一个上形成多个接触元件。 当可接触构件通过外力或力接合时，可压缩聚合物层允许接触构件偏转（压缩）芯片。 还提供了包括这种可压缩接触结构的半导体芯片。
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公开(公告)号：US20070166944A1
公开(公告)日：2007-07-19
申请号：US11324432
申请日：2006-01-04
申请人： Robert Japp , John Lauffer , Voya Markovich , William Wilson
发明人： Robert Japp , John Lauffer , Voya Markovich , William Wilson
IPC分类号： H01L21/20
CPC分类号： H05K3/4641 , H05K3/429 , H05K2203/068
摘要： A method of making a circuitized substrate and an electrical assembly utilizing same in which the substrate is comprised of at least two sub-composites in which the dielectric material of at least one of these sub-composites is heated during bonding (e.g., lamination) to the other sufficiently to cause the dielectric material to flow into and substantially fill openings in a conductive layer for the bonded structure. Conductive thru-holes are formed within the bonded structure to couple selected ones of the structure's conductive layers. Formation of an electrical assembly is possible by positioning one or more electrical components (e.g., semiconductor chips or chip carriers) on the final structure and electrically coupling these to the structure's external circuitry.
摘要翻译： 一种制造电路化基板的方法和使用其的电气组件，其中基板由至少两个亚复合材料构成，其中这些亚复合材料中的至少一个的介电材料在粘合（例如，层压）期间被加热到 另一个足以使电介质材料流入并基本上填充用于接合结构的导电层中的开口。 导电通孔形成在接合结构内，以耦合所选择的结构导电层。 通过将一个或多个电气部件（例如，半导体芯片或芯片载体）定位在最终结构上并将其电耦合到结构的外部电路，可以形成电组件。
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10.发明申请Method of making a capacitive substrate for use as part of a larger circuitized substrate, method of making said circuitized substrate and method of making an information handling system including said circuitized substrate 有权制造用作较大电路基板的一部分的电容基板的方法，制造所述电路化基板的方法和制造包括所述电路化基板的信息处理系统的方法公开(公告)号：US20070010065A1
公开(公告)日：2007-01-11
申请号：US11352279
申请日：2006-02-13
申请人： Rabindra Das , John Lauffer , How Lin , Voya Markovich
发明人： Rabindra Das , John Lauffer , How Lin , Voya Markovich
CPC分类号： H05K1/162 , H05K1/113 , H05K3/0023 , H05K3/4602 , H05K2201/0187 , H05K2201/0209 , H05K2201/09309 , H05K2201/09509 , H05K2201/09536 , H05K2203/013 , H05K2203/0568
摘要： A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.
摘要翻译： 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。
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