公开(公告)号：US20080296057A1

公开(公告)日：2008-12-04

申请号：US12190537

申请日：2008-08-12

Applicant: George Dudnikov, JR.

Inventor： George Dudnikov, JR.

IPC: H05K1/11 ,  H05K1/00

CPC classification number: H05K3/429 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/116 ,  H05K1/167 ,  H05K3/184 ,  H05K3/422 ,  H05K2201/0187 ,  H05K2201/0738 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09718 ,  H05K2201/09881 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.

Abstract translation: 公开了通过在PCB堆叠中使用电镀抗蚀剂将多个通孔结构同时分隔成电隔离部分的系统和方法。 通过在子复合结构中的一个或多个位置选择性地沉积电镀抗蚀剂来制造这种通孔结构。 具有在不同位置沉积的电镀抗蚀剂的多个亚复合结构被层压以形成期望PCB设计的PCB堆叠。 通过PCB堆叠穿过导电层，电介质层和通过电镀抗蚀剂钻穿孔。 因此，PCB面板具有多个通孔，然后可以通过将PCB面板放置在种子池中，然后浸入无电解铜浴中而同时进行电镀。 这种分隔的通孔增加布线密度并限制通孔结构中的短截线形成。 这种分隔的通孔允许多个电信号穿过每个电隔离部分而没有彼此的干扰。

公开(公告)号：US20080252348A1

公开(公告)日：2008-10-16

申请号：US11647546

申请日：2006-12-28

Applicant: Eric C. Hannah ,  Jeff C. Morriss

Inventor： Eric C. Hannah ,  Jeff C. Morriss

IPC: H03K5/12

CPC classification number: H01P3/08 ,  H05K1/024 ,  H05K1/0254 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/10196

Abstract: In some embodiments, an apparatus includes a printed circuit board substrate, a copper signal line disposed on the printed circuit board substrate, and a nonlinear transmission structure coupled to the copper signal line, wherein the nonlinear transmission structure is configured to sharpen a wavefront of a high speed signal pulse on the copper signal line. In some embodiments, the nonlinear transmission structure may include a voltage dependent dielectric layer on the printed circuit board substrate. In some embodiments, the voltage dependent dielectric layer may include a plurality of varactors positioned at a receiving end of the signal line.

Abstract translation: 在一些实施例中，一种装置包括印刷电路板基板，布置在印刷电路板基板上的铜信号线和耦合到铜信号线的非线性传输结构，其中非线性传输结构被配置为锐化波前的波前 铜信号线上的高速信号脉冲。 在一些实施例中，非线性传输结构可以包括印刷电路板衬底上的电压依赖介电层。 在一些实施例中，电压依赖介质层可以包括位于信号线的接收端的多个变容二极管。

公开(公告)号：US20080032049A1

公开(公告)日：2008-02-07

申请号：US11829948

申请日：2007-07-29

Applicant: Lex KOSOWSKY ,  Robert Fleming

Inventor： Lex KOSOWSKY ,  Robert Fleming

IPC: H01B1/20 ,  B05D3/00

CPC classification number: H01C7/10 ,  H01C17/06513 ,  H01C17/0652 ,  H01C17/06526 ,  H01C17/06586 ,  H05K1/0254 ,  H05K1/0373 ,  H05K1/167 ,  H05K2201/0209 ,  H05K2201/0738

Abstract: A composition of voltage switchable dielectric (VSD) material that utilizes semi-conductive or conductive materials that have a relatively high aspect ratio for purpose of enhancing mechanical and electrical characteristics of the VSD material.

Abstract translation: 使用具有较高纵横比的半导体或导电材料的可变压电介质（VSD）材料的组合物，用于增强VSD材料的机械和电学特性。

公开(公告)号：US20070148440A1

公开(公告)日：2007-06-28

申请号：US11624632

申请日：2007-01-18

Applicant: Chi-Ming Chan ,  Kai-Mo Ng ,  Catherine Wong ,  Ying Cheung

Inventor： Chi-Ming Chan ,  Kai-Mo Ng ,  Catherine Wong ,  Ying Cheung

IPC: B32B5/16

CPC classification number: H01B1/22 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/167 ,  H05K2201/0738 ,  Y10T428/257 ,  Y10T428/31663

Abstract: The invention provides a process for preparing an overvoltage protection material comprising: (i) preparing a mixture comprising a polymer binder precursor and a conductive material; and (ii) heating the mixture to cause reaction of the polymer binder precursor and generate a polymer matrix having conductive material dispersed therein, wherein the polymer binder precursor is chosen such that substantially no solvent is generated during the reaction.

Abstract translation: 本发明提供一种制备过电压保护材料的方法，包括：（i）制备包含聚合物粘合剂前体和导电材料的混合物; 和（ii）加热混合物以引起聚合物粘合剂前体的反应并产生其中分散有导电材料的聚合物基质，其中选择聚合物粘合剂前体使得在反应期间基本上不产生溶剂。

公开(公告)号：US07183891B2

公开(公告)日：2007-02-27

申请号：US10958442

申请日：2004-10-05

Applicant: Edwin James Harris ,  Tushar Vyas ,  Timothy Pachla ,  James A. Colby

Inventor： Edwin James Harris ,  Tushar Vyas ,  Timothy Pachla ,  James A. Colby

IPC: H01C7/10

CPC classification number: H01C7/12 ,  H01G2/14 ,  H02H9/044 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0298 ,  H05K1/0393 ,  H05K1/167 ,  H05K3/28 ,  H05K2201/0738 ,  H05K2201/09763

Abstract: A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before use. The binder eliminates the need to place the VVM in a separate device or to provide separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid FR-4 laminate, a polyimide, a polymer or a multilayer PCB via a process such as screen or stencil printing. In one embodiment, the VVM includes two types of conductive particles, one with a core and one without a core. The VVM can also have core-shell type semiconductive particles.

Abstract translation: 提供了包括被配制为固有地粘附到导电和非导电表面的绝缘粘合剂的电压可变材料（“VVM”）。 粘合剂，因此VVM是可自我修复的，并且可以在使用前干燥的可涂抹形式使用。 粘合剂消除了将VVM放置在单独的装置中的需要，或者提供用于电连接VVM的单独的印刷电路板焊盘。 粘合剂和因此的VVM可以通过诸如筛网或模版印刷的工艺直接应用于许多不同类型的基材，例如刚性FR-4层压板，聚酰亚胺，聚合物或多层PCB。 在一个实施例中，VVM包括两种类型的导电颗粒，一种具有芯和一个不具有芯。 VVM还可以具有核 - 壳型半导体颗粒。

公开(公告)号：US20060152334A1

公开(公告)日：2006-07-13

申请号：US11032442

申请日：2005-01-10

Applicant: Nathaniel Maercklein ,  Tushar Vyas ,  Timothy Pachla ,  Stephen Whitney

Inventor： Nathaniel Maercklein ,  Tushar Vyas ,  Timothy Pachla ,  Stephen Whitney

IPC: H01C3/06

CPC classification number: H01C7/003 ,  H01C7/12 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/0215 ,  H05K2201/0738 ,  H05K2201/09509

Abstract: An improved electrical circuit that includes an embedded electrical component and an embedded voltage variable material (“VVM”) is provided. In one embodiment, the embedded VVM is provided as a voltage variable substrate, which is used in combination with an embedded electrical component, such as an embedded resistive material or an embedded capacitive material.

Abstract translation: 提供了包括嵌入式电气部件和嵌入式电压可变材料（“VVM”）的改进的电路。 在一个实施例中，嵌入式VVM被提供为电压可变衬底，其与嵌入式电气部件（例如嵌入式电阻材料或嵌入式电容材料）结合使用。

公开(公告)号：US20040160300A1

公开(公告)日：2004-08-19

申请号：US10366174

申请日：2003-02-13

Inventor： Karen P. Shrier

IPC: H01H071/14

CPC classification number: H01R13/6485 ,  H01C7/005 ,  H01C17/06586 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/167 ,  H05K3/0052 ,  H05K2201/0738 ,  Y10T29/49107 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49195 ,  Y10T29/49222

Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.

Abstract translation: 在使用印刷电路板制造技术的干扰事件发生期间能够保护电子部件的装置。 形成三（3）层结构，其包含夹在两个电极层之间的聚合物基配方。 这些装置可以以面板形式制造，提供大量的装置，其可以从面板上移除并直接施加到待保护的部件上。 期望的图案可以通过光蚀刻技术形成在任一个电极层上，从而提供可以针对大量应用而定制的工艺。

公开(公告)号：US20030079910A1

公开(公告)日：2003-05-01

申请号：US10315496

申请日：2002-12-09

Inventor： Lex Kosowsky

IPC: B05D005/12 ,  H05K001/16

CPC classification number: H05K1/0254 ,  C25D5/54 ,  H05K1/0373 ,  H05K1/167 ,  H05K3/188 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/0215 ,  H05K2201/0738 ,  H05K2203/105 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: A device includes a substrate comprises a voltage switchable dielectric material. A current carrying formation is formed on a plurality of selected sections of a surface of the substrate. Another device includes a substrate comprising a voltage switchable dielectric material. The substrate includes a first surface and a second surface opposite to the first surface. A vias extends between the first surface and the second surface of the substrate. A current carrying formation is formed on a plurality of selected sections of the first and second surfaces, as well as on a surface of the substrate defining the vias to extend an electrical connection from the first surface to the second surface.

Abstract translation: 一种器件包括具有可开关电介质材料的衬底。 载流层形成在基板的表面的多个选定部分上。 另一个装置包括一个包括可开关电介质材料的基片。 基板包括第一表面和与第一表面相对的第二表面。 通孔在衬底的第一表面和第二表面之间延伸。 电流承载结构形成在第一和第二表面的多个选定部分上，以及在限定通孔的基板的表面上，以延伸从第一表面到第二表面的电连接。

公开(公告)号：US06549114B2

公开(公告)日：2003-04-15

申请号：US09379422

申请日：1999-08-19

Applicant: Stephen J. Whitney ,  Louis Rector ,  Hugh M. Hyatt ,  Anthony D. Minervini ,  Honorio S. Luciano

Inventor： Stephen J. Whitney ,  Louis Rector ,  Hugh M. Hyatt ,  Anthony D. Minervini ,  Honorio S. Luciano

IPC: H01L710

CPC classification number: H05K1/0257 ,  H01C1/14 ,  H01C7/10 ,  H01L2224/48091 ,  H01L2924/07811 ,  H05K1/0259 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/10189 ,  H05K2201/10689 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An arrangement of voltage variable materials for the protection of electrical components from electrical overstress (EOS) transients. A device having a plurality of electrical leads, a ground plane and a layer of voltage variable material. The voltage variable material physically bonds the plurality of electrical leads to one another as well as provides an electrical connection between the plurality of electrical leads and the ground plane. A die having a circuit integrated therein is attached to the ground plane. Conductive members electrically connect the plurality of electrical leads to the integrated circuit. At normal operating voltages, the voltage variable material has a high resistance, thus channeling current from the electrical leads to the integrated circuit via the conductive members. In response to a high voltage EOS transient, the voltage variable material essentially instantaneously switches to a low resistance state, channeling the potentially harmful EOS transient to the ground plane and away from the integrated circuit.

Abstract translation: 用于保护电气部件免受电力过载（EOS）瞬变的电压可变材料的布置。 具有多个电引线，接地平面和电压可变材料层的器件。 电压可变材料将多个电引线彼此物理地接合，并且在多个电引线和接地平面之间提供电连接。 具有集成在其中的电路的管芯附接到接地平面。 导电构件将多个电引线电连接到集成电路。 在正常工作电压下，电压可变材料具有高电阻，从而通过导电构件将电流从电引线引导到集成电路。 响应于高电压EOS瞬态，电压可变材料基本上瞬间切换到低电阻状态，将潜在有害的EOS瞬态引导到接地平面并远离集成电路。

公开(公告)号：US20030025587A1

公开(公告)日：2003-02-06

申请号：US10192034

申请日：2002-07-10

Inventor： Stephen J. Whitney ,  Hugh Hyatt ,  Louis Rector

IPC: H01C007/10

CPC classification number: H05K1/0246 ,  H01C7/105 ,  H01C7/118 ,  H01C7/12 ,  H05K1/0259 ,  H05K1/095 ,  H05K1/167 ,  H05K3/284 ,  H05K2201/0738 ,  H05K2201/10022 ,  H05K2201/10636 ,  Y02P70/611

Abstract: The present invention provides a multifunction resistor having an improved voltage variable material (nullVVMnull). More specifically, the present invention provides a polymer VVM that has been formulated with a high percentage loading of conductive and/or semiconductive particles. A known length of the relatively conductive VVM is placed between adjacent electrodes to produce a desired Ohmic normal state resistance. When an electrostatic discharge event occurs, the VVM of the multifunctional resistor becomes highly conductive and dissipates the ESD threat. One application for this nullresistornull is the termination of a transmission line, which prevents unwanted reflections and distortion of high frequency signals.

Abstract translation: 本发明提供一种具有改进的电压可变材料（“VVM”）的多功能电阻器。 更具体地，本发明提供了已经配制成具有高百分比负载的导电和/或半导电颗粒的聚合物VVM。 将相对导电的VVM的已知长度放置在相邻电极之间以产生期望的欧姆正常状态电阻。 当发生静电放电事件时，多功能电阻器的VVM变得高度导电并消除ESD威胁。 这种“电阻”的一个应用是传输线的终止，防止高频信号的不必要的反射和失真。