公开(公告)号：US20020070838A1

公开(公告)日：2002-06-13

申请号：US10013952

申请日：2001-12-13

Inventor： Gerald R. Behling ,  James B. Intrater

IPC: H01T004/02 ,  H01T004/06

CPC classification number: H01T4/08 ,  H01L23/60 ,  H01L23/62 ,  H01L2224/16225 ,  H01L2924/09701 ,  H05K1/0259 ,  H05K1/026 ,  H05K1/111 ,  H05K1/116 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: Over voltage protection is provided for electronic circuits by disposing one or more ground bars for diverting harmful currents away from the sensitive electronic circuit elements. The ground bars are each associated with a row of contact portions of the electronic circuit. Microgaps between each contact portion and the corresponding ground bar are designed to provide an electrical conduit from the contact portion to the ground bar when normal operating voltages are exceeded, thereby channeling excess current harmlessly to ground. Under normal operating conditions, however, the microgaps act as electrical barriers, insulating the contact portions from ground. The microgaps may be filled with any combination of air, vacuum, or known variable voltage material.

公开(公告)号：US20020050912A1

公开(公告)日：2002-05-02

申请号：US09828883

申请日：2001-04-10

Inventor： Karen P. Shrier ,  Gerald R. Behling ,  Kailash C. Joshi ,  William W. Alston JR.

IPC: H01C007/10

CPC classification number: H05K1/0257 ,  H01C7/105 ,  H01L2224/48091 ,  H01L2224/49171 ,  H05K1/0259 ,  H05K1/167 ,  H05K3/429 ,  H05K2201/0738 ,  H01L2924/00014

Abstract: A variable voltage protection component in accordance with this invention comprises a reinforcing layer of insulating material having a substantially constant thickness embedded in a voltage variable material. With this configuration, the reinforcing layer defines a uniform thickness for the variable voltage protection component that is resist to compressive forces that may cause a reduction in the clamp voltage or a short in the voltage variable material. In addition, the variable voltage protection component can be attached to a compressible ground plane to form a variable voltage protection device. Methods are provided for making the variable voltage protection component and device.

Abstract translation: 根据本发明的可变电压保护部件包括具有嵌入电压可变材料中的基本恒定厚度的绝缘材料的加强层。 利用这种构造，增强层限定了用于可变电压保护部件的均匀的厚度，其抗压缩力可能导致钳位电压的降低或电压可变材料的短路。 此外，可变电压保护部件可以附接到可压缩的接地平面以形成可变电压保护装置。 提供了制作可变电压保护元件和器件的方法。

公开(公告)号：US06239687B1

公开(公告)日：2001-05-29

申请号：US08943189

申请日：1997-10-03

Applicant: Karen P. Shrier ,  Gerald R. Behling ,  Kailash C. Joshi ,  William W. Alston, Jr.

Inventor： Karen P. Shrier ,  Gerald R. Behling ,  Kailash C. Joshi ,  William W. Alston, Jr.

IPC: H01C713

CPC classification number: H05K1/0257 ,  H01C7/105 ,  H01L2224/48091 ,  H01L2224/49171 ,  H05K1/0259 ,  H05K1/167 ,  H05K3/429 ,  H05K2201/0738 ,  H01L2924/00014

Abstract: A variable voltage protection component is provided with a reinforcing layer of insulating material having a substantially constant thickness embedded in a voltage variable material. The reinforcing layer defines a uniform thickness for the variable voltage protection component that is resistant to compressive forces that may cause a reduction in the clamp voltage or a short in the voltage variable material. In addition, the variable voltage protection device component can be attached to a compressible ground plane to form a variable voltage protection device.

Abstract translation: 可变电压保护元件设置有嵌入电压可变材料中的具有基本恒定厚度的绝缘材料的增强层。 增强层限定了可变电压保护部件的均匀厚度，其抵抗可能导致钳位电压降低或电压可变材料短路的压缩力。 此外，可变电压保护装置部件可以附接到可压缩的接地平面，以形成可变电压保护装置。

公开(公告)号：US09741477B2

公开(公告)日：2017-08-22

申请号：US15101650

申请日：2014-12-05

Applicant: HITACHI METALS, LTD.

Inventor： Naoyuki Okamoto ,  Hiroyuki Ito ,  Toshiki Kida

IPC: H05K1/03 ,  H01C7/112 ,  H01C17/065 ,  H01C17/30 ,  B32B18/00 ,  C04B35/453 ,  H05K1/02 ,  C04B35/64 ,  H01C1/14

CPC classification number: H01C7/112 ,  B32B18/00 ,  B32B2307/206 ,  B32B2457/00 ,  C04B35/453 ,  C04B35/64 ,  C04B2235/3215 ,  C04B2235/3224 ,  C04B2235/3241 ,  C04B2235/3262 ,  C04B2235/3263 ,  C04B2235/3275 ,  C04B2235/3277 ,  C04B2235/3284 ,  C04B2235/3298 ,  C04B2235/3409 ,  C04B2235/656 ,  C04B2235/72 ,  C04B2237/34 ,  C04B2237/62 ,  H01C1/14 ,  H01C17/06546 ,  H01C17/30 ,  H05K1/0254 ,  H05K2201/0738

Abstract: To provide a zinc oxide-based varistor that exhibits adequate characteristics without using antimony. Disclosed is a sintered body for a varistor, including zinc oxide as a main component; 0.6 to 3.0 mol % of bismuth oxide in terms of bismuth (Bi); 0.2 to 1.4 mol % of cobalt oxide in terms of cobalt (Co); 0.1 to 1.5 mol % of chrome oxide in terms of chrome (Cr); and 0.1 to 1.5 mol % of manganese oxide in terms of manganese (Mn), wherein the contents of antimony (Sb), a rare earth element and tin (Sn) are not more than a level of impurities.

公开(公告)号：US20160218502A1

公开(公告)日：2016-07-28

申请号：US14995881

申请日：2016-01-14

Applicant: LITTELFUSE, INC.

Inventor： Conrado De Leon ,  Albert Enriquez ,  Editha Liquido ,  Crispin Zulueta

IPC: H02H9/04 ,  H05K1/11 ,  H05K1/03 ,  H02H9/00

CPC classification number: H02H9/04 ,  H02H9/005 ,  H05K1/0259 ,  H05K1/0306 ,  H05K1/0366 ,  H05K2201/0154 ,  H05K2201/0738

Abstract: Provided herein are improved electrical circuit protection devices for protection against electrostatic discharge (ESD), the devices including a first support substrate, a first electrode and a second electrode formed on the first support substrate, wherein the first electrode and the second electrode are formed from a conductive material. The devices further include a first bonding pad disposed on the first and second electrode, the first bonding pad having a first cavity formed therein; a second support substrate disposed on the first bonding pad, the second support substrate having a second cavity formed therein, and a voltage variable material disposed within the first cavity and the second cavity and electrically connected to the first electrode and the second electrode. The devices further include a second bonding pad disposed on the second support substrate, and a third support substrate disposed on the second bonding pad.

Abstract translation: 本文提供了用于防止静电放电（ESD）的改进的电路保护装置，所述装置包括形成在第一支撑衬底上的第一支撑衬底，第一电极和第二电极，其中第一电极和第二电极由 导电材料。 所述器件还包括设置在所述第一和第二电极上的第一焊盘，所述第一接合焊盘具有形成在其中的第一腔; 设置在所述第一焊盘上的第二支撑基板，所述第二支撑基板具有形成在其中的第二空腔，以及设置在所述第一空腔和所述第二空腔内且电连接到所述第一电极和所述第二电极的电压可变材料。 所述装置还包括设置在所述第二支撑基板上的第二接合焊盘和设置在所述第二接合焊盘上的第三支撑基板。

公开(公告)号：US09320135B2

公开(公告)日：2016-04-19

申请号：US13035791

申请日：2011-02-25

Applicant: Lex Kosowsky ,  Robert Fleming ,  Bhret Graydon ,  Daniel Vasquez

Inventor： Lex Kosowsky ,  Robert Fleming ,  Bhret Graydon ,  Daniel Vasquez

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/0254 ,  H05K1/0259 ,  H05K1/181 ,  H05K2201/0738 ,  H05K2203/304

Abstract: Printed circuit boards including voltage switchable dielectric materials (VSDM) are disclosed. The VSDMs are used to protect electronic components, arranged on or embedded in printed circuit boards, against electric discharges, such as electrostatic discharges or electric overstresses. During an overvoltage event, a VSDM layer shunts excess currents to ground, thereby preventing electronic components from destruction or damage.

Abstract translation: 公开了包括可切换电介质材料（VSDM）的印刷电路板。 VSDM用于保护布置在印刷电路板上或嵌入印刷电路板中的电子部件，以防止放电，例如静电放电或电动过载。 在过电压事件期间，VSDM层将多余的电流分流到地，从而防止电子部件破坏或损坏。

公开(公告)号：US09144151B2

公开(公告)日：2015-09-22

申请号：US12284790

申请日：2008-09-24

Applicant: Lex Kosowsky

Inventor： Lex Kosowsky

IPC: H05K1/03 ,  H05K1/09 ,  H05K1/02 ,  C25D5/54 ,  H05K3/18 ,  H05K1/16 ,  H05K3/42

CPC classification number: H05K1/0254 ,  C25D5/54 ,  H05K1/0373 ,  H05K1/167 ,  H05K3/188 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/0215 ,  H05K2201/0738 ,  H05K2203/105 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: A method comprises providing a voltage switchable dielectric material having a characteristic voltage, exposing the voltage switchable dielectric material to a source of ions associated with an electrically conductive material, and creating a voltage difference between the source and the voltage switchable dielectric material that is greater than the characteristic voltage. Electrical current is allowed to flow from the voltage switchable dielectric material, and the electrically conductive material is deposited on the voltage switchable dielectric material. A body comprises a voltage switchable dielectric material and a conductive material deposited on the voltage switchable dielectric material using an electrochemical process. In some cases, the conductive material is deposited using electroplating.

Abstract translation: 一种方法包括提供具有特征电压的电压可切换电介质材料，将电压可切换电介质材料暴露于与导电材料相关的离子源，并且产生电源和可切换电介质材料之间的电压差大于 特征电压。 允许电流从电压可切换介电材料流出，并且导电材料沉积在可开关电介质材料上。 身体包括电​​压可​​切换电介质材料和使用电化学过程沉积在可开关电介质材料上的导电材料。 在一些情况下，使用电镀沉积导电材料。

公开(公告)号：US08520403B2

公开(公告)日：2013-08-27

申请号：US12777596

申请日：2010-05-11

Applicant: Wei-Kuang Fang

Inventor： Wei-Kuang Fang

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H01L23/49805 ,  H01L23/62 ,  H01L25/162 ,  H01L2924/0002 ,  H05K1/0254 ,  H05K1/185 ,  H05K2201/0738 ,  H05K2201/09181 ,  H05K2201/10174 ,  H01L2924/00

Abstract: A multi-layer semiconductor element package structure with surge protection function includes a substrate unit, an insulated unit, a one-way conduction unit and a protection unit. The substrate unit has at least one top substrate, at least one middle substrate and at least one bottom substrate. The insulated unit has at least one first insulated layer filled between the top substrate and the middle substrate and at least one second insulated layer filled between the middle substrate and the bottom substrate. The one-way conduction unit has a plurality of one-way conduction elements electrically disposed between the top substrate and the middle substrate and enclosed by the first insulated layer. The protection unit has at least one protection element with anti surge current or anti surge voltage function electrically disposed between the middle substrate and the bottom substrate and enclosed by the second insulated layer.

Abstract translation: 具有浪涌保护功能的多层半导体元件封装结构包括基板单元，绝缘单元，单向导通单元和保护单元。 衬底单元具有至少一个顶部衬底，至少一个中间衬底和至少一个底部衬底。 绝缘单元具有填充在顶部基板和中间基板之间的至少一个第一绝缘层和填充在中间基板和底部基板之间的至少一个第二绝缘层。 单向导通单元具有电气设置在顶部基板和中间基板之间并被第一绝缘层包围的多个单向导电元件。 保护单元具有至少一个具有防浪涌电流或抗浪涌电压功能的保护元件，电气设置在中间基板和底部基板之间并由第二绝缘层包围。

公开(公告)号：US20130114174A1

公开(公告)日：2013-05-09

申请号：US13724713

申请日：2012-12-21

Applicant: David Hamby ,  Adam Scotch

Inventor： David Hamby ,  Adam Scotch

IPC: H02H3/20

CPC classification number: H02H3/20 ,  H02H7/20 ,  H02H9/046 ,  H05K1/0259 ,  H05K1/16 ,  H05K1/189 ,  H05K2201/0329 ,  H05K2201/0738 ,  H05K2201/10106 ,  H05K2201/10174

Abstract: Systems and methods for protecting electrical components such as light emitting diodes are described. In some embodiments, electrical components are protected from high level electrostatic discharge (“ESD”) events by a circuit board that provides an intrinsic level of ESD protection. At the same time, such electrical components are protected against low level ESD events by one or more diodes that are electrically coupled thereto. The one or more diodes may be thin film diodes comprising at least one layer of p-type semiconductive material and at least one layer of n-type semiconductive material. Devices including ESD protection and methods for manufacturing such devices are also described.

Abstract translation: 描述了用于保护诸如发光二极管的电气部件的系统和方法。 在一些实施例中，通过提供固有水平的ESD保护的电路板来保护电气部件免受高电平静电放电（“ESD”）事件的影响。 同时，通过与电耦合到其上的一个或多个二极管来保护这种电气部件免受低电平ESD事件的影响。 一个或多个二极管可以是包括至少一层p型半导体材料和至少一层n型半导体材料的薄膜二极管。 还描述了包括ESD保护的装置和用于制造这种装置的方法。

公开(公告)号：US08399773B2

公开(公告)日：2013-03-19

申请号：US12694702

申请日：2010-01-27

Applicant: Lex Kosowsky ,  Bhret Graydon ,  Djabbar Moustafaev ,  Shurui Shang ,  Robert Fleming

Inventor： Lex Kosowsky ,  Bhret Graydon ,  Djabbar Moustafaev ,  Shurui Shang ,  Robert Fleming

IPC: H05K9/00 ,  G06F17/50 ,  B05D5/12 ,  H05K1/11

CPC classification number: H05K1/0259 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0373 ,  H05K3/0005 ,  H05K2201/068 ,  H05K2201/0738 ,  H05K2201/09136 ,  Y10T428/24917 ,  Y10T428/24942

Abstract: Various aspects provide for incorporating a VSDM into a substrate to create an ESD-protected substrate. In some cases, a VSDM is incorporated in a manner that results in the ESD-protected substrate meeting one or more specifications (e.g., thickness, planarity, and the like) for various subsequent processes or applications. Various aspects provide for designing a substrate (e.g., a PCB) incorporating a VSDM, and adjusting one or more aspects of the substrate to design a balanced, ESD-protected substrate. Certain embodiments include molding a substrate having a VSDM layer into a first shape.