公开(公告)号：US12087741B2

公开(公告)日：2024-09-10

申请号：US17055206

申请日：2019-05-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Koji Kusunoki ,  Yosuke Tsukamoto ,  Kensuke Yoshizumi

IPC: H01L25/075 ,  H01L27/12 ,  H01L29/786 ,  H01L33/50 ,  H01L33/58 ,  H01L33/62

CPC classification number: H01L25/0753 ,  H01L27/1225 ,  H01L29/78651 ,  H01L29/7869 ,  H01L33/504 ,  H01L33/58 ,  H01L33/62 ,  H01L2933/0041 ,  H01L2933/0058 ,  H01L2933/0066

Abstract: A display device with a high luminance, a high contrast, and low power consumption is provided. The display device includes a transistor, a light-emitting element, a coloring layer, a phosphor layer, a first electrode, and a second electrode. The light-emitting element is electrically connected to the first electrode and the second electrode, the first electrode is electrically connected to the transistor, and the second electrode is positioned on the same plane as the first electrode. The coloring layer is positioned over the light-emitting element, the phosphor layer is positioned between the light-emitting element and the coloring layer, and the phosphor layer, the light-emitting element, and the coloring layer include a region in which they overlap with one another. The light-emitting element includes a light-emitting diode chip, and the phosphor layer has a function of emitting light of a complementary color of an emission color of the light-emitting element.

公开(公告)号：US12082429B2

公开(公告)日：2024-09-03

申请号：US17048642

申请日：2019-10-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Satoshi Seo ,  Tsunenori Suzuki ,  Takumu Okuyama ,  Yusuke Takita ,  Naoaki Hashimoto ,  Hiromi Seo ,  Nobuharu Ohsawa ,  Toshiki Sasaki ,  Shunpei Yamazaki

IPC: H10K50/11 ,  H10K50/15 ,  H10K50/16 ,  H10K50/17 ,  H10K85/60 ,  H10K101/30 ,  H10K101/40 ,  H10K85/30 ,  H10K101/10

CPC classification number: H10K50/11 ,  H10K50/15 ,  H10K50/16 ,  H10K50/17 ,  H10K85/30 ,  H10K85/342 ,  H10K85/615 ,  H10K85/622 ,  H10K85/626 ,  H10K85/636 ,  H10K85/657 ,  H10K85/6572 ,  H10K85/6574 ,  H10K85/6576 ,  H10K2101/10 ,  H10K2101/30 ,  H10K2101/40

Abstract: A novel light-emitting device is provided. Alternatively, a light-emitting device with high emission efficiency is provided. Alternatively, a light-emitting device having a long lifetime is provided. Alternatively, a light-emitting device having low driving voltage is provided. A light-emitting device including an EL layer including a first layer, a second layer, a third layer, a light-emitting layer, and a fourth layer in this order from the anode side is provided. The first layer includes a first organic compound and a second organic compound. The fourth layer includes a seventh organic compound. The first organic compound exhibits an electron-accepting property with respect to the second organic compound. The HOMO level of the second organic compound is from −5.7 eV to −5.4 eV. The HOMO level of the seventh organic compound is −6.0 eV or higher.

公开(公告)号：US12081171B2

公开(公告)日：2024-09-03

申请号：US17923653

申请日：2021-05-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuto Yakubo ,  Shoki Miyata ,  Akio Suzuki ,  Takayuki Ikeda

IPC: H03D7/14 ,  H01L29/786

CPC classification number: H03D7/1458 ,  H01L29/78648 ,  H01L29/7869

Abstract: A novel semiconductor device is provided. The semiconductor device includes a mixer circuit and a bias circuit. The mixer circuit includes a voltage-to-current conversion portion, a current switch portion, and a current-to-voltage conversion portion. The bias circuit includes a bias supply portion and a first transistor. The voltage-to-current conversion portion includes a second transistor and a third transistor. The bias supply portion has a function of outputting a bias voltage to be supplied to a gate of the second transistor and a gate of the third transistor. One of a source and a drain of the first transistor is electrically connected to the gate of the second transistor and the gate of the third transistor. The first transistor is turned off when the bias voltage is supplied, and the first transistor is turned on when the supply of the bias voltage is stopped.

公开(公告)号：US12080720B2

公开(公告)日：2024-09-03

申请号：US18207175

申请日：2023-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

IPC: H01L27/12 ,  G09G3/20 ,  G11C19/28 ,  H01L29/04 ,  H01L29/10 ,  H01L29/24 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L29/49 ,  H10K59/121

CPC classification number: H01L27/1229 ,  G09G3/20 ,  G11C19/28 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/247 ,  H01L29/41733 ,  H01L29/42372 ,  H01L29/45 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  H01L27/12 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/78609 ,  H10K59/1213

Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.

公开(公告)号：US12080377B2

公开(公告)日：2024-09-03

申请号：US17802281

申请日：2021-03-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Tatsuya Onuki ,  Munehiro Kozuma ,  Takanori Matsuzaki

IPC: G11C7/10 ,  G11C7/12 ,  G11C8/08 ,  H01L29/786 ,  H10B12/00

CPC classification number: G11C7/1096 ,  G11C7/12 ,  G11C8/08 ,  H01L29/7869 ,  H10B12/31 ,  H10B12/50

Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a plurality of arithmetic blocks each including an arithmetic circuit portion and a memory circuit portion. The arithmetic circuit portion and the memory circuit portion are electrically connected to each other. The arithmetic circuit portion and the memory circuit portion have an overlap region. The arithmetic circuit portion includes, for example, a Si transistor, and the memory circuit portion includes, for example, an OS transistor. The arithmetic circuit portion has a function of performing product-sum operation. The memory circuit portion has a function of retaining weight data. A first driver circuit has a function of writing the weight data to the memory circuit portion. The weight data is written to all the memory circuit portions included in the same column with the use of the first driver circuit.

公开(公告)号：US12080254B2

公开(公告)日：2024-09-03

申请号：US18141029

申请日：2023-04-28

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hajime Kimura

IPC: G09G3/36 ,  G09G3/34 ,  G09G5/10 ,  H04N5/208

CPC classification number: G09G3/3607 ,  G09G3/3406 ,  G09G3/36 ,  G09G3/3614 ,  G09G3/3685 ,  G09G5/10 ,  G09G3/3413 ,  G09G2300/0452 ,  G09G2320/0233 ,  H04N5/208

Abstract: The resolution of a low-resolution image is made high and a stereoscopic image is displayed. Resolution is made high by super-resolution processing. In this case, the super-resolution processing is performed after edge enhancement processing is performed. Accordingly, a stereoscopic image with high resolution and high quality can be displayed. Alternatively, after image analysis processing is performed, edge enhancement processing and super-resolution processing are concurrently performed. Accordingly, processing time can be shortened.

公开(公告)号：US12080104B2

公开(公告)日：2024-09-03

申请号：US17637563

申请日：2020-09-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Teppei Oguni ,  Takahiro Fukutome

IPC: G06V40/18 ,  G06T7/60 ,  G06V10/56 ,  G06V10/764 ,  G06V10/774

CPC classification number: G06V40/197 ,  G06T7/60 ,  G06V10/56 ,  G06V10/764 ,  G06V10/774 ,  G06V40/193 ,  G06T2207/10016 ,  G06T2207/20081 ,  G06T2207/30201

Abstract: Person's conditions are classified according to his/her eye data. Person's conditions are classified according to his/her eye data using an imaging device, a feature extraction unit, and a classifier. The imaging device has a function of generating a group of images by continuous image capturing, and the group of images preferably includes an image of an eye area. The eye includes a black area and a white area. The method includes the steps in which the feature extraction unit extracts the eye area from the group of images, extracts a blinking amplitude, detects an image for determining start of eye blinking, stores an image for determining end of eye blinking as first data, and stores an image after a predetermined time elapsed from the first data as second data. The step in which the feature extraction unit extracts the white area from the first data and the second data is included. The classifier can use the white area as learning data.

公开(公告)号：US12080095B2

公开(公告)日：2024-09-03

申请号：US17639632

申请日：2020-09-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Susumu Kawashima ,  Kazunori Watanabe ,  Koji Kusunoki ,  Satoshi Yoshimoto

IPC: G06V40/13 ,  G06F3/041 ,  G06V40/12 ,  H04N25/75

CPC classification number: G06V40/1365 ,  G06F3/0412 ,  G06V40/1318 ,  H04N25/75

Abstract: To provide an imaging device having a function of biometric authentication and a function of a touch sensor or a near touch sensor. The imaging device includes pixels, current mirror circuits, and CDS circuits. The pixels, the current mirror circuits, and the CDS circuits are electrically connected to read lines. The current mirror circuit includes a first and a second transistor. One of a source and a drain of the first transistor is electrically connected to the read line, and a power supply potential is supplied to the other of a source and a drain of the second transistor. The imaging device outputs imaging data written to the pixel, as a first signal, to the read line in a first period, and then, resets the imaging data and outputs a second signal from the pixel to the read line in a second period. In the first period, a first potential is supplied to terminals, and in the second period, a second potential is supplied to terminals. A difference between the second potential and the power supply potential is greater than a difference between the first potential and the power supply potential.

公开(公告)号：US20240292697A1

公开(公告)日：2024-08-29

申请号：US18689899

申请日：2022-09-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Masahiro KATAYAMA ,  Yukinori SHIMA ,  Masataka NAKADA ,  Shingo EGUCHI ,  Daiki NAKAMURA ,  Koji KUSUNOKI

IPC: H10K59/32 ,  G09G3/3233 ,  H10K59/131 ,  H10K59/38 ,  H10K59/80

CPC classification number: H10K59/32 ,  H10K59/131 ,  H10K59/38 ,  H10K59/805 ,  G09G3/3233 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2320/0223

Abstract: A display device in which a voltage drop is inhibited adequately is provided. The display device includes a first light-emitting device including a first light-emitting layer, a first charge-generation layer over the first light-emitting layer, and a second light-emitting layer over the first charge-generation layer; a first color filter overlapping with the first light-emitting device; a second light-emitting device including a third light-emitting layer, a second charge-generation layer over the third light-emitting layer, and a fourth light-emitting layer over the second charge-generation layer; a second color filter overlapping with the second light-emitting device; a common electrode included in the first light-emitting device and the second light-emitting device; and an auxiliary wiring electrically connected to the common electrode. The auxiliary wiring includes a first wiring layer and a second wiring layer, the second wiring layer is electrically connected to the first wiring layer through a contact hole of an insulating layer, and the second wiring layer has a lattice shape in a top view.

公开(公告)号：US20240292669A1

公开(公告)日：2024-08-29

申请号：US18569769

申请日：2022-06-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Ryota HODO ,  Kentaro SUGAYA ,  Yoshikazu HIURA ,  Takahiro FUJIE

IPC: H10K59/122 ,  H10K59/12

CPC classification number: H10K59/122 ,  H10K59/1201

Abstract: A display apparatus having high display quality is provided. The display apparatus includes a first pixel, a second pixel, a first insulating layer, and a second insulating layer over the first insulating layer; the first pixel includes a first pixel electrode, a first EL layer covering the first pixel electrode, a third insulating layer over the first EL layer, and a common electrode over the first EL layer and the third insulating layer; the second pixel includes a second pixel electrode, a second EL layer covering the second pixel electrode, a fourth insulating layer over the second EL layer, and the common electrode over the second EL layer and the fourth insulating layer; the first insulating layer and the third insulating layer each include a first protruding portion over the first pixel electrode; the first protruding portion is positioned outward from an end portion of the second insulating layer; the first insulating layer and the fourth insulating layer each include a second protruding portion over the second pixel electrode; the second protruding portion is positioned outward from an end portion of the second insulating layer; a side surface of the first protruding portion and a side surface of the second protruding portion each have a tapered shape in a cross-sectional view of the display apparatus.