公开(公告)号：US20100264524A1

公开(公告)日：2010-10-21

申请号：US12824415

申请日：2010-06-28

Applicant: Eun-seok SONG ,  Hee-seok LEE ,  So-young LIM

Inventor： Eun-seok SONG ,  Hee-seok LEE ,  So-young LIM

IPC: H01L23/556 ,  H01L23/48 ,  H01L23/538

CPC classification number: H01Q15/006

Abstract: A substrate for a semiconductor package includes a dielectric substrate, a circuit pattern formed on a first surface of the dielectric substrate, and an electromagnetic band gap (EGB) pattern. The EGB pattern includes multiple unit structures formed on a second surface of the dielectric substrate, where each unit structure includes a flat conductor electrically connected to the circuit pattern through a ground connection, and multiple spiral-patterned conductors electrically connected to the flat conductor. The second surface is formed on an opposite side of the dielectric substrate from the first surface. Each flat conductor is electrically connected to a flat conductor of another one of the unit structures. At least one of the spiral-patterned conductors in each one of the unit structures is electrically connected to another one of the spiral-patterned conductors.

Abstract translation: 用于半导体封装的衬底包括电介质衬底，形成在电介质衬底的第一表面上的电路图案和电磁带隙（EGB）图案。 EGB图案包括形成在电介质基板的第二表面上的多个单元结构，其中每个单元结构包括通过接地连接电连接到电路图案的扁平导体，以及电连接到扁平导体的多个螺旋图案导体。 第二表面形成在电介质基板的与第一表面相反的一侧上。 每个扁平导体电连接到另一个单元结构的扁平导体。 每个单元结构中的至少一个螺旋图案导体电连接到另一个螺旋图案导体。

公开(公告)号：US20100258905A1

公开(公告)日：2010-10-14

申请号：US12639228

申请日：2009-12-16

Applicant: Eun-seok Song ,  Hee-seok Lee ,  Sung-woo Park

Inventor： Eun-seok Song ,  Hee-seok Lee ,  Sung-woo Park

IPC: H01L27/06 ,  H02B1/20

CPC classification number: H01L23/66 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/19051 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package removes power noise by using a ground impedance. The semiconductor package includes an analog circuit block, a digital circuit block, an analog ground impedance structure, a digital ground impedance structure, and an integrated ground. The integrated ground and the analog circuit block are electrically connected via the analog ground impedance structure, and the integrated ground and the digital circuit block are electrically connected via the digital ground impedance structure, and an inductance of the analog ground impedance structure is greater than an inductance of the digital ground impedance structure.

Abstract translation: 半导体封装通过使用接地阻抗来消除功率噪声。 半导体封装包括模拟电路块，数字电路块，模拟地阻抗结构，数字接地阻抗结构和集成地。 集成地和模拟电路块通过模拟接地阻抗结构电连接，集成地和数字电路块通过数字接地阻抗结构电连接，模拟地阻抗结构的电感大于 数字接地阻抗结构的电感。

公开(公告)号：US20090284883A1

公开(公告)日：2009-11-19

申请号：US12468178

申请日：2009-05-19

Applicant: Hee-Seok LEE ,  Yun-Seok Choi ,  Kyoung-Sei Choi

Inventor： Hee-Seok LEE ,  Yun-Seok Choi ,  Kyoung-Sei Choi

IPC: H02H9/00

CPC classification number: H01L23/60 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: An electronic device having an electrostatic discharge (ESD) protection device and methods of fabricating the same. The electronic device can include an electronic element to be protected from electrostatic discharge. The electronic element can be installed on a substrate. The substrate can include a ground electrode disposed on the substrate, and a first element electrode disposed at a different level from the ground electrode on the substrate to overlap a part of the ground electrode and to electrically connect to the electronic element installed to the substrate. A dielectric layer can be disposed between the ground electrode and the first element electrode, wherein the ground electrode, the first element electrode and the dielectric layer disposed therebetween constitute an electrostatic discharge (ESD) protection device.

Abstract translation: 一种具有静电放电（ESD）保护装置的电子装置及其制造方法。 电子设备可以包括要被防止静电放电的电子元件。 电子元件可以安装在基板上。 基板可以包括设置在基板上的接地电极和与基板上的接地电极不同的高度设置的第一元件电极，以与接地电极的一部分重叠并且电连接到安装到基板上的电子元件。 介电层可以设置在接地电极和第一元件电极之间，其中接地电极，第一元件电极和介于其间的电介质层构成静电放电（ESD）保护装置。

公开(公告)号：US07508680B2

公开(公告)日：2009-03-24

申请号：US11779324

申请日：2007-07-18

Applicant: Hee-seok Lee ,  Yun-seok Choi ,  Eun-seok Song ,  Young-sang Cho ,  Na-rae Shin

Inventor： Hee-seok Lee ,  Yun-seok Choi ,  Eun-seok Song ,  Young-sang Cho ,  Na-rae Shin

IPC: H05K1/16 ,  H01F27/28 ,  H01L23/48

CPC classification number: H01F21/12 ,  H01F41/045 ,  H05K1/147 ,  H05K1/165

Abstract: An adjustable-inductance (AI) filter, a tape distribution substrate including the filter, and a display panel assembly including the tape distribution substrate are provided. The adjustable-inductance (AI) filter includes a filter distribution line including first and second end portions each having a first line width, at least one repair pattern having a second line width and disposed between the first and second end portions, and at least one unit filter bank connected in parallel to the at least one repair pattern, respectively.

Abstract translation: 提供可调电感（AI）滤波器，包括滤波器的带分配基板以及包括带分布基板的显示面板组件。 可调电感（AI）滤波器包括滤波器分配线，滤波器分配线包括每个具有第一线宽度的第一和第二端部，具有第二线宽并且设置在第一和第二端部之间的至少一个修复图案，以及至少一个 单元滤波器组分别与所述至少一个修复模式并联连接。

公开(公告)号：US20070194427A1

公开(公告)日：2007-08-23

申请号：US11541779

申请日：2006-10-03

Applicant: Yun-Seok Choi ,  Hee-Seok Lee

Inventor： Yun-Seok Choi ,  Hee-Seok Lee

IPC: H01L23/02

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/5227 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05001 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01Q9/27 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A semiconductor package comprises a package board and a plurality of semiconductor chips sequentially stacked on the package board. Each of the semiconductor chips comprises a semiconductor substrate and an open loop-shaped chip line formed on the semiconductor substrate. The open loop-shaped chip line has first and second end portions. The first and second end portions of the open loop-shaped chip lines are electrically connected to each other by connectors, and the connectors and the open loop-shaped chip lines constitute a spiral antenna.

Abstract translation: 半导体封装包括封装板和顺序堆叠在封装板上的多个半导体芯片。 每个半导体芯片包括半导体衬底和形成在半导体衬底上的开环形芯片线。 开环状的芯片线具有第一和第二端部。 开环状芯片线的第一和第二端部通过连接器彼此电连接，并且连接器和开环形芯片线构成螺旋形天线。

公开(公告)号：US20060075760A1

公开(公告)日：2006-04-13

申请号：US11217597

申请日：2005-08-31

Applicant: Yun-Hyeok Im ,  Suk-Chae Kang ,  Hee-Seok Lee

Inventor： Yun-Hyeok Im ,  Suk-Chae Kang ,  Hee-Seok Lee

IPC: F25B21/02 ,  F25D23/12 ,  H01L35/28 ,  F24F7/00

CPC classification number: H01L22/34 ,  H01L23/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An embodiment relates to a temperature measuring device using a matrix switch, and a semiconductor package. In another embodiment a cooling system may be included. A plurality of temperature sensors may be arranged on a surface of a semiconductor device. The matrix switch may select the temperature sensors by an address method to form a circuit that includes the selected temperature sensor. A measuring unit may receive an output signal of the selected temperature sensor to calculate the temperature at the selected temperature sensor.

Abstract translation: 实施例涉及使用矩阵开关的温度测量装置和半导体封装。 在另一个实施例中，可以包括冷却系统。 多个温度传感器可以布置在半导体器件的表面上。 矩阵开关可以通过地址方法来选择温度传感器，以形成包括所选温度传感器的电路。 测量单元可以接收所选温度传感器的输出信号，以计算所选温度传感器的温度。

公开(公告)号：US20050194673A1

公开(公告)日：2005-09-08

申请号：US11033997

申请日：2005-01-13

Applicant: Heung-Kyu Kwon ,  Hee-Seok Lee

Inventor： Heung-Kyu Kwon ,  Hee-Seok Lee

IPC: H01L25/18 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L25/16 ,  H01L29/06 ,  H01L23/02

CPC classification number: H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/16 ,  H01L29/0657 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16153 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A multi-chip package, a semiconductor device used therein, and manufacturing method thereof are provided. The multi-chip package may include a substrate having a plurality of substrate bonding pads formed on an upper surface thereof, at least one first semiconductor chip mounted on the substrate, and at least one second semiconductor chip mounted on the substrate where the at least one first semiconductor chip may be mounted. The at least one second semiconductor chip may include at least one three-dimensional space so as to allow the at least one first semiconductor chip to be enclosed within the at least one three-dimensional space. The at least one three-dimensional space may be a cavity, a groove, or a combination thereof.

Abstract translation: 提供一种多芯片封装，其中使用的半导体器件及其制造方法。 多芯片封装可以包括具有形成在其上表面上的多个衬底焊盘的衬底，安装在衬底上的至少一个第一半导体芯片以及安装在衬底上的至少一个第二半导体芯片，其中至少一个 可以安装第一半导体芯片。 至少一个第二半导体芯片可以包括至少一个三维空间，以便允许至少一个第一半导体芯片封装在至少一个三维空间内。 所述至少一个三维空间可以是空腔，凹槽或其组合。

公开(公告)号：US20050146018A1

公开(公告)日：2005-07-07

申请号：US11028553

申请日：2005-01-05

Applicant: Kyung-Lae Jang ,  Hee-Seok Lee

Inventor： Kyung-Lae Jang ,  Hee-Seok Lee

IPC: H01L23/14 ,  H01L21/60 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H01L23/52 ,  H01L23/58 ,  H01L23/66 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/50 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T307/406 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A package circuit board having a reduced package size. The package circuit board may include a semiconductor substrate in place of a printed circuit board. The package circuit board may further include a microelectronic chip mounted on the semiconductor substrate, the microelectronic chip having at least one of active and passive elements formed on the semiconductor substrate semiconductor substrate.

Abstract translation: 具有减小的封装尺寸的封装电路板。 封装电路板可以包括代替印刷电路板的半导体衬底。 封装电路板还可以包括安装在半导体衬底上的微电子芯片，该微电子芯片具有形成在半导体衬底半导体衬底上的有源和无源元件中的至少一个。

公开(公告)号：US09557616B2

公开(公告)日：2017-01-31

申请号：US13242394

申请日：2011-09-23

Applicant: Ye-Chung Chung ,  Hee-seok Lee ,  Yun-Seok Choi ,  Keung-Beum Kim

Inventor： Ye-Chung Chung ,  Hee-seok Lee ,  Yun-Seok Choi ,  Keung-Beum Kim

IPC: G06F3/038 ,  H03K3/00 ,  G02F1/1345

CPC classification number: H01L27/1244 ,  G02F1/13452 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2310/08 ,  G09G2330/021 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/13124 ,  H01L2224/13639 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/1426 ,  H05K1/148

Abstract: An image display panel assembly includes a flexible printed circuit (FPC), an image display panel, a gate driver integrated circuit (IC) package, and a source driver IC package. The FPC is configured to receive gate and source driving signals. The image display panel is electrically connected to the FPC, and includes a gate driving signal transfer pattern along a first edge of the image display panel, a source driving signal transfer pattern along a second edge adjacent to the first end, and a plurality of pixels. The gate driver integrated circuit (IC) package is configured to receive the gate driving signal through the gate driving signal transfer pattern and provide the gate driving signal to the plurality of pixels. The source driver IC package is configured to receive the source driving signal through the source driving signal transfer pattern and provide the source driving signal to the plurality of pixels.

Abstract translation: 图像显示面板组件包括柔性印刷电路（FPC），图像显示面板，栅极驱动器集成电路（IC）封装以及源极驱动器IC封装。 FPC被配置为接收门和源驱动信号。 图像显示面板电连接到FPC，并且包括沿着图像显示面板的第一边缘的栅极驱动信号传递图案，沿着与第一端相邻的第二边缘的源极驱动信号传递图案，以及多个像素 。 栅极驱动器集成电路（IC）封装被配置为通过栅极驱动信号传输图案接收栅极驱动信号，并将栅极驱动信号提供给多个像素。 源极驱动器IC封装被配置为通过源极驱动信号传输图案接收源极驱动信号，并将源极驱动信号提供给多个像素。

公开(公告)号：US20140124906A1

公开(公告)日：2014-05-08

申请号：US13947417

申请日：2013-07-22

Applicant: Soo-Jeoung Park ,  Hee-Seok Lee

Inventor： Soo-Jeoung Park ,  Hee-Seok Lee

IPC: H01L23/552 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00

Abstract: A semiconductor package includes a mounting substrate having a chip-mounting region and a peripheral region. A first semiconductor chip is mounted on the chip-mounting region of the mounting substrate. A first molding member covers at least a portion of the first semiconductor chip on the mounting substrate. A plurality of first conductive connection members penetrate through at least a portion of the first molding member to protrude from the first molding member. The first conductive connection members are electrically connected to a plurality of ground connection pads provided on the peripheral region of the mounting substrate, respectively. An electromagnetic interference (EMI) shield member is disposed on an upper surface of the first molding member to cover the first semiconductor chip. The EMI shield member is supported by the first conductive molding members and spaced apart from the first molding member.

Abstract translation: 半导体封装包括具有芯片安装区域和周边区域的安装基板。 第一半导体芯片安装在安装基板的芯片安装区域上。 第一模制构件覆盖安装基板上的第一半导体芯片的至少一部分。 多个第一导电连接构件穿过第一模制构件的至少一部分以从第一模制构件突出。 第一导电连接构件分别电连接到设置在安装基板的周边区域上的多个接地连接焊盘。 电磁干扰（EMI）屏蔽构件设置在第一模制构件的上表面上以覆盖第一半导体芯片。 EMI屏蔽构件由第一导电模制构件支撑并与第一模制构件间隔开。