公开(公告)号：US08219352B2

公开(公告)日：2012-07-10

申请号：US12751366

申请日：2010-03-31

Applicant: Yuichi Taguchi ,  Tim Marks

Inventor： Yuichi Taguchi ,  Tim Marks

IPC: G06F15/00

CPC classification number: B25J9/1694

Abstract: Embodiments of the invention disclose a system and a method for determining a pose of a probe relative to an object by probing the object with the probe, comprising steps of: determining a probability of the pose using Rao-Blackwellized particle filtering, wherein a probability of a location of the pose is represented by a location of each particle, and a probability of an orientation of the pose is represented by a Gaussian distribution over orientation of each particle conditioned on the location of the particle, wherein the determining is performed for each subsequent probing until the probability of the pose concentrates around a particular pose; and estimating the pose of the probe relative to the object based on the particular pose.

Abstract translation: 本发明的实施例公开了一种用于通过用探针探测物体来确定探针相对于物体的姿势的系统和方法，包括以下步骤：使用Rao-Blackwellized粒子滤波来确定姿势的概率，其中概率 姿势的位置由每个粒子的位置表示，姿势取向的概率由调整在粒子位置上的每个粒子的取向上的高斯分布表示，其中对每个随后的粒子进行确定 探测到姿势集中在特定姿势周围的概率; 以及基于特定姿势估计探针相对于物体的姿态。

公开(公告)号：US08178957B2

公开(公告)日：2012-05-15

申请号：US12704146

申请日：2010-02-11

Applicant: Yuichi Taguchi ,  Akinori Shiraishi ,  Mitsutoshi Higashi ,  Kei Murayama

Inventor： Yuichi Taguchi ,  Akinori Shiraishi ,  Mitsutoshi Higashi ,  Kei Murayama

IPC: H01L29/72

CPC classification number: H01L23/13 ,  B81B7/007 ,  B81B2207/096 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73265 ,  H01L2224/81097 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/351 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacturing an electronic component device, includes the steps of preparing a wiring substrate, which includes a silicon substrate, a concave portion provided on its upper surface side, a through hole formed to penetrate the silicon substrate on a bottom surface side of the concave portion, an insulating layer formed on the silicon substrate, a penetration electrode constructed by a lower conductor portion formed to a halfway position of a height direction from a bottom portion of the through hole and a connection metal member (indium layer) formed on the lower conductor portion in the through hole, and an electronic component having a terminal metal member (gold bump) on a lower surface side, and softening the connection metal member of the wiring substrate in a heating atmosphere and then sticking the terminal metal member of the electronic component into the connection metal member and connecting thereto.

Abstract translation: 一种电子部件装置的制造方法，其特征在于，包括：制作布线基板的步骤，所述布线基板包括硅基板，设置在其上表面侧的凹部，形成为贯通所述硅基板的通孔， 形成在硅基板上的绝缘层，由形成在通孔的底部的高度方向的中途位置的下部导体部分构成的贯通电极，以及形成在该基板上的连接金属部件（铟层） 通孔中的下导体部分和在下表面侧具有端子金属部件（金凸块）的电子部件，并且在加热气氛中软化接线基板的连接金属部件，然后将端子金属部件 电子部件插入连接金属部件并与其连接。

公开(公告)号：US08148738B2

公开(公告)日：2012-04-03

申请号：US11812149

申请日：2007-06-15

Applicant: Kei Murayama ,  Mitsutoshi Higashi ,  Naoyuki Koizumi ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Masahiro Sunohara

Inventor： Kei Murayama ,  Mitsutoshi Higashi ,  Naoyuki Koizumi ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Masahiro Sunohara

IPC: H01L31/12

CPC classification number: H01L25/167 ,  H01L23/147 ,  H01L23/4926 ,  H01L23/62 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/32145 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a semiconductor device 100, a light emitting element 120 has been mounted on an upper plane of a semiconductor substrate 102. In an impurity diffusion region of the semiconductor substrate 102, a P conducting type of a layer 104, and an N layer 106 have been formed, while an N conducting type impurity is implanted to the P layer 104, and then the implanted impurity is diffused to constitute the N layer 106. A zener diode 108 made of a semiconductor device has been formed by the P layer 104 and the N layer 106.

Abstract translation: 在半导体器件100中，发光元件120已经被安装在半导体衬底102的上平面上。在半导体衬底102的杂质扩散区域中，P导电类型的层104和N层106具有 形成N导电型杂质，然后将N导电型杂质注入到P层104中，然后将注入的杂质扩散以构成N层106.由P层104形成由半导体器件制成的齐纳二极管108， N层106。

公开(公告)号：US20110316968A1

公开(公告)日：2011-12-29

申请号：US12825608

申请日：2010-06-29

Applicant: Yuichi Taguchi ,  Amit K. Agrawal ,  Ashok N. Veeraraghavan ,  Srikumar Ramalingam ,  Ramesh Raskar

Inventor： Yuichi Taguchi ,  Amit K. Agrawal ,  Ashok N. Veeraraghavan ,  Srikumar Ramalingam ,  Ramesh Raskar

IPC: H04N7/00

CPC classification number: G06T5/50 ,  G06T2200/21 ,  G06T2207/10052 ,  H04N5/23238

Abstract: A single camera acquires an input image of a scene as observed in an array of spheres, wherein pixels in the input image corresponding to each sphere form a sphere image. A set of virtual cameras are defined for each sphere on a line joining a center of the sphere and a center of projection of the camera, wherein each virtual camera has a different virtual viewpoint and an associated cone of rays, appearing as a circle of pixels on its virtual image plane. A projective texture mapping of each sphere image is applied to all of the virtual cameras on the virtual image plane to produce a virtual camera image comprising circle of pixels. Each virtual camera image for each sphere is then projected to a refocusing geometry using a refocus viewpoint to produce a wide-angle lightfield view, which are averaged to produce a refocused wide-angle image.

Abstract translation: 单个相机获取在球体阵列中观察到的场景的输入图像，其中与每个球体对应的输入图像中的像素形成球面图像。 在连接球体中心的线和摄像机的投影中心的线上为每个球体定义一组虚拟照相机，其中每个虚拟照相机具有不同的虚拟视点和相关联的光线锥，呈现为像素圆 在其虚拟图像平面上。 每个球体图像的投影纹理映射被应用于虚拟图像平面上的所有虚拟相机，以产生包括像素圆的虚拟相机图像。 然后使用重聚焦点将每个球体的每个虚拟照相机图像投影到重聚焦几何，以产生广角光场视图，其被平均以产生重新聚焦的广角图像。

公开(公告)号：US08078815B2

公开(公告)日：2011-12-13

申请号：US12247508

申请日：2008-10-08

Applicant: Noriko Nakajima ,  Yuichi Taguchi ,  Jun Mizuno

Inventor： Noriko Nakajima ,  Yuichi Taguchi ,  Jun Mizuno

IPC: G06F12/16

CPC classification number: G06F3/0634 ,  G06F3/0611 ,  G06F3/0625 ,  G06F3/065 ,  G06F3/0689 ,  G06F11/1456 ,  G06F11/1458 ,  Y02D10/154

Abstract: A storage subsystem includes: a controller; a first logical storage area corresponding to a RAID group configured by a plurality of storage devices; and a second logical storage area corresponding to a plurality of the RAID groups each configured by the plurality of storage devices, and storing a copy of data stored in the first logical storage area. In the storage subsystem, the first and second logical storage areas form a copy group, and for starting copying from the first to second logical storage area, the controller performs a mode change, from a power saving mode to a ready mode, to the plurality of storage devices configuring the plurality of RAID groups corresponding to the second logical storage area. With such a storage subsystem, the time can be reduced for activating copy-destination storage devices to which a power saving function is applied, and the copy time is thus favorably reduced.

Abstract translation: 存储子系统包括：控制器; 对应于由多个存储设备配置的RAID组的第一逻辑存储区域; 以及对应于由所述多个存储设备配置的多个RAID组的第二逻辑存储区域，并且存储存储在所述第一逻辑存储区域中的数据的副本。 在存储子系统中，第一逻辑存储区域和第二逻辑存储区域形成复制组，并且为了开始从第一逻辑存储区域到第二逻辑存储区域的复制，控制器执行从省电模式到准备模式的模式改变到多个 配置与第二逻辑存储区域对应的多个RAID组的存储装置。 利用这种存储子系统，可以减少用于激活应用功率节省功能的复制目的地存储设备的时间，因此有利地减少了复制时间。

公开(公告)号：US08074091B2

公开(公告)日：2011-12-06

申请号：US12177387

申请日：2008-07-22

Applicant: Hirotaka Nakagawa ,  Yuichi Taguchi ,  Taro Inoue

Inventor： Hirotaka Nakagawa ,  Yuichi Taguchi ,  Taro Inoue

IPC: G06F1/32

CPC classification number: G06F1/26 ,  G06F11/008

Abstract: Proposed is an operation method for seeking a power interruption operation target in which MTBF will become longest. When a target value regarding a power interruption time and a target value regarding a power interruption count per 24 hours is input from an administrator to a management computer, the management computer calculates the MTBF after one year and the annual power consumption for each of the input target values, and, as a power interruption operation target in which the MTBF will become longest in one year, a target value regarding a power interruption time and a target value regarding a power interruption count are respectively selected among multiple target values in which the MTBF will become longest based on each of the calculation results, and displayed on a screen of an output unit.

Abstract translation: 提出了一种用于寻找MTBF将变得最长的电力中断操作目标的操作方法。 当从管理员向管理计算机输入关于电源中断时间的目标值和关于每24小时的电力中断计数的目标值时，管理计算机计算一年后的MTBF和每个输入的年耗电量 目标值，并且作为MTBF在一年内变得最长的功率中断运行目标，分别在多个目标值中选择关于功率中断时间的目标值和关于功率中断计数的目标值，其中MTBF 将基于每个计算结果变得最长，并且显示在输出单元的屏幕上。

公开(公告)号：US08074090B2

公开(公告)日：2011-12-06

申请号：US11510832

申请日：2006-08-24

Applicant: Hirotaka Nakagawa ,  Masayasu Asano ,  Yuichi Taguchi ,  Masayuki Yamamoto

Inventor： Hirotaka Nakagawa ,  Masayasu Asano ,  Yuichi Taguchi ,  Masayuki Yamamoto

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F3/0625 ,  G06F1/3221 ,  G06F1/3268 ,  G06F3/0634 ,  G06F3/067 ,  G06F3/0689 ,  Y02D10/154

Abstract: Conventionally, no consideration was given to the control of the main power supply circuit in a storage apparatus. Thus, unnecessary electric power will be consumed because it is not possible to inhibit the power consumption of the main power supply circuit of the storage apparatus. With this storage system having a plurality of storage apparatuses, a storage apparatus internally has a power supply control program for controlling the respective components and the main power supply circuit, and the power supply control command program provided to the management computer migrates a storage extent to be used for business to another storage apparatus based on the operation schedule of business to use the storage extent of the storage apparatus, and commands the power supply control of the main power supply circuit in the storage apparatuses and the respective components.

Abstract translation: 通常，没有考虑到存储装置中的主电源电路的控制。 因此，由于不能抑制存储装置的主电源电路的电力消耗，所以不必要的电力将被消耗。 在该存储系统具有多个存储装置的情况下，存储装置内部具有用于控制各个部件和主电源电路的电源控制程序，并且提供给管理计算机的电源控制指令程序将存储范围迁移到 根据业务的运行时间表将存储装置的存储范围用于另一个存储装置的业务，并且指定存储装置和各个组件中的主电源电路的电源控制。

公开(公告)号：US20110272821A1

公开(公告)日：2011-11-10

申请号：US13098620

申请日：2011-05-02

Applicant: Yuichi TAGUCHI ,  Akinori Shiraishi

Inventor： Yuichi TAGUCHI ,  Akinori Shiraishi

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/6835 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/1461 ,  H01L2924/00

Abstract: A wiring substrate manufactured by thinning a silicon substrate, which is coated by an insulation film, from a lower surface to an upper surface to form a substrate body. The substrate body is etched using a resist, which includes an opening, as a mask and the insulation film as an etching stopper layer to form a through hole and a cover, which covers an opening of the through hole at the upper surface of the substrate body. In a state in which the cover is formed, a functional element is formed on the upper surface of a further insulation film at the upper side of the substrate body. Then, a through electrode is formed in at least the through hole.

Abstract translation: 通过将由绝缘膜涂覆的硅衬底从下表面变薄到上表面而制造的布线衬底以形成衬底本体。 使用包括开口作为掩模的抗蚀剂和作为蚀刻停止层的绝缘膜以形成通孔和覆盖物的覆盖基板本体的上表面的通孔的蚀刻 身体。 在形成盖的状态下，在基板主体的上侧的另一绝缘膜的上表面上形成功能元件。 然后，至少在通孔中形成贯通电极。

公开(公告)号：US08053886B2

公开(公告)日：2011-11-08

申请号：US12535751

申请日：2009-08-05

Applicant: Yuichi Taguchi ,  Mitsutoshi Higashi ,  Akinori Shiraishi ,  Hideaki Sakaguchi ,  Masahiro Sunohara

Inventor： Yuichi Taguchi ,  Mitsutoshi Higashi ,  Akinori Shiraishi ,  Hideaki Sakaguchi ,  Masahiro Sunohara

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/6835 ,  H01L21/7682 ,  H01L21/76898 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/6835 ,  H01L2221/68372 ,  H01L2224/02335 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A semiconductor package includes a wiring board and a semiconductor device mounted on the wiring board. At least one penetration hole extends from one surface of the semiconductor chip to an opposite surface of the semiconductor chip. A penetration electrode is situated inside the penetration hole without contacting a wall of the penetration hole. The penetration electrode has one end fixed to the one surface of the semiconductor chip and an opposite end protruding from the opposite surface of the semiconductor chip. A connection terminal is formed on the opposite end of the penetration electrode and electrically connected to the wiring board.

Abstract translation: 半导体封装包括布线板和安装在布线板上的半导体器件。 至少一个穿透孔从半导体芯片的一个表面延伸到半导体芯片的相对表面。 穿透电极位于穿透孔的内部，而不与穿透孔的壁接触。 穿透电极具有固定在半导体芯片的一个表面上的一端和从半导体芯片的相对表面突出的相对端。 连接端子形成在穿透电极的相对端并电连接到布线板。

公开(公告)号：US08044429B2

公开(公告)日：2011-10-25

申请号：US12907594

申请日：2010-10-19

Applicant: Mitsutoshi Higashi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Kei Murayama ,  Naoyuki Koizumi ,  Hideaki Sakaguchi

Inventor： Mitsutoshi Higashi ,  Masahiro Sunohara ,  Yuichi Taguchi ,  Akinori Shiraishi ,  Kei Murayama ,  Naoyuki Koizumi ,  Hideaki Sakaguchi

IPC: H01L29/267 ,  H01L29/16

CPC classification number: H01L33/60 ,  H01L33/62 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  Y10T29/49002 ,  Y10T83/04 ,  H01L2224/05599

Abstract: A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.

Abstract translation: 一种发光装置，其包括发光元件和布置有发光元件的基板。 壳体部分容纳发光元件并且具有从基板向上倾斜的形状以及围绕发光元件的金属框架并且包括被制成几乎镜面抛光表面的壳体部分的侧面设置在 底物。