公开(公告)号：US09711447B1

公开(公告)日：2017-07-18

申请号：US15290277

申请日：2016-10-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Qiang Fang ,  Daniel W. Fisher ,  Haigou Huang ,  Jinping Liu ,  Haifeng Sheng ,  Zhiguo Sun

IPC: H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/528 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76877 ,  H01L23/53238

Abstract: Methods of lithographic patterning and structures formed by lithographic patterning. A hardmask layer is formed on a dielectric layer, a feature is formed on the hardmask layer, and a mandrel is formed that extends in a first direction across the first feature. The mandrel and the hardmask layer beneath the mandrel are removed to pattern the hardmask layer with the feature masking a section of the hardmask layer. After the hardmask layer is patterned, the dielectric layer is etched to form a first trench and a second trench that are separated by a section of the dielectric layer masked by the section of the hardmask layer. The first trench and the second trench are filled with a conductor layer to respectively form a first wire and a second wire that is separated from the first wire by the section of the dielectric layer.

公开(公告)号：US20170047242A1

公开(公告)日：2017-02-16

申请号：US14822258

申请日：2015-08-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zhiguo Sun ,  Qiang Fang ,  Christian Witt

IPC: H01L21/764 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02

CPC classification number: H01L21/764 ,  H01L21/02068 ,  H01L21/02356 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76883 ,  H01L23/5222 ,  H01L23/53295

Abstract: One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a layer of insulating material, performing at least one damage-causing process operation to selectively damage portions of the insulating material adjacent the trenches, forming a conductive line in each of the trenches, after forming the conductive lines, performing a selective etching process to selectively remove at least portions of the damaged portions of the insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines, and forming a capping layer of material above the conductive lines, the air gap and the undamaged portion of the layer of insulating material.

Abstract translation: 本文公开的一种说明性方法除其他外包括在绝缘材料层中形成多个沟槽，执行至少一个损坏造成处理操作以选择性地损坏邻近沟槽的绝缘材料的部分，在每个沟槽中形成导电线 在形成导电线之后，执行选择性蚀刻工艺以选择性地去除绝缘材料的损坏部分的至少一部分，从而限定横向邻近每条导电线的气隙，并且形成覆盖层 导电线上方的材料，空气间隙和绝缘材料层的未损坏部分。

公开(公告)号：US09275898B1

公开(公告)日：2016-03-01

申请号：US14637442

申请日：2015-03-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Zhiguo Sun ,  Yang Bum Lee ,  Huang Liu

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/53228 ,  C23C16/04 ,  C23C16/16 ,  C23C16/45523 ,  H01L21/28562 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76862 ,  H01L21/76883 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming a Co cap on a Cu interconnect in or through an ULK ILD with improved selectivity while protecting an ULK ILD surface are provided. Embodiments include providing a Cu filled via in an ULK ILD; depositing a Co precursor and H2 over the Cu-filled via and the ULK ILD, the Co precursor and H2 forming a Co cap over the Cu-filled via; depositing an UV cured methyl over the Co cap and the ULK ILD; performing an NH3 plasma treatment after depositing the UV cured methyl; and repeating the steps of depositing a Co precursor through performing an NH3 plasma treatment to remove impurities from the Co cap.

Abstract translation: 提供了在保护ULK ILD表面的情况下，通过ULK ILD或通过ULK ILD在Cu互连上形成Co帽的方法，其具有改进的选择性。 实施例包括在ULK ILD中提供Cu填充的通孔; 在Cu填充的通孔和ULK ILD上沉积Co前体和H 2，Co前体和H 2在Cu填充的通孔上形成Co盖; 在Co盖和ULK ILD上沉积UV固化的甲基; 沉积UV固化甲基后进行NH3等离子体处理; 并且重复以下步骤：通过进行NH 3等离子体处理来沉积Co前体以从Co盖去除杂质。

公开(公告)号：US09184288B2

公开(公告)日：2015-11-10

申请号：US14207822

申请日：2014-03-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sipeng Gu ,  Zhiguo Sun ,  Sandeep Gaan ,  Danni Chen ,  Wen-Pin Peng ,  Huang Liu

IPC: H01L21/8238 ,  H01L29/78 ,  H01L29/40 ,  H01L21/02

CPC classification number: H01L29/7843 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02205 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/76801 ,  H01L21/76829 ,  H01L29/401 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

Abstract: Semiconductor structures and fabrication methods are provided having a bridging film which facilitates adherence of both an underlying layer of dielectric material and an overlying stress-inducing layer. The method includes, for instance, providing a layer of dielectric material, with at least one gate structure disposed therein, over a semiconductor substrate; providing a bridging film over the layer of dielectric material with the at least one gate structure; and providing a stress-inducing layer over the bridging film. The bridging film is selected to facilitate adherence of both the underlying layer of dielectric material and the overlying stress-inducing layer by, in part, forming a chemical bond with the layer of dielectric material, without forming a chemical bond with the stress-inducing layer.

Abstract translation: 提供半导体结构和制造方法，其具有桥接膜，其有助于介电材料的下层和上覆的应力诱导层的粘附。 该方法包括例如在半导体衬底上提供其中设置有至少一个栅极结构的电介质材料层; 在所述介​​电材料层上提供具有所述至少一个栅极结构的桥接膜; 并在桥接膜上提供应力诱导层。 选择桥接膜以便于通过部分地与电介质材料层形成化学键而使介电材料的下层和上覆的应力诱导层两者粘附，而不与应力诱导层形成化学键 。

公开(公告)号：US08993446B2

公开(公告)日：2015-03-31

申请号：US13868412

申请日：2013-04-23

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hung-Wei Liu ,  Tsung-Liang Chen ,  Huang Liu ,  Zhiguo Sun

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/02112 ,  H01L21/02129 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/76837

Abstract: A method for flowable oxide deposition is provided. An oxygen source gas is increased as a function of time or film depth to change the flowable oxide properties such that the deposited film is optimized for gap fill near a substrate surface where high aspect ratio shapes are present. The oxygen gas flow rate increases as the film depth increases, such that the deposited film is optimized for planarization quality at the upper regions of the deposited film.

Abstract translation: 提供了一种可流动氧化物沉积的方法。 作为时间或膜深度的函数，氧源气体增加以改变可流动的氧化物性质，使得沉积膜针对存在高纵横比形状的衬底表面附近的间隙填充进行了优化。 氧气流速随着膜深度的增加而增加，使得沉积膜对沉积膜的上部区域的平坦化质量进行了优化。

公开(公告)号：US20190318931A1

公开(公告)日：2019-10-17

申请号：US15950364

申请日：2018-04-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jiehui Shu ,  Xiaohan Wang ,  Qiang Fang ,  Zhiguo Sun ,  Jinping Liu ,  Hui Zang

IPC: H01L21/033 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522

Abstract: Methods of self-aligned multiple patterning and structures formed by self-aligned multiple patterning. A mandrel line is patterned from a first mandrel layer disposed on a hardmask and a second mandrel layer disposed over the first mandrel layer. A first section of the second mandrel layer of the mandrel line is removed to expose a first section of the first mandrel layer. The first section of the first mandrel layer is masked, and the second sections of the second mandrel layer and the underlying second portions of the first mandrel layer are removed to expose first portions of the hardmask. The first portions of the hardmask are then removed with an etching process to form a trench in the hardmask. A second portion of the hardmask is masked by the first portion of the first mandrel layer during the etching process to form a cut in the trench.

公开(公告)号：US09595493B2

公开(公告)日：2017-03-14

申请号：US14822597

申请日：2015-08-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zhiguo Sun ,  Qiang Fang ,  Huang Liu ,  Haigou Huang ,  Jiehui Shu ,  Jin Ping Liu

IPC: H01L21/76 ,  H01L23/528 ,  H01L21/3065 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L21/321

CPC classification number: H01L23/528 ,  H01L21/3065 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76853 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/53204 ,  H01L23/53238 ,  H01L23/53266

Abstract: Reducing liner corrosion during metallization of semiconductor devices at BEOL includes providing a starting metallization structure, the structure including a bottom layer of dielectric material with a via therein, a liner lining the via and extending over upper edges thereof, the lined via over filled with a conductive material, recessing the conductive material down to the liner, further selectively recessing the conductive material below the upper edges of the via without damaging the liner, and forming a cap of the liner material on the conductive material.

Abstract translation: 在BEOL的半导体器件的金属化期间减少衬里腐蚀包括提供起始金属化结构，该结构包括介电材料的底层，其中具有通孔，衬套衬套通孔并在其上边缘延伸的衬里，衬里通孔填充有 导电材料将导电材料向下凹入衬垫，进一步选择性地使导电材料在通孔的上边缘下方凹陷，而不损坏衬垫，并且在导电材料上形成衬垫材料的帽。

公开(公告)号：US09418832B2

公开(公告)日：2016-08-16

申请号：US14624786

申请日：2015-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hung-Wei Liu ,  Tsung-Liang Chen ,  Huang Liu ,  Zhiguo Sun

IPC: H01L21/302 ,  H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02112 ,  H01L21/02129 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/76837

Abstract: A method for flowable oxide deposition is provided. An oxygen source gas is increased as a function of time or film depth to change the flowable oxide properties such that the deposited film is optimized for gap fill near a substrate surface where high aspect ratio shapes are present. The oxygen gas flow rate increases as the film depth increases, such that the deposited film is optimized for planarization quality at the upper regions of the deposited film.

公开(公告)号：US09349608B2

公开(公告)日：2016-05-24

申请号：US14106340

申请日：2013-12-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Zhiguo Sun ,  Daniel Smith ,  Kumarapuram Gopalakrishnan ,  Hung-Wei Liu

IPC: H01L23/48 ,  H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/31 ,  H01L23/29 ,  H01L21/308 ,  H01L21/311 ,  H01L21/321

CPC classification number: H01L21/32051 ,  H01L21/3081 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76898 ,  H01L23/291 ,  H01L23/3192 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Devices and methods for forming semiconductor devices with a protection layer for a dielectric mask layer are provided. One method includes, for instance; obtaining a substrate having at least one of a dielectric layer and a metal layer; forming a first SiCN dielectric mask layer on a top surface of at least one of the dielectric layer and a metal layer; and forming a silicon nitride (SiNx) cap layer on a top surface of the first SiCN dielectric mask layer. One intermediate semiconductor device includes, for instance: a substrate having at least one of a dielectric layer and a metal layer; a first SiCN dielectric mask layer on a top surface of at least one of the dielectric layer and a metal layer; and a silicon nitride (SiNx) cap layer on a top surface of the first SiCN dielectric mask layer.

Abstract translation: 提供了用于形成具有用于介电掩模层的保护层的半导体器件的器件和方法。 一种方法包括： 获得具有电介质层和金属层中的至少一个的衬底; 在所述电介质层和金属层中的至少一个的顶表面上形成第一SiCN电介质掩模层; 以及在所述第一SiCN介电掩模层的顶表面上形成氮化硅（SiNx）覆盖层。 一个中间半导体器件包括例如：具有电介质层和金属层中的至少一个的衬底; 在所述电介质层和金属层中的至少一个的顶表面上的第一SiCN介电掩模层; 和在第一SiCN介电掩模层的顶表面上的氮化硅（SiNx）覆盖层。

公开(公告)号：US09076645B1

公开(公告)日：2015-07-07

申请号：US14272554

申请日：2014-05-08

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shishir Ray ,  Sandeep Gaan ,  Jin Ping Liu ,  Zhiguo Sun

IPC: H01L21/31 ,  H01L21/02

CPC classification number: H01L21/02112 ,  H01L21/02123 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02255 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/7682 ,  H01L21/76828 ,  H01L2221/1047

Abstract: Circuit structure fabrication methods are provided which include: providing an interlayer structure above a substrate, the interlayer structure including porogens dispersed within a dielectric material; and pulse laser annealing the interlayer structure to form a treated interlayer structure, the pulse laser annealing polymerizing the dielectric material of the interlayer structure to form a polymeric dielectric material, that includes pores disposed therein. The pulse laser annealing facilitates increasing elasticity modulus of the treated interlayer structure by, in part, maintaining structural integrity of the treated interlayer structure, notwithstanding that there are pores disposed within the polymeric dielectric material which, for instance, facilitates reducing dielectric constant of the treated interlayer structure.

Abstract translation: 提供了电路结构制造方法，其包括：在基底之上提供层间结构，所述层间结构包括分散在电介质材料内的致孔剂; 并且脉冲激光退火层间结构以形成经处理的层间结构，脉冲激光退火聚合层间结构的电介质材料以形成聚合物电介质材料，其包括设置在其中的孔。 脉冲激光退火有助于通过部分地维持经处理的层间结构的结构完整性来提高经处理的层间结构的弹性模量，尽管在聚合物电介质材料内设置孔，其例如有助于降低经处理的层间结构的介电常数 夹层结构。