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101 条记录 (耗时 0.036 秒)

    SEMICONDUCTOR DEVICE
    11.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20150179813A1

    公开(公告)日：2015-06-25

    申请号：US14636589

    申请日：2015-03-03

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Akihisa SHIMOMURA ,  Hidekazu MIYAIRI ,  Fumito ISAKA ,  Yasuhiro JINBO ,  Junya MARUYAMA

    IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L21/02

    CPC分类号： H01L21/02683 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02686 ,  H01L21/2026 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675

    摘要： It is an object to provide a method of manufacturing a crystalline silicon device and a semiconductor device in which formation of cracks in a substrate, a base protective film, and a crystalline silicon film can be suppressed. First, a layer including a semiconductor film is formed over a substrate, and is heated. A thermal expansion coefficient of the substrate is 6×10−7/° C. to 38×10−7/° C., preferably 6×10−7/° C. to 31.8×10−7/° C. Next, the layer including the semiconductor film is irradiated with a laser beam to crystallize the semiconductor film so as to form a crystalline semiconductor film. Total stress of the layer including the semiconductor film is −500 N/m to +50 N/m, preferably −150 N/m to 0 N/m after the heating step.

    摘要翻译： 本发明的目的是提供一种制造晶体硅器件和半导体器件的方法，其中可以抑制衬底，基底保护膜和晶体硅膜中的裂纹的形成。 首先，在基板上形成包含半导体膜的层，并加热。 基板的热膨胀系数为6×10-7 /℃至38×10-7 /℃，优选为6×10-7 /℃至31.8×10-7 /℃。接下来， 用激光束照射包含半导体膜的层，使半导体膜结晶化，形成结晶半导体膜。 包括半导体膜的层的总应力在加热步骤之后为-500N / m至+ 50N / m，优选为-150N / m至0N / m。

    Equipment For Manufacturing Light-Emitting Device
    16.
    发明公开
    Equipment For Manufacturing Light-Emitting Device 审中-公开

    公开(公告)号：US20240266195A1

    公开(公告)日：2024-08-08

    申请号：US18578100

    申请日：2022-07-05

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Shunpei YAMAZAKI ,  Yasuhiro JINBO ,  Tomoya AOYAMA ,  Daiki NAKAMURA

    IPC分类号： H01L21/67

    CPC分类号： H01L21/6719 ,  H01L21/67167 ,  H01L21/67207

    摘要： Manufacturing equipment with which steps from processing to sealing of an organic compound film can be continuously performed is provided. The manufacturing equipment can continuously perform a patterning step of a light-emitting device and a sealing step to prevent the top surfaces and side surfaces of organic layers from being exposed to the air, which allows formation of the light-emitting device which has a minute structure, high luminance, and high reliability. This manufacturing equipment can be built in an in-line system where apparatuses are arranged according to the order of process steps for the light-emitting device, resulting in high throughput manufacturing.

    SEMICONDUCTOR DEVICE
    18.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230320100A1

    公开(公告)日：2023-10-05

    申请号：US18024823

    申请日：2021-09-16

    申请人： Semiconductor Energy Laboratory Co., Ltd.

    发明人： Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Tatsuya ONUKI ,  Hitoshi KUNITAKE ,  Yasuhiro JINBO

    IPC分类号： H10B51/20 ,  H10B53/20

    CPC分类号： H10B51/20 ,  H10B53/20

    摘要： A memory device having large memory capacity is provided. A highly reliable memory device is provided. A semiconductor device includes a first conductive layer extending in a first direction, a structure body extending in a second direction intersecting with the first direction, a first insulating layer, and a second insulating layer. The structure body includes a functional layer, a semiconductor layer, a third insulating layer, and a second conductive layer. In an intersection portion of the first conductive layer and the structure body, the third insulating layer, the semiconductor layer, and the functional layer are placed concentrically around the second conductive layer in this order. The first insulating layer and the second insulating layer are stacked in the second direction. The functional layer and the first conductive layer are placed between the first insulating layer and the second insulating layer. The second conductive layer, the third insulating layer, and the semiconductor layer include a portion positioned inside a first opening provided in the first insulating layer and a portion positioned inside a second opening provided in the second insulating layer.