公开(公告)号：US12191399B2

公开(公告)日：2025-01-07

申请号：US18136431

申请日：2023-04-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro Tanaka ,  Mitsuhiro Ichijo ,  Toshiya Endo ,  Akihisa Shimomura ,  Yuji Egi ,  Sachiaki Tezuka ,  Shunpei Yamazaki

IPC: H01L29/49 ,  H01L29/423 ,  H01L29/786

Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.

公开(公告)号：US11310457B2

公开(公告)日：2022-04-19

申请号：US16663403

申请日：2019-10-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Satoshi Murakami ,  Motomu Kurata ,  Hiroyuki Hata ,  Mitsuhiro Ichijo ,  Takashi Ohtsuki ,  Aya Anzai ,  Masayuki Sakakura

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H04N5/655 ,  H01L27/12 ,  H01L27/32 ,  H01L51/52 ,  H01L33/60 ,  G06F3/02 ,  H04N5/64 ,  H01L51/00 ,  H01L51/56

Abstract: The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact is covered with an insulating layer to reduce the step, and is processed into a gentle shape. A wiring or the like is formed to be in contact with the insulating layer and thus the coverage of the wiring or the like is enhanced. In addition, deterioration of a light-emitting element due to contaminants such as water can be prevented by sealing a layer including an organic material that has water permeability in a display device with a sealing material. Since the sealing material is formed in a portion of a driver circuit region in the display device, the frame margin of the display device can be narrowed.

公开(公告)号：US10468531B2

公开(公告)日：2019-11-05

申请号：US15293434

申请日：2016-10-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kunio Kimura ,  Mitsuhiro Ichijo ,  Toshiya Endo

IPC: H01L29/786 ,  H01L21/316 ,  H01L21/30 ,  H01L29/49 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  H01L27/146 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1343 ,  G02F1/1368 ,  H01L27/32

Abstract: One object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. Another object is to manufacture a highly reliable semiconductor device in a high yield. In a top-gate staggered transistor including an oxide semiconductor film, as a first gate insulating film in contact with the oxide semiconductor film, a silicon oxide film is formed by a plasma CVD method with use of a deposition gas containing silicon fluoride and oxygen; and as a second gate insulating film stacked over the first gate insulating film, a silicon oxide film is formed by a plasma CVD method with use of a deposition gas containing silicon hydride and oxygen.

公开(公告)号：US09917209B2

公开(公告)日：2018-03-13

申请号：US15192312

申请日：2016-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hideomi Suzawa ,  Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshiya Endo ,  Mitsuhiro Ichijo

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78651 ,  H01L29/7869

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

公开(公告)号：US09806201B2

公开(公告)日：2017-10-31

申请号：US14636477

申请日：2015-03-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yoshinori Yamada ,  Yusuke Nonaka ,  Masashi Oota ,  Yoichi Kurosawa ,  Noritaka Ishihara ,  Takashi Hamada ,  Mitsuhiro Ichijo ,  Yuji Egi

IPC: H01L29/786 ,  H01L27/1156

CPC classification number: H01L29/78693 ,  H01L27/1156 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A method for forming an oxide that can be used as a semiconductor of a transistor or the like is provided. In particular, a method for forming an oxide with fewer defects such as grain boundaries is provided. One embodiment of the present invention is a semiconductor device including an oxide semiconductor, an insulator, and a conductor. The oxide semiconductor includes a region overlapping with the conductor with the insulator therebetween. The oxide semiconductor includes a crystal grain with an equivalent circle diameter of 1 nm or more and a crystal grain with an equivalent circle diameter less than 1 nm.

公开(公告)号：US09786495B2

公开(公告)日：2017-10-10

申请号：US14855648

申请日：2015-09-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa Shimomura ,  Naoki Okuno ,  Mitsuhiro Ichijo ,  Noriyoshi Suzuki ,  Tetsuhiro Tanaka ,  Sachiaki Tezuka

IPC: H01L21/02 ,  H01L21/66 ,  H01J37/32 ,  C23C14/08 ,  C23C14/58

CPC classification number: H01L21/0234 ,  C23C14/08 ,  C23C14/5806 ,  C23C14/5826 ,  C23C14/5853 ,  H01J37/32935 ,  H01J37/32972 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L22/12

Abstract: A method for evaluating a semiconductor film of a semiconductor device which is configured to include an insulating film, the semiconductor film, and a conductive film and to have a region where the semiconductor film and the conductive film overlap with each other with the insulating film provided therebetween, includes a step of performing plasma treatment after formation of the insulating film, and a step of calculating a peak value of resistivity of a microwave in the semiconductor film by a microwave photoconductive decay method after the plasma treatment, so that the hydrogen concentration in the semiconductor film is estimated.

公开(公告)号：US09722056B2

公开(公告)日：2017-08-01

申请号：US15276993

申请日：2016-09-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Akihisa Shimomura ,  Yasumasa Yamane ,  Yuhei Sato ,  Tetsuhiro Tanaka ,  Masashi Tsubuku ,  Toshihiko Takeuchi ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Satoshi Toriumi ,  Takashi Ohtsuki ,  Toshiya Endo

IPC: H01L21/00 ,  H01L29/66 ,  H01L29/786 ,  H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. Oxygen is introduced into a surface of an insulating film, and then, an oxide semiconductor, a layer which is capable of blocking oxygen, a gate insulating film, and other films which composes a transistor are formed. For at least one of the first gate insulating film and the insulating film, three signals in Electron Spin Resonance Measurement are each observed in a certain range of g-factor. Reducing the sum of the spin densities of the signals will improve reliability of the semiconductor device.

公开(公告)号：US09384976B2

公开(公告)日：2016-07-05

申请号：US14578891

申请日：2014-12-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Mitsuhiro Ichijo ,  Tetsuhiro Tanaka ,  Seiji Yasumoto ,  Shun Mashiro ,  Yoshiaki Oikawa ,  Kenichi Okazaki

IPC: H01L21/00 ,  H01L21/02 ,  C23C16/30 ,  C23C16/455 ,  C23C16/511 ,  H01J37/32 ,  H01J37/34 ,  H01L29/49 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L21/44 ,  C23C16/308 ,  C23C16/45578 ,  C23C16/511 ,  H01J37/32192 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/34 ,  H01L21/02274 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02614 ,  H01L21/02631 ,  H01L21/67167 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

Abstract: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over the gate electrode, and an oxide semiconductor film is formed over the gate insulating film, the gate insulating film is formed by deposition treatment using high-density plasma. Accordingly, dangling bonds in the gate insulating film are reduced and the quality of the interface between the gate insulating film and the oxide semiconductor is improved.

公开(公告)号：US20130095617A1

公开(公告)日：2013-04-18

申请号：US13706841

申请日：2012-12-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Miyako NAKAJIMA ,  Hiddekazu Miyairi ,  Toshiyuki Isa ,  Erika Kato ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi

IPC: H01L29/66

CPC classification number: H01L29/6675 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility, A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.

Abstract translation: 本发明的目的是提供一种具有小截止电流，大电流和高场效应迁移率的薄膜晶体管，通过氧化氮化硅层形成的氮化硅层和氧化硅层作为栅绝缘层 并且晶体从栅极绝缘层的氧化硅层的界面生长以形成微晶半导体层; 因此，制造了反交错的薄膜晶体管。 由于晶体从栅极绝缘层生长，所以薄膜晶体管可以具有高结晶度，大电流和高的场效应迁移率。 此外，提供缓冲层以减少电流。

公开(公告)号：US10522397B2

公开(公告)日：2019-12-31

申请号：US16354394

申请日：2019-03-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hideomi Suzawa ,  Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshiya Endo ,  Mitsuhiro Ichijo

IPC: H01L21/768 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/8258 ,  H01L29/423 ,  H01L29/49 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.