公开(公告)号：US20120250977A1

公开(公告)日：2012-10-04

申请号：US13077810

申请日：2011-03-31

Applicant: Amit K. Agrawal ,  Yuichi Taguchi ,  Srikumar Ramalingam

Inventor： Amit K. Agrawal ,  Yuichi Taguchi ,  Srikumar Ramalingam

IPC: G06K9/00

CPC classification number: G02B17/08 ,  G06T7/514

Abstract: A three-dimensional (3D) location of a reflection point of a ray between a point in a scene (PS) and a center of projection (COP) of a camera of a catadioptric system is determined. The catadioptric system is non-central and includes the camera and a reflector, wherein a surface of the reflector is a quadric surface rotationally symmetric around an axis of symmetry. The 3D location of the reflection point is determined based on a law of reflection, an equation of the reflector, and an equation describing a reflection plane defined by the COP, the PS, and a point of intersection of a normal to the reflector at the reflection point with the axis of symmetry.

Abstract translation: 确定场景（PS）中的点与反射折射系统的照相机的投影中心（COP）之间的光线的反射点的三维（3D）位置。 反射折射系统是非中心的，并且包括相机和反射器，其中反射器的表面是围绕对称轴线旋转对称的二次曲面。 反射点的3D位置是基于反射定律，反射器的方程和描述由COP，PS和由反射器的法线在 反射点与对称轴。

公开(公告)号：US08271991B2

公开(公告)日：2012-09-18

申请号：US11970004

申请日：2008-01-07

Applicant: Toru Tanaka ,  Yuichi Taguchi ,  Jun Mizuno

Inventor： Toru Tanaka ,  Yuichi Taguchi ,  Jun Mizuno

IPC: G06F9/46 ,  G06F13/00

CPC classification number: G06F3/0665 ,  G06F3/061 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/067 ,  G06F11/3433 ,  G06F11/3485

Abstract: A method of balancing a load in a computer system having at least one storage system, and a management computer, each of the storage systems having physical disks and a disk controller, the load balancing method including the steps of: setting at least one of the physical disks as a parity group; providing a storage area of the set parity group as at least one logical volumes to the host computer; calculating a logical volume migration time when a utilization ratio of the parity group becomes equal to or larger than a threshold; and choosing, as a data migration source volume, one of the logical volumes included in the parity group that has the utilization ratio equal to or larger than the threshold, by referring to the calculated logical volume migration time, the data migration source volume being the logical volume from which data migrates.

Abstract translation: 一种在具有至少一个存储系统的计算机系统中平衡负载的方法，以及管理计算机，每个存储系统具有物理盘和盘控制器，所述负载平衡方法包括以下步骤： 物理磁盘作为奇偶校验组; 将所述设置的奇偶校验组的存储区域作为至少一个逻辑卷提供给所述主计算机; 当奇偶校验组的利用率变得等于或大于阈值时，计算逻辑卷迁移时间; 并且通过参考所计算的逻辑卷迁移时间，将数据迁移源卷选择为具有等于或大于阈值的利用率的奇偶校验组中包括的逻辑卷之一，数据迁移源卷是 数据迁移的逻辑卷。

公开(公告)号：US08212355B2

公开(公告)日：2012-07-03

申请号：US12760419

申请日：2010-04-14

Applicant: Masahiro Sunohara ,  Yuichi Taguchi

Inventor： Masahiro Sunohara ,  Yuichi Taguchi

IPC: H01L23/488 ,  H01L21/60 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L23/481 ,  H01L21/6835 ,  H01L21/7682 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3185 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2221/6835 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05568 ,  H01L2224/13009 ,  H01L2224/13016 ,  H01L2224/13019 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10157 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2224/13099

Abstract: A semiconductor package includes a semiconductor device, and a wiring board where the semiconductor device is mounted. The semiconductor device includes a semiconductor substrate, a piercing electrode configured to pierce the semiconductor substrate and electrically connect the wiring board and the semiconductor device, and a ring-shaped concave part provided so as to surround the piercing electrode, the ring-shaped concave part being configured to open to a wiring board side of the semiconductor substrate.

Abstract translation: 半导体封装包括半导体器件和安装半导体器件的布线板。 半导体器件包括半导体衬底，穿孔电极，其被构造成穿透半导体衬底并电连接布线板和半导体器件;以及环形凹部，其设置成围绕穿刺电极，环形凹部 被配置为向半导体衬底的布线板侧开口。

公开(公告)号：US08134786B2

公开(公告)日：2012-03-13

申请号：US12826823

申请日：2010-06-30

Applicant: Yuichi Taguchi ,  Amit K. Agrawal ,  Srikumar Ramalingam

Inventor： Yuichi Taguchi ,  Amit K. Agrawal ,  Srikumar Ramalingam

IPC: G02B17/00 ,  G06K9/00 ,  G06F7/60

CPC classification number: G02B17/08 ,  G02B27/0012

Abstract: Embodiment of invention discloses a system and a method for determining a three-dimensional (3D) location of a folding point of a ray between a point in a scene (PS) and a center of projection (COP) of a camera of a catadioptric system. One embodiment maps the catadioptric system, including 3D locations of the PS and the COP on a two-dimensional (2D) plane defined by an axis of symmetry of a folding optical element and the PS to produce a conic and 2D locations of the PS and COP on the 2D plane, and determines a 2D location of the folding point on the 2D plane based on the conic, the 2D locations of the PS and the COP. Next, the embodiment determines the 3D location of the folding point from the 2D location of the folding point on the 2D plane.

Abstract translation: 发明的实施方式公开了一种用于确定场景（PS）中的点与反射折射系统的照相机的投影中心（COP）之间的光线的折叠点的三维（3D）位置的系统和方法 。 一个实施例将反射折射系统（包括PS和COP的3D位置）映射在由折叠光学元件和PS的对称轴限定的二维（2D）平面上，以产生PS的圆锥和2D位置， COP在2D平面上，并且基于二次曲线，PS和COP的2D位置来确定2D平面上的折叠点的2D位置。 接下来，该实施例从2D平面上的折叠点的2D位置确定折叠点的3D位置。

公开(公告)号：US08100555B2

公开(公告)日：2012-01-24

申请号：US12851722

申请日：2010-08-06

Applicant: Mitsutoshi Higashii ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Akinori Shiraishi

Inventor： Mitsutoshi Higashii ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Akinori Shiraishi

IPC: F21V1/00

CPC classification number: F21V11/16 ,  F21K9/00 ,  F21Y2115/10 ,  H01L33/58 ,  H01L33/60 ,  H01L2224/16225 ,  H01L2924/16195

Abstract: It is a lighting apparatus 10 that has a light emitting element 16, a light emitting element housing 15 having a concave portion 28 that accommodates the light emitting element 16, and an optically transparent member 18 that airproofs a space B formed by the concave portion 28 and transmits light emitted from the light emitting element 16. The concave portion 28 is shaped to become wider toward the optically transparent member 18 from the bottom surface 28A of the concave portion 28. The lighting apparatus 10 is provided with a light shielding member 12 for shielding a part of light emitted from the light emitting element 16 is provided on the optically transparent member 18.

Abstract translation: 它是具有发光元件16，具有容纳发光元件16的凹部28的发光元件壳体15的照明装置10以及对由凹部28形成的空间B进行空气隔绝的光学透明构件18 并且透射从发光元件16发射的光。凹部28从凹部28的底面28A朝向光学透明构件18变宽。照明装置10设置有遮光构件12， 屏蔽从发光元件16发射的光的一部分设置在光学透明构件18上。

公开(公告)号：US20110231452A1

公开(公告)日：2011-09-22

申请号：US12682697

申请日：2010-03-19

Applicant: Noriko Nakajima ,  Yuichi Taguchi ,  Yoshiki Kano

Inventor： Noriko Nakajima ,  Yuichi Taguchi ,  Yoshiki Kano

IPC: G06F17/30

CPC classification number: G06F3/0637 ,  G06F3/0605 ,  G06F3/0622 ,  G06F3/0631 ,  G06F3/067 ,  G06F11/1469 ,  G06F11/1471 ,  G06F21/6218 ,  G06F2221/2101 ,  G06F2221/2149

Abstract: Log manipulation by a first administrator is prevented so that the reliability of system auditing can be improved.After receiving a service start request from a management computer, a storage subsystem creates a first resource group regarding which access by a host computer is permitted, and also creates a second resource group regarding which access by the management computer is permitted. The storage subsystem further creates a data storage area, to which data is to be written by the host computer, and makes the data storage area belong to the first resource group, while it also creates a log storage area, in which log information indicating past operation performed on the data storage area by the host computer is to be recorded, and makes the log storage area belong to the second resource group.

Abstract translation: 防止了第一个管理员的日志操作，从而可以提高系统审核的可靠性。 在从管理计算机接收到服务启动请求之后，存储子系统创建关于允许主计算机的访问的第一资源组，并且还创建关于允许由管理计算机访问的第二资源组。 存储子系统进一步创建数据存储区域，数据将被主计算机写入，并使数据存储区域属于第一资源组，同时还创建日志存储区域，其中指示过去的日志信息 记录由主计算机对数据存储区域执行的操作，并使日志存储区域属于第二资源组。

公开(公告)号：US20110227218A1

公开(公告)日：2011-09-22

申请号：US13116623

申请日：2011-05-26

Applicant: Akinori Shiraishi ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Mitsutoshi Higashi

Inventor： Akinori Shiraishi ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Mitsutoshi Higashi

IPC: H01L23/498

CPC classification number: H01L23/147 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/48 ,  H01L33/486 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/85455 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.

Abstract translation: 在用于封装的硅衬底中，设置有通孔，其中填充有用于容纳电子器件的芯片的空腔的底表面的通孔到衬底的背面。 在空腔的底面侧的贯通电极的端部具有与形成包括电子器件的芯片的电路的布线的连接部。 用于封装的硅衬底的特征在于，（1）包括薄膜布线作为布线，并且连接部分被连接到薄膜布线的导体加强和/或（2）引线接合部分被包括为 通过在空腔的底面侧引线接合贯通电极的端部而形成布线和连接部。

公开(公告)号：US20110208937A1

公开(公告)日：2011-08-25

申请号：US12527450

申请日：2009-04-21

Applicant: Shinichi Hayashi ,  Yuichi Taguchi

Inventor： Shinichi Hayashi ,  Yuichi Taguchi

IPC: G06F12/02

CPC classification number: G06F3/0647 ,  G06F3/0625 ,  G06F3/0689 ,  Y02D10/154

Abstract: The present invention calculates the power consumption of the storage system for each device which supplies power with a storage system, and controls the storage system to keep the power consumption not to exceed the upper limit. In order to achieve this, the power consumption of the chassis configuring the destination storage system is calculated with reference to the number of logical volumes configuring the pool which includes virtual logical volumes, and the logical volumes included in the source storage system are migrated to the virtual logical volumes included in the destination storage system, keeping the power consumption specified in advance per device supplying power to the chassis configuring the destination storage system not to exceed the upper limit value. (Refer to FIG. 27.)

Abstract translation: 本发明计算用于为存储系统供电的每个设备的存储系统的功耗，并且控制存储系统以使功耗不超过上限。 为了实现这一点，参考配置包括虚拟逻辑卷的池的逻辑卷的数量来计算配置目的地存储系统的机箱的功耗，并且将源存储系统中包括的逻辑卷迁移到 包含在目的地存储系统中的虚拟逻辑卷，保持为配置目的地存储系统的机箱供电的每个设备提前指定的功耗不超过上限值。 （参照图27）

公开(公告)号：US07984230B2

公开(公告)日：2011-07-19

申请号：US11585111

申请日：2006-10-24

Applicant: Hiroshi Nasu ,  Masayuki Yamamoto ,  Yuichi Taguchi

Inventor： Hiroshi Nasu ,  Masayuki Yamamoto ,  Yuichi Taguchi

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F3/0665 ,  G06F3/061 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0679 ,  G06F3/0688

Abstract: There is provided a logical volume management method for storage system. When a logical volume is created on a flash memory drive, a management computer allocates logical volume while flash memory chip border of flash memory drive is taken into account. Specifically, a table for managing a correlation between each parity group and the flash memory chip of the flash memory drive is obtained and the logical volume is allocated in such a manner that a flash memory chip is not shared by a plurality of logical volumes. When complete erasing of logical volume data is performed, the management computer specifies a flash memory chip on which complete data erasing is to be performed, and the storage system completely erases data exclusively on the chip of interest with a use of a function of completely erasing data at a time by chip unit of the flash memory chip (chip erasing).

Abstract translation: 为存储系统提供了逻辑卷管理方法。 当在闪存驱动器上创建逻辑卷时，管理计算机分配逻辑卷，同时考虑闪存驱动器的闪存芯片边框。 具体地，获得用于管理闪存驱动器的每个奇偶校验组和闪速存储器芯片之间的相关性的表，并且以使得闪存芯片不被多个逻辑卷共享的方式分配逻辑卷。 当执行逻辑卷数据的完全擦除时，管理计算机指定要执行完整数据擦除的闪存芯片，并且存储系统使用完全擦除的功能完全擦除感兴趣的芯片上的数据 闪存芯片的芯片单元一次的数据（芯片擦除）。

公开(公告)号：US07960820B2

公开(公告)日：2011-06-14

申请号：US12265203

申请日：2008-11-05

Applicant: Akinori Shiraishi ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Mitsutoshi Higashi

Inventor： Akinori Shiraishi ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Mitsutoshi Higashi

IPC: H01L23/14

CPC classification number: H01L33/04 ,  B81B2207/012 ,  B81C1/0023 ,  B81C2203/031 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48465 ,  H01L2224/4911 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0107 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/20752 ,  H01L2224/05599

Abstract: A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates.

Abstract translation: 一种半导体封装件，其中电子器件芯片设置在通过堆叠多个硅衬底而构成的硅衬底堆叠产品的空腔中。