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11.发明授权Variable composition transparent conductive oxide layer and methods of forming thereof 有权可变组合物透明导电氧化物层及其形成方法公开(公告)号：US09391232B1
公开(公告)日：2016-07-12
申请号：US14577967
申请日：2014-12-19
申请人： Intermolecular, Inc.
发明人： Minh Huu Le , Jianhua Hu
CPC分类号： H01L33/005 , H01L33/38 , H01L33/42 , H01L2933/0016 , H01L2933/0033 , H01L2933/0058 , H01L2933/0066 , H01L2933/0091
摘要： Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. An LED may include a transparent conductive oxide (TCO) layer having a varying refractive index. For example, the refractive index may be higher at the interface of the TCO layer with an epitaxial stack than on the side of the TCO layer. The refractive index variability allows reducing light intensity losses in the LED. The refractive index variability may be achieved by feeding a substrate through a deposition chamber having a variable concentration of at least one process gas, such as oxygen. Specifically, the concentration of the process gas may be higher at one slit opening than at another slit opening. As the substrate moves through the deposition chamber, the TCO layer is continuously deposited. Due to the concentration variability, the resulting TCO layer may have a variable composition throughout the thickness of the TCO layer.
摘要翻译： 提供了发光二极管（LED）和制造这种LED的方法。 LED可以包括具有变化的折射率的透明导电氧化物（TCO）层。 例如，在具有外延堆叠的TCO层的界面处的折射率可以高于在TCO层的侧面上的折射率。 折射率变化允许减少LED中的光强度损失。 折射率可变性可以通过将衬底通过具有可变浓度的至少一种工艺气体（例如氧气）的沉积室进行。 具体地，处理气体的浓度在一个狭缝开口处可以比在另一个狭缝开口处更高。 当衬底移动通过沉积室时，TCO层被连续沉积。 由于浓度变化，所得的TCO层可以在TCO层的整个厚度上具有可变的组成。
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公开(公告)号：US09362231B2
公开(公告)日：2016-06-07
申请号：US14885002
申请日：2015-10-16
申请人： Intermolecular Inc.
IPC分类号： H01L21/768 , H01L23/532 , B82Y30/00 , H01L21/31 , H01L29/06 , H01L49/02
CPC分类号： H01L23/5329 , B82Y30/00 , H01L21/31 , H01L21/76805 , H01L21/76814 , H01L21/76831 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76873 , H01L21/76879 , H01L28/65 , H01L29/06 , H01L2924/0002 , Y10T428/249953 , H01L2924/00
摘要： Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, fluoroalkyl groups, heteroaryl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.
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公开(公告)号：US09321676B2
公开(公告)日：2016-04-26
申请号：US14702284
申请日：2015-05-01
发明人： Mohd Fadzli Anwar Hassan , Brent Boyce , Guowen Ding , Muhammad Imran , Minh Huu Le , Zhi-Wen Wen Sun , Yu Wang , Yongli Xu
CPC分类号： C03C17/23 , C03C17/06 , C03C17/34 , C03C17/36 , C03C17/3626 , C03C17/3644 , C03C17/366 , C03C2217/211 , C03C2217/24 , C30B23/00 , C30B25/00 , G02B5/208 , G02B5/285 , Y10T428/24868 , Y10T428/24975 , Y10T428/265
摘要： A bi-layer seed layer can exhibit good seed property for an infrared reflective layer, together with improved thermal stability. The bi-layer seed layer can include a thin zinc oxide layer having a desired crystallographic orientation for a silver infrared reflective layer disposed on a bottom layer having a desired thermal stability. The thermal stable layer can include aluminum, magnesium, or bismuth doped tin oxide (AlSnO, MgSnO, or BiSnO), which can have better thermal stability than zinc oxide but poorer lattice matching for serving as a seed layer template for silver (111).
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公开(公告)号：US09318546B1
公开(公告)日：2016-04-19
申请号：US14507418
申请日：2014-10-06
申请人： Intermolecular, Inc.
发明人： Prashant B. Phatak
IPC分类号： H01L21/20 , H01L21/28 , H01L49/02 , H01L27/108 , H01L21/02 , H01L21/285
CPC分类号： H01L28/75 , H01L21/02197 , H01L21/2855 , H01L27/108 , H01L27/10805 , H01L28/65
摘要： In some embodiments, a metal oxide second electrode material is formed as part of a MIM DRAM capacitor stack. The second electrode material is doped with one or more dopants. The dopants may influence the crystallinity, resistivity, and/or work function of the second electrode material. The dopants may be uniformly distributed throughout the second electrode material or may be distributed with a gradient in their concentration profile.
摘要翻译： 在一些实施例中，金属氧化物第二电极材料形成为MIM DRAM电容器堆叠的一部分。 第二电极材料掺杂有一种或多种掺杂剂。 掺杂剂可影响第二电极材料的结晶度，电阻率和/或功函数。 掺杂剂可以均匀分布在整个第二电极材料中，或者可以以它们的浓度分布梯度分布。
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15.发明授权High productivity combinatorial workflow to screen and design chalcogenide materials as non volatile memory current selector 有权高生产率组合工作流程将硫族化物材料筛选和设计为非易失性存储器电流选择器公开(公告)号：US09305791B2
公开(公告)日：2016-04-05
申请号：US14135505
申请日：2013-12-19
申请人： Intermolecular, Inc.
发明人： Imran Hashim
IPC分类号： H01L21/8234 , H01L21/30 , B08B3/04 , G11C13/00 , H01L27/24 , C23C14/08 , C23C14/22 , C23C14/34 , H01L21/02 , H01L21/66 , H01L45/00 , H01L21/306 , H01L21/67 , C23C18/16 , C25D17/02 , B01J19/00
CPC分类号： H01L21/30 , B01J19/0046 , B01J2219/00283 , B01J2219/00286 , B01J2219/00301 , B01J2219/00313 , B01J2219/0038 , B01J2219/00382 , B01J2219/00416 , B01J2219/00418 , B01J2219/00527 , B01J2219/00585 , B08B3/04 , C23C14/08 , C23C14/22 , C23C14/34 , C23C18/1619 , C23C18/1682 , C25D17/02 , G11C13/0004 , H01L21/02104 , H01L21/30604 , H01L21/67051 , H01L21/67057 , H01L21/6719 , H01L22/10 , H01L22/12 , H01L22/14 , H01L27/2463 , H01L45/1608
摘要： Combinatorial workflow is provided for evaluating materials and processes for current selector devices in a cross point memory array. Blanket layers, metal-insulator-metal devices, and compete memory structures are combinatorially fabricated on multiple regions of a substrate, with each region having a different material and process condition for the current selector devices. The current selector devices are then characterized, and the data are compared to obtain the optimum materials and processes.
摘要翻译： 组合工作流程用于评估交叉点存储器阵列中当前选择器设备的材料和过程。 毯子层，金属 - 绝缘体 - 金属器件和竞争存储器结构组合地制造在衬底的多个区域上，每个区域对于当前选择器器件具有不同的材料和工艺条件。 然后对当前的选择器装置进行表征，并比较数据以获得最佳材料和工艺。
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公开(公告)号：US09281463B2
公开(公告)日：2016-03-08
申请号：US14138656
申请日：2013-12-23
申请人： Intermolecular Inc.
发明人： Frank Greer , Andy Steinbach
IPC分类号： H01L39/24
CPC分类号： H01L39/2493
摘要： Metal oxide tunnel barrier layers for superconducting tunnel junctions are formed by atomic layer deposition. Both precursors include a metal (which may be the same metal or may be different). The first precursor is a metal alkoxide with oxygen bonded to the metal, and the second precursor is an oxygen-free metal precursor with an alkyl-reactive ligand such as a halogen or methyl group. The alkyl-reactive ligand reacts with the alkyl group of the alkoxide, forming a detached by-product and leaving a metal oxide monolayer. The temperature is selected to promote the reaction without causing the metal alkoxide to self-decompose. The oxygen in the alkoxide precursor is bonded to a metal before entering the chamber and remains bonded throughout the reaction that forms the monolayer. Therefore, the oxygen used in this process has no opportunity to oxidize the underlying superconducting electrode.
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公开(公告)号：US09275727B2
公开(公告)日：2016-03-01
申请号：US14627760
申请日：2015-02-20
CPC分类号： G11C11/56 , G11C7/1006 , G11C7/1051 , G11C7/1078 , G11C7/12 , G11C7/22 , G11C11/5685 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C2213/32 , G11C2213/33 , G11C2213/34 , G11C2213/72 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/145 , H01L45/1608
摘要： A resistor array for multi-bit data storage without the need to increase the size of a memory chip or scale down the feature size of a memory cell contained within the memory chip is provided. The resistor array incorporates a number of discrete resistive elements to be selectively connected, in different series combinations, to at least one memory cell or memory device. In one configuration, by connecting each memory cell or device with at least one resistor array, a resistive switching layer found in the resistive switching memory element of the connected memory device is capable of being at multiple resistance states for storing multiple bits of digital information. During device programming operations, when a desired series combination of the resistive elements within the resistor array is selected, the resistive switching layer in the connected memory device can be in a desired resistance state.
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公开(公告)号：US09246096B2
公开(公告)日：2016-01-26
申请号：US14624295
申请日：2015-02-17
发明人： Zhendong Hong , Vidyut Gopal , Imran Hashim , Randall J. Higuchi , Tim Minvielle , Hieu Pham , Takeshi Yamaguchi
IPC分类号： H01L29/768 , H01L29/40 , H01L21/8222 , H01L21/20 , H01L45/00 , H01L27/24
CPC分类号： H01L45/146 , H01L27/2463 , H01L45/04 , H01L45/08 , H01L45/1233 , H01L45/1616
摘要： Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.
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19.发明授权公开(公告)号：US09246085B1
公开(公告)日：2016-01-26
申请号：US14338949
申请日：2014-07-23
发明人： Yun Wang
CPC分类号： H01L45/08 , H01L27/24 , H01L27/2409 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1266 , H01L45/146 , H01L45/1608 , H01L45/1616 , H01L45/1625 , H01L45/165 , H01L45/1658
摘要： Filament size and shape in a ReRAM stack can be controlled by doping layers of a variable-resistance stack to change the crystallization temperature. This changes the density of the grain boundaries that form during annealing and provide minimal-resistance paths for the migration of charged defects. Hf, Zr, or Ti decreases the crystallization temperature and narrows the filament, while Si or N increases the crystallization temperature and widens the filament. Tapered filaments are of interest: The narrow tip requires little energy to break and re-form, enabling the cell to operate at low power, yet the wider body and base are insensitive to entropic behavior of small numbers of defects, enabling the cell to retain data for long periods.
摘要翻译： 可以通过掺杂可变电阻堆叠层来控制ReRAM堆叠中的长丝尺寸和形状来改变结晶温度。 这改变了在退火期间形成的晶界的密度，并且为带电缺陷的迁移提供了最小的电阻路径。 Hf，Zr或Ti会降低结晶温度并使丝变窄，而Si或N则会增加结晶温度并加长丝。 锥形丝是令人感兴趣的：窄尖端需要很少的能量来破坏和重新形成，使得细胞能够以低功率运行，但是更宽的身体和基部对少数缺陷的熵行为不敏感，使细胞保留 长时间的数据。
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公开(公告)号：US09245793B2
公开(公告)日：2016-01-26
申请号：US14135182
申请日：2013-12-19
申请人： Intermolecular, Inc.
发明人： Ratsamee Limdulpaiboon , Frank Greer , Chi-I Lang , J. Watanabe , Wenxian Zhu
IPC分类号： H01L21/31 , H01L21/768 , H01L21/3105 , H01J37/32
CPC分类号： H01L21/76841 , H01J37/32357 , H01J37/32449 , H01L21/3105 , H01L21/76814 , H01L21/76826 , H01L21/76843
摘要： Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated species. The activated species can be used to treat the surfaces of low-k and/or ultra low-k dielectric materials to facilitate improved deposition of diffusion barrier materials.
摘要翻译： 公开了使用远程等离子体源的处理方法和装置。 该装置包括封闭衬底支撑件，远程等离子体源和喷头的外室。 基板加热器可以安装在基板支撑件中。 运输系统移动基板支撑件并且能够定位基板。 等离子体系统可用于产生活化物质。 活化物质可用于处理低k和/或超低k介电材料的表面，以促进扩散阻挡材料的改进沉积。
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