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    GaN SUBSTRATE, SUBSTRATE WITH EPITAXIAL LAYER, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING GaN SUBSTRATE
    12.
    发明申请
    GaN SUBSTRATE, SUBSTRATE WITH EPITAXIAL LAYER, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING GaN SUBSTRATE 失效
    GaN衬底，具有外延层的衬底，半导体器件以及制造GaN衬底的方法

    公开(公告)号：US20080308906A1

    公开(公告)日：2008-12-18

    申请号：US12137038

    申请日：2008-06-11

    申请人： Hideki OSADA ,  Hitoshi Kasai ,  Keiji Ishibashi ,  Seiji Nakahata ,  Takashi Kyono ,  Katsushi Akita ,  Yoshiki Miura

    发明人： Hideki OSADA ,  Hitoshi Kasai ,  Keiji Ishibashi ,  Seiji Nakahata ,  Takashi Kyono ,  Katsushi Akita ,  Yoshiki Miura

    IPC分类号： H01L29/20 ,  H01L21/20 ,  C01B21/06

    CPC分类号： H01L29/2003 ,  C30B25/02 ,  C30B25/183 ,  C30B29/406 ,  H01L29/045 ,  Y10S438/945 ,  Y10S438/973

    摘要： A GaN substrate having a large diameter of two inches or more by which a semiconductor device such as a light emitting element with improved characteristics such as luminance efficiency, an operating life and the like can be obtained at low cost industrially, a substrate having an epitaxial layer formed on the GaN substrate, a semiconductor device, and a method of manufacturing the GaN substrate are provided. A GaN substrate has a main surface and contains a low-defect crystal region and a defect concentrated region adjacent to low-defect crystal region. Low-defect crystal region and defect concentrated region extend from the main surface to a back surface positioned on the opposite side of the main surface. A plane direction [0001] is inclined in an off-angle direction with respect to a normal vector of the main surface.

    摘要翻译： 具有两英寸以上的大直径的GaN衬底，通过该GaN衬底可以以低成本在工业上获得具有诸如亮度效率，工作寿命等改善的特性的发光元件的半导体器件，具有外延 提供了形成在GaN衬底上的层，半导体器件和制造GaN衬底的方法。 GaN衬底具有主表面并且包含低缺陷晶体区域和与低缺陷晶体区域相邻的缺陷集中区域。 低缺陷晶体区域和缺陷集中区域从主表面延伸到位于主表面相对侧的后表面。 平面方向相对于主表面的法线矢量在偏角方向上倾斜。

    Field effect transistor device including an array of channel elements and methods for forming
    14.
    发明申请
    Field effect transistor device including an array of channel elements and methods for forming 审中-公开
    场效应晶体管器件包括沟道元件阵列和形成方法

    公开(公告)号：US20060249784A1

    公开(公告)日：2006-11-09

    申请号：US11124325

    申请日：2005-05-06

    申请人： Charles Black ,  Ricardo Ruiz

    发明人： Charles Black ,  Ricardo Ruiz

    IPC分类号： H01L29/76

    CPC分类号： H01L29/785 ,  H01L29/0673 ,  H01L29/66795 ,  H01L29/78681 ,  H01L29/78684 ,  Y10S438/945 ,  Y10S438/947 ,  Y10S438/948 ,  Y10S438/949

    摘要： The present invention relates to a semiconductor structure such as a field effect transistors (FETs) in which the channel region of each of the FETs is composed of an array of more than one electrically isolated channel. In accordance with the present invention, the distance between each of the channels present in the channel region is within a distance of no more than twice their width from each other. The FETs of the present invention are fabricated using methods in which self-assembled block copolymers are employed in forming the channel.

    摘要翻译： 本发明涉及诸如场效应晶体管（FET）的半导体结构，其中每个FET的沟道区域由多于一个的电隔离沟道的阵列组成。 根据本发明，存在于通道区域中的每个通道之间的距离在彼此宽度不超过其两倍的距离内。 使用自组装嵌段共聚物形成通道的方法制造本发明的FET。

    Method and structure for electrostatic discharge protection of photomasks
    15.
    发明授权
    Method and structure for electrostatic discharge protection of photomasks 有权

    公开(公告)号：US07125755B2

    公开(公告)日：2006-10-24

    申请号：US10773597

    申请日：2004-02-06

    申请人： Kuei-Chi Kuo

    发明人： Kuei-Chi Kuo

    IPC分类号： H01L21/332 ,  H01L21/479

    CPC分类号： G03F1/40 ,  Y10S438/945

    摘要： A mask for manufacturing integrated circuits and use of the mask. The mask has a mask substrate. The mask also has an active mask region within a first portion of the mask substrate. The active region is adapted to accumulate a pre-determined level of static electricity. The mask also has a first guard ring structure surrounding a portion of the active mask region to isolate the active region from an outer region of the mask substrate and a second guard ring structure having at least one fuse structure surrounding a portion of the first guard ring structure. The fuse structure is operably coupled to the active region to absorb a current from static electricity. The static electricity is accumulated by the active region to the pre-determined level and being discharged as current to the fuse structure while maintaining the active region free from damage from the static electricity.

    Masking methods
    16.
    发明授权
    Masking methods 有权
    掩蔽方法

    公开(公告)号：US07105431B2

    公开(公告)日：2006-09-12

    申请号：US10652174

    申请日：2003-08-22

    申请人： Zhiping Yin ,  Gurtej S. Sandhu

    发明人： Zhiping Yin ,  Gurtej S. Sandhu

    IPC分类号： H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L21/3086 ,  H01L21/02115 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/31144 ,  H01L21/76816 ,  H01L29/6653 ,  Y10S438/945 ,  Y10S438/952

    摘要： The invention includes masking methods. In one implementation, a masking material comprising boron doped amorphous carbon is formed over a feature formed on a semiconductor substrate. The masking material comprises at least about 0.5 atomic percent boron. The masking material is substantially anisotropically etched effective to form an anisotropically etched sidewall spacer comprising the boron doped amorphous carbon on a sidewall of the feature. The substrate is then processed proximate the spacer while using the boron doped amorphous carbon comprising spacer as a mask. After processing the substrate proximate the spacer, the boron doped amorphous carbon comprising spacer is etched from the substrate. Other implementations and aspects are contemplated.

    摘要翻译： 本发明包括掩蔽方法。 在一个实施方案中，在形成在半导体衬底上的特征上形成包含硼掺杂的非晶碳的掩模材料。 掩模材料包含至少约0.5原子％的硼。 掩模材料基本上是各向异性蚀刻有效地形成各向异性蚀刻的侧壁间隔物，其包含该特征侧壁上的硼掺杂无定形碳。 然后使用包含间隔物的硼掺杂的无定形碳作为掩模，然后在衬垫附近处理衬底。 在靠近间隔物处理衬底之后，从衬底上蚀刻包含衬底的硼掺杂非晶碳。 考虑其他实现和方面。

    System for and method of forming via holes by multiple deposition events in a continuous inline shadow mask deposition process
    18.
    发明申请
    System for and method of forming via holes by multiple deposition events in a continuous inline shadow mask deposition process 有权
    在连续的在线荫罩沉积工艺中通过多次沉积事件形成通孔的系统和方法

    公开(公告)号：US20060141761A1

    公开(公告)日：2006-06-29

    申请号：US11020907

    申请日：2004-12-23

    申请人： Thomas Brody ,  Joseph Marcanio ,  Jeffrey Conrad ,  Timothy Cowen

    发明人： Thomas Brody ,  Joseph Marcanio ,  Jeffrey Conrad ,  Timothy Cowen

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76802 ,  H01L21/67173 ,  H01L21/67207 ,  H05K1/0393 ,  H05K3/143 ,  H05K3/4076 ,  H05K3/467 ,  H05K2203/1545 ,  Y10S438/944 ,  Y10S438/945

    摘要： Via holes are formed in a continuous inline shadow mask production system by depositing a first conductor layer and subsequently depositing a first insulator layer over a portion of the first conductor layer. The first insulator layer is deposited in a manner to define at least one notch along its edge. The second insulator layer is then deposited on another portion of the first conductor layer in a manner whereupon the second insulator layer slightly overlaps each notch of the first insulator layer, thereby forming the one or more via holes. A conductive filler can optionally be deposited in each via hole. Lastly, a second conductive layer can be deposited over the first insulator layer, the second insulator layer and, if provided, the conductive filler.

    摘要翻译： 通过沉积第一导体层并随后在第一导体层的一部分上沉积第一绝缘体层，在连续的在线荫罩制备系统中形成通孔。 以沿其边缘限定至少一个凹口的方式沉积第一绝缘体层。 然后以第二绝缘体层与第一绝缘体层的每个凹口稍微重叠的方式将第二绝缘体层沉积在第一导体层的另一部分上，从而形成一个或多个通孔。 可以任选地在每个通孔中沉积导电填料。 最后，第二导电层可以沉积在第一绝缘体层，第二绝缘体层上，如果提供，则沉积在导电填料上。

    Method for making a semiconductor device using treated photoresist as an implant mask
    20.
    发明申请
    Method for making a semiconductor device using treated photoresist as an implant mask 审中-公开
    制造使用经处理的光致抗蚀剂作为植入物掩模的半导体器件的方法

    公开(公告)号：US20050224455A1

    公开(公告)日：2005-10-13

    申请号：US11143295

    申请日：2005-06-02

    申请人： Patrick Montgomery ,  Cesar Garza ,  William Taylor

    发明人： Patrick Montgomery ,  Cesar Garza ,  William Taylor

    IPC分类号： H01L21/027 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/336 ,  H01L29/78 ,  H01L21/302 ,  B44C1/22

    CPC分类号： H01L21/0273 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/32139 ,  H01L29/66477 ,  H01L29/78 ,  Y10S438/945 ,  Y10S438/947

    摘要： Photoresist, which contains hydrogen, is patterned over a semiconductor substrate then treated with either a molecular halogen or a liquid fluorinating agent in order to improve subsequent ion implantation. Hydrogen is replaced, to whatever extent is found desirable, with the halogen. Molecular fluorine (F2) has been found to be particularly effective as the molecular halogen. Molecular fluorine (F2) reacts very efficiently in replacing the hydrogen and further has the benefit of continuing to penetrate into the patterned photoresist so that the entire patterned photoresist layer can have the hydrogen atoms replaced with fluorine atoms if the molecular fluorine flow is continued long enough. The resulting treated photoresist is much more resistant to penetration by implanted ions so that the photoresist can be deposited to a lesser thickness. This is beneficial in shadowing problems such as can occur in halo implants and where the patterned photoresist has a high aspect ratio.

    摘要翻译： 含有氢的光致抗蚀剂被图案化在半导体衬底上，然后用分子卤素或液体氟化剂进行处理，以改进随后的离子注入。 用卤素代替任何程度的氢被替代。 已经发现分子氟（F 2 H 2）作为分子卤素是特别有效的。 分子氟（F 2 H 2）在更换氢气时非常有效地反应，并且还具有持续渗透到图案化光致抗蚀剂中的优点，使得整个图案化的光致抗蚀剂层可以使氢原子被氟原子取代，如果 分子氟流持续足够长时间。 所得到的经处理的光致抗蚀剂对注入离子的穿透性更强，使得光致抗蚀剂可以沉积成较小的厚度。 这在阴影问题中是有益的，例如可能发生在晕轮植入物中，并且其中图案化的光致抗蚀剂具有高纵横比。