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公开(公告)号:US20140159043A1
公开(公告)日:2014-06-12
申请号:US13842793
申请日:2013-03-15
Applicant: LUXVUE TECHNOLOGY CORPORATION
Inventor: Kapil V. Sakariya , Andreas Bibl , Hsin-Hua Hu
IPC: H01L33/62 , H01L29/786
CPC classification number: H01L27/156 , G09G3/32 , H01L24/95 , H01L25/0753 , H01L27/124 , H01L33/20 , H01L33/42 , H01L33/62 , H01L2924/0002 , H01L2924/12041 , H01L2924/12042 , H01L2924/12044 , H01L2924/00
Abstract: A display panel and a method of forming a display panel are described. The display panel may include a thin film transistor substrate including a pixel area and a non-pixel area. The pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings. A ground line is located in the non-pixel area and an array of ground tie lines run between the bank openings in the pixel area and are electrically connected to the ground line in the non-pixel area.
Abstract translation: 描述显示面板和形成显示面板的方法。 显示面板可以包括包括像素区域和非像素区域的薄膜晶体管基板。 像素区域包括堤开口的阵列和堤开口阵列内的一组底部电极。 接地线位于非像素区域中,并且阵列阵列在像素区域中的堤开口之间延伸并且电连接到非像素区域中的接地线。
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公开(公告)号:US20140061687A1
公开(公告)日:2014-03-06
申请号:US14071106
申请日:2013-11-04
Applicant: LuxVue Technology Corporation
Inventor: Hsin-Hua Hu , Andreas Bibl , John A. Higginson , Hung-Fai Stephen Law
IPC: H01L33/08
CPC classification number: H01L33/08 , H01L21/67144 , H01L24/75 , H01L24/83 , H01L24/95 , H01L27/156 , H01L33/0079 , H01L33/405 , H01L2224/7598 , H01L2224/83 , H01L2224/95145 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/00
Abstract: A method of fabricating and transferring a micro device and an array of micro devices to a receiving substrate are described. In an embodiment, an electrically insulating layer is utilized as an etch stop layer during etching of a p-n diode layer to form a plurality of micro p-n diodes. In an embodiment, an electrically conductive intermediate bonding layer is utilized during the formation and transfer of the micro devices to the receiving substrate.
Abstract translation: 描述了将微器件和微器件阵列制造和传送到接收衬底的方法。 在一个实施例中,在蚀刻p-n二极管层以形成多个微p-n二极管期间,电绝缘层被用作蚀刻停止层。 在一个实施例中,在将微器件形成和传送到接收衬底期间,使用导电中间接合层。
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公开(公告)号:US20140048909A1
公开(公告)日:2014-02-20
申请号:US14063963
申请日:2013-10-25
Applicant: LuxVue Technology Corporation
Inventor: Dariusz Golda , Andreas Bibl
IPC: H01L29/06
CPC classification number: H01L21/6833 , B32B38/18 , B81C99/002 , H01L21/266 , H01L21/3083 , H01L21/76264 , H01L24/75 , H01L29/06 , H01L29/0619 , H01L29/0692 , H01L29/0696 , H01L29/407 , H01L29/66143 , H01L29/66348 , H01L29/7806 , H01L29/7813 , H01L29/872 , H01L29/8725 , H01L2224/7598 , H01L2924/1461 , H02N13/00 , Y10T156/17
Abstract: A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described. In an embodiment, a compliant bipolar micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include first and second silicon interconnects, and first and second arrays of silicon electrodes electrically connected with the first and second silicon interconnects and deflectable into one or more cavities between the base substrate and the silicon electrodes.
Abstract translation: 描述了一种兼容的双极微器件传输头阵列和从SOI衬底形成兼容的双极微器件传输阵列的方法。 在一个实施例中,柔性双极微器件转移头阵列包括基底衬底和在基底衬底上的图案化硅层。 图案化硅层可以包括第一和第二硅互连以及与第一和第二硅互连电连接并可偏转到基底基板和硅电极之间的一个或多个空腔中的第一和第二硅电极阵列。
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公开(公告)号:US09741592B2
公开(公告)日:2017-08-22
申请号:US14466497
申请日:2014-08-22
Applicant: LuxVue Technology Corporation
Inventor: Hsin-Hua Hu , Andreas Bibl , John A. Higginson
IPC: H01L27/15 , H01L33/00 , H01L21/52 , H01L21/683 , H01L23/00 , H01L25/075 , H01L25/00
CPC classification number: H01L21/52 , H01L21/6835 , H01L21/6836 , H01L24/83 , H01L24/93 , H01L24/95 , H01L25/0753 , H01L25/50 , H01L27/156 , H01L33/0079 , H01L33/40 , H01L2221/6835 , H01L2224/95136 , H01L2924/12041 , H01L2924/12042 , H01L2924/1461 , H01L2924/00
Abstract: A method and structure for stabilizing an array of micro devices is disclosed. The array of micro devices is formed on an array of stabilization posts formed from a thermoset material. Each micro device includes a bottom surface that is wider than a corresponding stabilization post directly underneath the bottom surface.
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公开(公告)号:US09705432B2
公开(公告)日:2017-07-11
申请号:US14503065
申请日:2014-09-30
Applicant: LuxVue Technology Corporation
Inventor: Stephen P. Bathurst , Paul Argus Parks , Nile Alexander Light
IPC: H02N13/00 , H01L21/683 , B81C99/00
CPC classification number: H02N13/00 , B81C99/002 , H01L21/6833
Abstract: Systems and methods for aligning a transfer head assembly with a substrate are disclosed. In an embodiment a pivot mount is used for generating a feedback signal in a closed-loop motion control system. In an embodiment, the pivot mount includes primary spring arms and secondary spring arms extending between a pivot platform and a base of the pivot mount. The secondary spring arms are characterized by a lower stiffness than the primary spring arms, and strain sensing elements are located along the secondary spring arms.
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公开(公告)号:US09624100B2
公开(公告)日:2017-04-18
申请号:US14303483
申请日:2014-06-12
Applicant: LuxVue Technology Corporation
Inventor: Stephen P. Bathurst , Paul Argus Parks , Nile Alexander Light
IPC: H01L21/683 , B81C99/00 , B25J7/00 , B25J15/00 , H02N13/00
CPC classification number: B81C99/002 , B25J7/00 , B25J15/0085 , B25J19/02 , B81B2203/0163 , H01L21/6831 , H02N13/00 , Y10T74/20006
Abstract: Systems and methods for aligning a transfer head assembly with a substrate are disclosed. In an embodiment a pivot mount is used for generating a feedback signal in a closed-loop motion control system. In an embodiment, the pivot mount includes a plurality of spring arms, with each spring arm including a switch-back along an axial length of the spring arm such that a pair of first and second lengths of the spring arm are immediately adjacent the switch-back and are parallel to each other. A first strain sensing element is located at the first length, and a second strain sensing element is located at the second length.
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公开(公告)号:US09620487B2
公开(公告)日:2017-04-11
申请号:US14864570
申请日:2015-09-24
Applicant: LuxVue Technology Corporation
Inventor: Kapil V. Sakariya , Andreas Bibl , Hsin-Hua Hu
CPC classification number: H01L25/0753 , H01L25/167 , H01L33/06 , H01L33/36 , H01L33/44 , H01L33/60 , H01L33/62 , H01L2224/18 , H01L2224/24137 , H01L2224/73267 , H01L2224/82 , H01L2224/83 , H01L2224/92244 , H01L2224/95 , H01L2924/0002 , H01L2924/00
Abstract: Reflective bank structures for light emitting devices are described. The reflective bank structure may include a substrate, an insulating layer on the substrate, and an array of bank openings in the insulating layer with each bank opening including a bottom surface and sidewalls. A reflective layer spans sidewalls of each of the bank openings in the insulating layer.
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公开(公告)号:US09589944B2
公开(公告)日:2017-03-07
申请号:US15008372
申请日:2016-01-27
Applicant: LuxVue Technology Corporation
Inventor: John A. Higginson , Andreas Bibl , Hsin-Hua Hu
IPC: H01L29/06 , H01L25/16 , H01L33/44 , H01L23/31 , H01L33/06 , H01L33/00 , H01L33/42 , H01L33/62 , H01L25/075 , H01L27/12 , H01L21/56
CPC classification number: H01L25/167 , H01L21/56 , H01L23/3171 , H01L25/0753 , H01L25/50 , H01L27/1214 , H01L27/1248 , H01L27/1262 , H01L33/005 , H01L33/06 , H01L33/42 , H01L33/44 , H01L33/54 , H01L33/62 , H01L2924/0002 , H01L2933/0016 , H01L2933/0025 , H01L2933/0033 , H01L2933/005 , H01L2933/0066 , H01L2924/00
Abstract: A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.
Abstract translation: 公开了一种用于在接收基板上接收微型装置的方法和结构。 诸如微型LED器件的微器件通过覆盖接收衬底上的导电层的钝化层穿孔,并且钝化层硬化。 在一个实施例中,微型LED器件通过B阶热固性材料穿孔。 在一个实施例中,微型LED器件穿过热塑性材料。
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公开(公告)号:US09463613B2
公开(公告)日:2016-10-11
申请号:US14307321
申请日:2014-06-17
Applicant: LuxVue Technology Corporation
Inventor: Andreas Bibl , John A. Higginson , Hung-Fai Stephen Law , Hsin-Hua Hu
CPC classification number: H01L29/167 , B32B38/18 , H01L21/67144 , H01L24/75 , H01L24/83 , H01L24/95 , H01L24/97 , H01L25/0753 , H01L33/62 , H01L2224/75725 , H01L2224/7598 , H01L2224/83005 , H01L2224/97 , H01L2924/10253 , H01L2924/10329 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/1421 , H01L2924/1431 , H01L2924/1434 , H01L2924/1461 , H01L2933/0066 , Y10T156/1153 , Y10T156/17 , Y10T156/1705 , Y10T156/1707 , Y10T156/1744 , Y10T156/1749 , Y10T156/1776 , Y10T156/1911 , H01L2224/83 , H01L2924/00
Abstract: A method of transferring a micro device and an array of micro devices are disclosed. A carrier substrate carrying a micro device connected to a bonding layer is heated to a temperature below a liquidus temperature of the bonding layer, and a transfer head is heated to a temperature above the liquidus temperature of the bonding layer. Upon contacting the micro device with the transfer head, the heat from the transfer head transfers into the bonding layer to at least partially melt the bonding layer. A voltage applied to the transfer head creates a grip force which picks up the micro device from the carrier substrate.
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公开(公告)号:US09406541B2
公开(公告)日:2016-08-02
申请号:US14957331
申请日:2015-12-02
Applicant: LuxVue Technology Corporation
Inventor: Dariusz Golda , Andreas Bibl
IPC: H01L29/76 , H01L21/683 , H02N13/00
CPC classification number: H01L21/6833 , B32B38/18 , B81C99/002 , H01L21/266 , H01L21/3083 , H01L21/76264 , H01L24/75 , H01L29/06 , H01L29/0619 , H01L29/0692 , H01L29/0696 , H01L29/407 , H01L29/66143 , H01L29/66348 , H01L29/7806 , H01L29/7813 , H01L29/872 , H01L29/8725 , H01L2224/7598 , H01L2924/1461 , H02N13/00 , Y10T156/17
Abstract: A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described. In an embodiment, a compliant bipolar micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include first and second silicon interconnects, and first and second arrays of silicon electrodes electrically connected with the first and second silicon interconnects and deflectable into one or more cavities between the base substrate and the silicon electrodes.
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