GRAPHENE GROWTH ON A CARBON-CONTAINING SEMICONDUCTOR LAYER
    21.
    发明申请
    GRAPHENE GROWTH ON A CARBON-CONTAINING SEMICONDUCTOR LAYER 有权
    含碳的半导体层的石墨生长

    公开(公告)号:US20110042687A1

    公开(公告)日:2011-02-24

    申请号:US12546034

    申请日:2009-08-24

    摘要: A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as a silicon substrate. The semiconductor-carbon alloy layer is converted into at least one graphene layer during a high temperature anneal, during which the semiconductor material on the surface of the semiconductor-carbon alloy layer is evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed and the carbon concentration on the surface of the semiconductor-carbon alloy layer increases, the remaining carbon atoms in the top layers of the semiconductor-carbon alloy layer coalesce to form a graphene layer having at least one graphene monolayer. Thus, a graphene layer may be provided on a commercially available semiconductor substrate having a diameter of 200 mm or 300 mm.

    摘要翻译: 半导体 - 碳合金层形成在半导体衬底的表面上,半导体衬底的表面可以是诸如硅衬底的市售半导体衬底。 半导体 - 碳合金层在高温退火期间被转化为至少一个石墨烯层,在此期间半导体 - 碳合金层表面上的半导体材料对碳原子有选择性的蒸发。 随着半导体原子被选择性地去除并且半导体 - 碳合金层的表面上的碳浓度增加,半导体 - 碳合金层顶层中剩余的碳原子聚结形成具有至少一个石墨烯单层的石墨烯层 。 因此,可以在直径为200mm或300mm的市售半导体衬底上提供石墨烯层。

    Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
    23.
    发明授权
    Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing 失效
    通过离子注入和热退火,在Si或绝缘体上的衬底上放置SiGe层

    公开(公告)号:US06855649B2

    公开(公告)日:2005-02-15

    申请号:US10299880

    申请日:2002-11-19

    摘要: A method to obtain thin (less than 300 nm) strain-relaxed Si1-xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density, i.e. less than 106 cm2. The approach begins with the growth of a pseudomorphic or nearly pseudomorphic Si1-xGex layer, i.e., a layer that is free of misfit dislocations, which is then implanted with He or other light elements and subsequently annealed to achieve the substantial strain relaxation. The very effective strain relaxation mechanism operating with this method is dislocation nucleation at He-induced platelets (not bubbles) that lie below the Si/Si1-xGex interface, parallel to the Si(001) surface.

    摘要翻译: 在Si或绝缘体上硅(SOI)衬底上获得薄(小于300nm)应变弛豫Si1-xGex缓冲层的方法。 这些缓冲层具有失配位错的均匀分布,其缓解了应变,表面光滑平滑,以及低穿透位错(TD)密度,即小于10 6 cm 2。 该方法开始于伪晶体或近似伪晶Si1-xGex层的生长,即,不具有失配位错的层,然后将其注入He或其它轻元素,随后退火以实现显着的应变弛豫。 使用该方法操作的非常有效的应变松弛机理是在Si引起的平行于Si(001)表面的Si / Si1-xGex界面下面的He诱导的血小板(不是气泡)处的位错成核。

    SOI STRUCTURES INCLUDING A BURIED BORON NITRIDE DIELECTRIC
    27.
    发明申请
    SOI STRUCTURES INCLUDING A BURIED BORON NITRIDE DIELECTRIC 审中-公开
    SOI结构包括一个BURIED BORON NITRIDE DIELECTRIC

    公开(公告)号:US20130196483A1

    公开(公告)日:2013-08-01

    申请号:US13604004

    申请日:2012-09-05

    IPC分类号: H01L21/30

    摘要: Boron nitride is used as a buried dielectric of an SOI structure including an SOI layer and a handle substrate. The boron nitride is located between an SOI layer and a handle substrate. Boron nitride has a dielectric constant and a thermal expansion coefficient close to silicon dioxide. Yet, boron nitride has a wet as well as a dry etch resistance that is much better than silicon dioxide. In the SOI structure, there is a reduced material loss of boron nitride during multiple wet and dry etches so that the topography and/or bridging are not an obstacle for device integration. Boron nitride has a low dielectric constant so that devices built in SOI active regions do not suffer from a charging effect.

    摘要翻译: 氮化硼被用作包括SOI层和手柄衬底的SOI结构的掩埋电介质。 氮化硼位于SOI层和手柄基板之间。 氮化硼具有接近二氧化硅的介电常数和热膨胀系数。 然而,氮化硼具有比二氧化硅好得多的湿润以及耐干蚀刻性。 在SOI结构中,在多次湿和干蚀刻期间氮化硼的材料损失减少,使得形貌和/或桥接不是器件集成的障碍。 氮化硼具有低介电常数,使得内置在SOI有源区中的器件不会带来充电效应。

    Ultra low κ plasma enhanced chemical vapor deposition processes using a single bifunctional precursor containing both a SiCOH matrix functionality and organic porogen functionality
    30.
    发明授权
    Ultra low κ plasma enhanced chemical vapor deposition processes using a single bifunctional precursor containing both a SiCOH matrix functionality and organic porogen functionality 有权
    超低&kgr 使用含有SiCOH基质官能团和有机致孔剂功能的单一双功能前体的等离子体增强化学气相沉积方法

    公开(公告)号:US08097932B2

    公开(公告)日:2012-01-17

    申请号:US12371180

    申请日:2009-02-13

    IPC分类号: H01L23/58

    摘要: A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.

    摘要翻译: 提供了由具有内置有机致孔剂的单一有机硅前体制备包含Si,C,O和H原子的SiCOH电介质材料的方法。 具有内置有机致孔剂的单一有机硅前体选自具有分子式SiRR1R2R3的硅烷(SiH4)衍生物,具有分子式为R4R5R6-Si-O-Si-R7R8R9的二硅氧烷衍生物和分子式为R10R11R12- Si-O-Si-R13R14-O-Si-R15R16R17其中R和R1-17可以相同也可以不相同,并且可以选自H,烷基,烷氧基,环氧基,苯基,乙烯基,烯丙基,烯基或炔基, 直链,支链,环状,多环,并且可以被含氧,含氮或氟的取代基官能化。 除了该方法之外,本申请还提供了由本发明方法制备的SiCOH电介质以及含有该SiCOH的电子结构。