公开(公告)号：US07709279B2

公开(公告)日：2010-05-04

申请号：US10827806

申请日：2004-04-20

申请人： David R. Hembree ,  Salman Akram

发明人： David R. Hembree ,  Salman Akram

IPC分类号： H01L21/66 ,  H01L23/58

CPC分类号： G01R1/18 ,  H01L22/34 ,  H01L23/5256 ,  H01L27/0251 ,  H01L2924/0002 ,  H01L2924/00

摘要： An apparatus and method for providing external electrostatic discharge (ESD) protection to a semiconductor device, which may or may not include its own ESD protection, are provided. An ESD structure may be associated with each interconnect, either individually or shared between two or more interconnects. Each interconnect includes a contact tip for establishing a temporary electrical connection with a bond pad of the semiconductor device and a contact pad for electrically interfacing the bond pad with external burn-in and/or test equipment. The ESD structure may be implemented, for example, as a fusible element or a shunting element, such as a pair of diodes, a diode-resistor network, or a pair of transistors. The interconnect may be employed as part of an insert including a plurality of interconnects that provides ESD protection to a plurality of integrated circuits of at least one semiconductor device.

摘要翻译： 提供了一种用于向半导体器件提供外部静电放电（ESD）保护的装置和方法，其可以包括或可以不包括其自身的ESD保护。 ESD结构可以与每个互连相关联，单独地或在两个或更多个互连之间共享。 每个互连包括用于与半导体器件的接合焊盘建立临时电连接的接触尖端和用于将接合焊盘与外部老化和/或测试设备电接口的接触焊盘。 ESD结构可以实现为例如可熔元件或分流元件，例如一对二极管，二极管 - 电阻器网络或一对晶体管。 互连可以用作插入件的一部分，其包括向至少一个半导体器件的多个集成电路提供ESD保护的多个互连。

公开(公告)号：US07646075B2

公开(公告)日：2010-01-12

申请号：US11177905

申请日：2005-07-07

申请人： Salman Akram

发明人： Salman Akram

IPC分类号： H01L21/00

CPC分类号： H01L31/0203 ,  B33Y80/00 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14685 ,  H01L2224/48227 ,  H04N5/2253 ,  H04N5/2254 ,  H01L2224/48091 ,  H01L2924/00014

摘要： Microelectronic imager assemblies with front side contacts and methods for fabricating such microelectronic imager assemblies are disclosed herein. In one embodiment, a microelectronic imager assembly comprises a workpiece including a substrate having a front side and a backside. The assembly further includes a plurality of imaging dies on and/or in the substrate. The imaging dies include image sensors at the front side of the substrate, integrated circuitry operatively coupled to the image sensors, and bond-pads at the front side of the substrate electrically coupled to the integrated circuitry. The assembly also includes a plurality of stand-offs at the front side of the substrate. The stand-offs have apertures aligned with corresponding image sensors. The assembly further includes a plurality of external contacts electrically coupled to corresponding bond-pads and projecting away from the dies.

摘要翻译： 本文公开了具有前侧触点的微电子成像器组件和用于制造这种微电子成像器组件的方法。 在一个实施例中，微电子成像器组件包括包括具有正面和背面的衬底的工件。 组件还包括在衬底上和/或衬底中的多个成像管芯。 成像管芯包括在衬底的前侧的图像传感器，可操作地耦合到图像传感器的集成电路以及电耦合到集成电路的衬底的前侧的接合焊盘。 组件还包括在基板的前侧的多个支座。 支架具有与对应的图像传感器对准的孔。 组件还包括电耦合到对应的接合焊盘并远离模具突出的多个外部触点。

公开(公告)号：US07592246B2

公开(公告)日：2009-09-22

申请号：US11015586

申请日：2004-12-17

申请人： Salman Akram

发明人： Salman Akram

IPC分类号： H01L21/44

CPC分类号： H01L24/85 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L24/86 ,  H01L2224/02166 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45669 ,  H01L2224/48091 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48881 ,  H01L2224/85375 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2224/48781 ,  H01L2224/48681 ,  H01L2224/29099

摘要： An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond is described wherein the bond pad on a surface of the semiconductor device comprises a layer of copper and at least one layer of metal and/or at least a barrier layer of material between the copper layer and one layer of metal on the copper layer to form a bond pad.

摘要翻译： 改进的引线键合设置有半导体器件的接合焊盘和引线框架的引线指，或者TAB带的改进的导电引线与半导体器件的焊盘焊接。 更具体地，描述了改进的引线键合，其中半导体器件的表面上的接合焊盘包括铜层和至少一层金属和/或至少在铜层和一层之间的材料阻挡层 铜层上的金属形成接合垫。

公开(公告)号：US07547877B2

公开(公告)日：2009-06-16

申请号：US12222038

申请日：2008-07-31

申请人： Salman Akram

发明人： Salman Akram

IPC分类号： H01J5/02 ,  H01L21/00

CPC分类号： H01L27/14694 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14685 ,  H01L27/14687 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/13 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/00014

摘要： Microelectronic imagers with integrated optical devices and methods for manufacturing imagers. The imagers, for example, typically have an imaging unit including a first substrate and an image sensor on and/or in the first substrate. An embodiment of an optical device includes a stand-off having a compartment configured to contain the image sensor. The stand-off has a coefficient of thermal expansion at least substantially the same as that of the first substrate. The optical device can further include an optics element in alignment with the compartment of the stand-off. The stand-off can be formed by etching a compartment into a silicon wafer or a wafer of another material having a coefficient of thermal expansion at least substantially the same as that of the substrate upon which the image sensor is formed. The optics elements can be formed integrally with the stand-offs or separately attached to a cover supported by the stand-offs.

摘要翻译： 具有集成光学器件的微电子成像器和用于制造成像器的方法。 成像器例如通常具有在第一基板上和/或第一基板中的成像单元，其包括第一基板和图像传感器。 光学装置的实施例包括具有被配置为容纳图像传感器的隔间的支架。 支架具有与第一基板的热膨胀系数至少基本相同的热膨胀系数。 光学装置还可以包括与支架隔间对准的光学元件。 可以通过将隔室蚀刻成具有与形成图像传感器的基板的至少基本相同的热膨胀系数的另一材料的硅晶片或晶片来形成间隔。 光学元件可以与支架一体地形成，或者单独地附接到由支架支撑的盖。

公开(公告)号：US07531453B2

公开(公告)日：2009-05-12

申请号：US12027106

申请日：2008-02-06

申请人： Kyle K. Kirby ,  Salman Akram ,  David R. Hembree ,  Sidney B. Rigg ,  Warren M. Farnworth ,  William M. Hiatt

发明人： Kyle K. Kirby ,  Salman Akram ,  David R. Hembree ,  Sidney B. Rigg ,  Warren M. Farnworth ,  William M. Hiatt

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/0306 ,  H05K3/4038 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/0305 ,  H05K2201/09827 ,  H05K2203/072 ,  H05K2203/1147 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.

摘要翻译： 本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。 在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。 衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。 该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。 该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。 该方法然后包括用导电材料填充通道。

公开(公告)号：US07511262B2

公开(公告)日：2009-03-31

申请号：US11209524

申请日：2005-08-22

申请人： Salman Akram

发明人： Salman Akram

IPC分类号： H01J5/02

CPC分类号： H01L27/14687 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14685 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/00014

摘要： Microelectronic imagers with integrated optical devices and methods for manufacturing imagers. The imagers, for example, typically have an imaging unit including a first substrate and an image sensor on and/or in the first substrate. An embodiment of an optical device includes a stand-off having a compartment configured to contain the image sensor. The stand-off has a coefficient of thermal expansion at least substantially the same as that of the first substrate. The optical device can further include an optics element in alignment with the compartment of the stand-off. The stand-off can be formed by etching a compartment into a silicon wafer or a wafer of another material having a coefficient of thermal expansion at least substantially the same as that of the substrate upon which the image sensor is formed. The optics elements can be formed integrally with the stand-offs or separately attached to a cover supported by the stand-offs.

摘要翻译： 具有集成光学器件的微电子成像器和用于制造成像器的方法。 成像器例如通常具有在第一基板上和/或第一基板中的成像单元，其包括第一基板和图像传感器。 光学装置的实施例包括具有被配置为容纳图像传感器的隔间的支架。 支架具有与第一基板的热膨胀系数至少基本相同的热膨胀系数。 光学装置还可以包括与支架隔间对准的光学元件。 可以通过将隔室蚀刻成具有与形成图像传感器的基板的至少基本相同的热膨胀系数的另一材料的硅晶片或晶片来形成间隔。 光学元件可以与支架一体地形成，或者单独地附接到由支架支撑的盖。

公开(公告)号：US07435620B2

公开(公告)日：2008-10-14

申请号：US11777797

申请日：2007-07-13

申请人： Peter A. Benson ,  Salman Akram

发明人： Peter A. Benson ,  Salman Akram

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  B33Y80/00 ,  H01L23/481 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14683 ,  H01L27/14685 ,  H01L31/02161 ,  H01L31/02327 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially simultaneously to forming the RDLs. The material for the back side RDLs and various other associated materials, such as dielectrics and conductive via filler materials, are processed at temperatures sufficiently low so as to not damage the semiconductor devices or associated components contained on the active surface of the semiconductor substrate. The low temperature processed back side RDLs of the present invention may be employed with optically interactive semiconductor devices and semiconductor memory devices, among many others. Semiconductor devices employing the RDLs of the present invention may be stacked and electrically connected theretogether.

摘要翻译： 公开了低温处理后侧再分配线（RDL）。 低温处理的背面RDL可以通过晶片互连（TWI）与半导体衬底的有源表面器件电连接。 TWI可以在形成RDL之后，在形成RDL之后形成，或者基本上同时形成以形成RDL。 用于背面RDL和各种其它相关材料（例如电介质和导电通孔填充材料）的材料在足够低的温度下进行处理，以便不损坏包含在半导体衬底的有源表面上的半导体器件或相关组件。 本发明的低温处理背面RDL可以用于光学交互式半导体器件和半导体存储器件等等。 采用本发明的RDL的半导体器件可以堆叠并且电连接在一起。

公开(公告)号：US07419852B2

公开(公告)日：2008-09-02

申请号：US11129105

申请日：2005-05-13

申请人： Peter A. Benson ,  Salman Akram

发明人： Peter A. Benson ,  Salman Akram

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  B33Y80/00 ,  H01L23/481 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14683 ,  H01L27/14685 ,  H01L31/02161 ,  H01L31/02327 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially simultaneously to forming the RDLs. The material for the back side RDLs and various other associated materials, such as dielectrics and conductive via filler materials, are processed at temperatures sufficiently low so as to not damage the semiconductor devices or associated components contained on the active surface of the semiconductor substrate. The low temperature processed back side RDLs of the present invention may be employed with optically interactive semiconductor devices and semiconductor memory devices, among many others. Semiconductor devices employing the RDLs of the present invention may be stacked and electrically connected theretogether.

摘要翻译： 公开了低温处理后侧再分配线（RDL）。 低温处理的背面RDL可以通过晶片互连（TWI）与半导体衬底的有源表面器件电连接。 TWI可以在形成RDL之后，在形成RDL之后形成，或者基本上同时形成以形成RDL。 用于背面RDL和各种其它相关材料（例如电介质和导电通孔填充材料）的材料在足够低的温度下进行处理，以便不损坏包含在半导体衬底的有源表面上的半导体器件或相关组件。 本发明的低温处理背面RDL可以用于光学交互式半导体器件和半导体存储器件等等。 采用本发明的RDL的半导体器件可以堆叠并且电连接在一起。

公开(公告)号：US07413979B2

公开(公告)日：2008-08-19

申请号：US11494982

申请日：2006-07-28

申请人： Sidney B. Rigg ,  Charles M. Watkins ,  Kyle K. Kirby ,  Peter A. Benson ,  Salman Akram

发明人： Sidney B. Rigg ,  Charles M. Watkins ,  Kyle K. Kirby ,  Peter A. Benson ,  Salman Akram

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.

摘要翻译： 本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微特征工件和管芯中形成通路和导电互连的方法。 在一个实施例中，一种方法包括在具有集成电路的管芯上形成接合焊盘，所述接合焊盘电耦合到集成电路。 然后在管芯上形成导线，导电线具有附接到接合焊盘的第一端部和与接合焊盘间隔开的第二端部。 该方法还可以包括形成通过管芯，接合焊盘和导电线的第一端部的通孔或通道，以及在通道的至少一部分中沉积导电材料以形成延伸在 最不通常地通过微电子器件。

公开(公告)号：US07391637B2

公开(公告)日：2008-06-24

申请号：US10910399

申请日：2004-08-03

申请人： Leonard Forbes ,  Kie Y. Ahn ,  Salman Akram

发明人： Leonard Forbes ,  Kie Y. Ahn ,  Salman Akram

IPC分类号： G11C5/08 ,  H01L29/41

CPC分类号： G11C7/02 ,  G11C7/18 ,  H01L23/5225 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/00

摘要： A memory device is provided with a structure for improved transmission line operation on integrated circuits. The structure for transmission line operation includes a first layer of electrically conductive material on a substrate. A first layer of insulating material is formed on the first layer of the electrically conductive material. A number of high permeability metal lines are formed on the first layer of insulating material. The number of high permeability metal lines includes composite hexaferrite films. A number of transmission lines is formed on the first layer of insulating material and between and parallel with the number of high permeability metal lines. A second layer of insulating material is formed on the transmission lines and the high permeability metal lines. The structure for transmission line operation includes a second layer of electrically conductive material on the second layer of insulating material.

摘要翻译： 存储器件具有用于改善集成电路上的传输线操作的结构。 用于传输线操作的结构包括在衬底上的第一层导电材料。 第一层绝缘材料形成在导电材料的第一层上。 在第一绝缘材料层上形成多个高磁导率金属线。 高渗透性金属线的数量包括复合六铁氧体膜。 多个传输线形成在绝缘材料的第一层上并且与多个高导磁率金属线之间并且平行。 在传输线和高磁导率金属线上形成第二层绝缘材料。 用于传输线操作的结构包括在第二绝缘材料层上的第二层导电材料。