Printed wiring board interposer sub-assembly and method
    24.
    发明授权
    Printed wiring board interposer sub-assembly and method 失效
    印刷电路板插件子组件及方法

    公开(公告)号:US06974915B2

    公开(公告)日:2005-12-13

    申请号:US10979366

    申请日:2004-11-01

    IPC分类号: H05K3/32 H05K1/16

    摘要: The details of a printed wiring board (PWB) sub-assembly and the method of producing the same are described. The sub-assembly comprises a printed circuit board electrically joined through a plurality of connections to one or more area array devices, such as modules or printed wiring boards. The sub-assembly can serve as a part of an original assembly. The sub-assembly can function as an after market item that can be readily substituted as a replacement for a failed component wherein the dimensional space between the printed circuit board and one or both of the area array devices must provide sufficient clearance for surface mounted devices.

    摘要翻译: 描述印刷电路板(PWB)子组件的细节及其制造方法。 子组件包括通过多个连接电连接到一个或多个区域阵列器件(例如模块或印刷线路板)的印刷电路板。 子组件可以作为原始组件的一部分。 子组件可以用作可以容易地替代为故障组件的后市场项目,其中印刷电路板与一个或两个区域阵列器件之间的尺寸空间必须为表面安装的器件提供足够的间隙。

    Enhanced electrical/mechanical connection for electronic devices
    25.
    发明授权
    Enhanced electrical/mechanical connection for electronic devices 失效
    电子设备增强的电气/机械连接

    公开(公告)号:US06695623B2

    公开(公告)日:2004-02-24

    申请号:US09871554

    申请日:2001-05-31

    IPC分类号: H01R1200

    摘要: A method and structure for electrically and mechanically interconnecting an array of printed circuit board contacts to an array of module contacts with a plurality of deformable resilient electrical conductors with two ends. Each of the conductor ends are electrically connected to one of the contact arrays. A portion of the conductor may deform longitudinally and laterally responsive to movement of the printed circuit board relative to the module responsive to heating and cooling cycles and mechanical vibrations, while maintaining the electrical connection of the contact arrays. An interposer with apertures extending through the interposer carries the conductors in the apertures and is used to align the conductors with the contacts. A method for excluding a rigid adhesive means from a portion of the resilient conductor is also taught.

    摘要翻译: 用于将印刷电路板触点阵列电气和机械地互连到具有两端的多个可变形的弹性电导体的模块触点阵列的方法和结构。 每个导体端电连接到一个接触阵列。 导体的一部分可以响应于加热和冷却循环和机械振动而响应于印刷电路板相对于模块的移动而纵向和横向地变形,同时保持接触阵列的电连接。 具有延伸穿过插入器的孔的插入器承载孔中的导体并且用于将导体与触点对准。 还教导了从弹性导体的一部分排除刚性粘合剂装置的方法。

    Compliant multi-layered circuit board for PBGA applications
    26.
    发明授权
    Compliant multi-layered circuit board for PBGA applications 失效
    符合PBGA应用的多层电路板

    公开(公告)号:US06495771B2

    公开(公告)日:2002-12-17

    申请号:US09820563

    申请日:2001-03-29

    IPC分类号: H05K103

    摘要: A electronic package is constituted of a compliant multi-layered circuit board or printed circuit board package, particularly for use in ball grid array (BGA) applications wherein two or possibly greater numbers of naturally spaced sub-composites are equipped with electronic circuitry which is interconnected through the intermediary of conductive adhesives. Pursuant to a method of producing, no other mechanical connection is provided intermediate these spaced sub-composites except, possibly, along the periphery of the structure thereof, where a molded plastic seal may be provided in order to form a protection against the ingress environmental or external influences. The unfilled void, space or interspatial volume which is present between the spaced sub-composite facilitates the deformation in shear of the conductive adhesive interconnections, such as epoxy resins or the like, with extremely little constraint of the various components.

    摘要翻译: 电子封装由兼容的多层电路板或印刷电路板封装构成,特别是用于球栅阵列(BGA)应用中,其中两个或可能更多数量的自然间隔的子复合材料配备有互连的电子电路 通过导电胶的中介。 根据生产方法,除了可能沿着其结构的周边之外,在这些间隔的子复合材料之间没有提供其它机械连接,其中可以提供模制塑料密封件,以形成防止侵入环境或 外部影响 存在于间隔的副复合物之间的未填充的空隙,空间或空间体积有助于导电粘合剂互连(例如环氧树脂等)的剪切变形,对各种组分的限制非常小。

    High density integrated circuit packaging with chip stacking and via interconnections
    27.
    发明授权
    High density integrated circuit packaging with chip stacking and via interconnections 失效
    高密度集成电路封装,具有芯片堆叠和通孔互连

    公开(公告)号:US06187678B1

    公开(公告)日:2001-02-13

    申请号:US09379716

    申请日:1999-08-24

    IPC分类号: H01L2144

    摘要: Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement. The carrier may be of the same material as the chip stacks to match coefficients of thermal expansion. High-density circuit packages may also be in the form of removable memory modules in generally planar or prism shaped form similar to a pen or as a thermal conduction module.

    摘要翻译: 具有降低的导体长度和改善的抗噪声性的芯片堆叠通过激光钻孔单独的芯片,例如存储芯片,优选靠近但在其周围内,并且通过其形成导体,优选地通过金属化或填充导电浆料来形成,该导电浆料可以由 瞬态液相(TLP)工艺,并且优选地在导电焊盘的金属化期间或期间,或者可能包括堆叠中的至少一些芯片的两侧上的连接器图案。 堆叠中的至少一些芯片之后具有在其间形成的电气和机械连接,优选地使用与TLP工艺一致的电镀焊料预制件。 连接可以由围绕连接的一层弹性材料容纳,并且可以在现场形成。 由此获得的高密度电路封装可以通过表面贴装技术或诸如插头和插座装置的可分离连接器安装在载体上。 载体可以具有与芯片堆叠相同的材料以匹配热膨胀系数。 高密度电路封装也可以是类似于笔或作为导热模块的大致平面或棱柱形形式的可移除存储器模块的形式。