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公开(公告)号：US20070278516A1
公开(公告)日：2007-12-06
申请号：US11809023
申请日：2007-05-30
IPC分类号： H01L31/111
CPC分类号： H01L25/16 , G06F1/26 , H01L24/48 , H01L24/49 , H01L2224/0603 , H01L2224/40 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/12032 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETS, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.
摘要翻译： 本发明提供一种降低电源单元的主电路的寄生电感的技术。 在具有用于高侧开关的功率MOSFET和低侧开关的功率MOSFET串联的电路的非绝缘DC-DC转换器中，用于高侧开关的功率MOSFET和用于低侧开关的功率MOSFET是 由n沟道垂直MOSFETS形成，并且用于高侧开关的功率MOSFET的源极和用于低侧开关的功率MOSFET的漏电极经由相同的管芯焊盘电连接。
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22.发明授权DC/DC converter package having separate logic and power ground terminals 有权DC / DC转换器封装具有单独的逻辑和电源接地端子公开(公告)号：US08049479B2
公开(公告)日：2011-11-01
申请号：US12818803
申请日：2010-06-18
CPC分类号： H02M1/08 , H01L24/48 , H01L24/49 , H01L2224/48137 , H01L2224/48247 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01082 , H01L2924/12032 , H01L2924/12036 , H01L2924/13091 , H01L2924/14 , H01L2924/30107 , H03K17/0822 , H03K17/165 , H03K17/166 , H03K17/6871 , H01L2924/00 , H01L2224/45099
摘要： In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.
摘要翻译： 在非隔离型DC / DC转换器中，从通过高侧MOSFET的主电路以外的部分施加驱动低侧MOSFET的栅极的低侧预驱动器的基准电位， 低侧MOSFET，使得低侧MOSFET的源极与预驱动器之间的寄生电感增加，而不增加主电路中的寄生电感的和，并且低侧MOSFET的栅极的负电位驱动 并且可以防止在不添加任何构件和改变驱动系统的情况下自启闭现象。
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公开(公告)号：US08008699B2
公开(公告)日：2011-08-30
申请号：US12721201
申请日：2010-03-10
CPC分类号： H01L25/16 , G06F1/26 , H01L24/48 , H01L24/49 , H01L2224/0603 , H01L2224/40 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/12032 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： Parasitic inductance of the main circuit of a power source unit is reduced. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETs, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.
摘要翻译： 降低了电源单元主电路的寄生电感。 在具有用于高侧开关的功率MOSFET和低侧开关的功率MOSFET串联的电路的非绝缘DC-DC转换器中，用于高侧开关的功率MOSFET和用于低侧开关的功率MOSFET是 由n沟道垂直MOSFET形成，并且用于高侧开关的功率MOSFET的源极和用于低侧开关的功率MOSFET的漏电极经由相同的管芯焊盘电连接。
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公开(公告)号：US20100253306A1
公开(公告)日：2010-10-07
申请号：US12818803
申请日：2010-06-18
IPC分类号： G05F1/10
CPC分类号： H02M1/08 , H01L24/48 , H01L24/49 , H01L2224/48137 , H01L2224/48247 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01082 , H01L2924/12032 , H01L2924/12036 , H01L2924/13091 , H01L2924/14 , H01L2924/30107 , H03K17/0822 , H03K17/165 , H03K17/166 , H03K17/6871 , H01L2924/00 , H01L2224/45099
摘要： In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.
摘要翻译： 在非隔离型DC / DC转换器中，从通过高侧MOSFET的主电路以外的部分施加驱动低侧MOSFET的栅极的低侧预驱动器的基准电位， 低侧MOSFET，使得低侧MOSFET的源极与预驱动器之间的寄生电感增加，而不增加主电路中的寄生电感的和，并且低侧MOSFET的栅极的负电位驱动 并且可以防止在不添加任何构件和改变驱动系统的情况下自启闭现象。
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公开(公告)号：US20100017636A1
公开(公告)日：2010-01-21
申请号：US12517939
申请日：2007-11-21
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , H02M3/156 , H02M2001/0032 , Y02B70/16 , Y02D10/126 , Y02D10/172
摘要： In a power supply system having: a processor 1; a power supply controller 31 and a VR 35 to be a switching regulator for supplying power to the processor; a voltage command generator 11 and a clock command generator 16 for varying an operation voltage and a clock frequency of a processor core of the processor; and a battery 34 to be an input direct-current voltage source of the switching regulator, the clock frequency of the power supply controller 31 is lowered when the computation amount of the processor 1 is small. Accordingly, the loss of the power supply controller 31 is reduced, thereby extending the battery life in the electronic device.
摘要翻译： 在具有处理器1的电源系统中， 作为用于向处理器供电的开关调节器的电源控制器31和VR 35; 用于改变处理器的处理器核心的操作电压和时钟频率的电压指令发生器11和时钟指令发生器16; 以及作为开关调节器的输入直流电压源的电池34，当处理器1的计算量小时，电源控制器31的时钟频率降低。 因此，电源控制器31的损失减少，从而延长电子设备的电池寿命。
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公开(公告)号：US20080180974A1
公开(公告)日：2008-07-31
申请号：US12005918
申请日：2007-12-27
CPC分类号： H01L29/7816 , H01L21/823814 , H01L21/823878 , H01L27/0922 , H01L29/0653 , H01L29/0696 , H01L29/086 , H01L29/0878 , H01L29/402 , H01L29/456 , H01L29/665 , H01L29/66689
摘要： A technique for suppressing lowering of withstand voltage and lowering of breakdown resistance and reducing a feedback capacitance of a power MISFET is provided. A lateral power MISFET that comprises a trench region whose insulating layer is formed shallower than an HV-Nwell layer is provided in the HV-Nwell layer (drift region) formed on a main surface of a semiconductor substrate in a direction from the main surface to the inside. The lateral power MISFET has an arrangement on a plane of the main surface including a source layer (source region) and a drain layer (drain region) arranged at opposite sides to each other across a gate electrode (first conducting layer), and a dummy gate electrode (second conducting layer) that is different from the gate electrode is arranged between the gate electrode and the drain layer.
摘要翻译： 提供了用于抑制耐压降低和击穿电阻降低并降低功率MISFET的反馈电容的技术。 在半导体衬底的主表面上形成的HV-Nwell层（漂移区域）中，沿着从主表面到主体表面的方向，设置包括其绝缘层形成为比HV-Nwell层浅的沟槽区域的横向功率MISFET 里面。 横向功率MISFET具有在主表面的平面上的布置，包括在栅极电极（第一导电层）上彼此相对设置的源极层（源极区域）和漏极层（漏极区域） 与栅电极不同的栅电极（第二导电层）配置在栅电极和漏极层之间。
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27.发明授权公开(公告)号：US07770403B2
公开(公告)日：2010-08-10
申请号：US12368681
申请日：2009-02-10
申请人： Yasuyuki Kojima , Noboru Akiyama , Takeshi Onaka , Tatsumi Yamauchi , Koichi Taniguchi , Koichi Tokushige , Noriyuki Bunkou , Keiji Sato
发明人： Yasuyuki Kojima , Noboru Akiyama , Takeshi Onaka , Tatsumi Yamauchi , Koichi Taniguchi , Koichi Tokushige , Noriyuki Bunkou , Keiji Sato
CPC分类号： F24F1/0003 , F24F11/30 , F24F11/54
摘要： An air conditioning system is arranged to use a power line for communication. The air conditioning system includes one or more indoor units, one or more outdoor units, and a system controller for controlling the indoor units or outdoor units and executes communications between the indoor units and the outdoor units as overlapping a signal on the power line for supplying electric power. The outdoor units are connected with the system controller through a leased communication line. The indoor unit provides a power line communication device being connected with the power line. The outdoor unit provides a leased communication device being connected with the leased communication line. A bridge is also provided for connecting the leased communication line and the power line. The control information is exchanged mutually between the indoor units, the outdoor units and the system controller through the power line.
摘要翻译： 一个空调系统被设置为使用电力线进行通信。 空调系统包括一个或多个室内单元，一个或多个室外单元，以及用于控制室内单元或室外单元的系统控制器，并且执行室内单元和室外单元之间的通信，以与用于供应的电力线路上的信号重叠 电力。 室外机通过租用通信线与系统控制器连接。 室内机提供与电力线连接的电力线通信装置。 户外单元提供与租用通信线路连接的租用通信设备。 还提供了用于连接租用通信线路和电力线路的桥梁。 控制信息通过电力线在室内机，室外机和系统控制器之间相互交换。
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公开(公告)号：US07002535B2
公开(公告)日：2006-02-21
申请号：US10866302
申请日：2004-06-14
申请人： Makoto Onozawa , Yuji Sano , Michitaka Ohsawa , Takashi Sasaki , Noboru Akiyama , Fumitaka Asami , Kazuo Yoshiikawa , Hitoshi Hirakawa , Tomokatsu Kishi , Toyoshi Kawada
发明人： Makoto Onozawa , Yuji Sano , Michitaka Ohsawa , Takashi Sasaki , Noboru Akiyama , Fumitaka Asami , Kazuo Yoshiikawa , Hitoshi Hirakawa , Tomokatsu Kishi , Toyoshi Kawada
IPC分类号： G09G3/28
CPC分类号： G09G3/2965 , G09G3/2927 , G09G3/293 , G09G3/294 , G09G3/296
摘要： A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
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29.发明申请Semiconductor device including primary and secondary side circuits on first and second substrates with capacitive insulation 有权半导体器件包括具有电容绝缘的第一和第二衬底上的初级和次级侧电路公开(公告)号：US20050112932A1
公开(公告)日：2005-05-26
申请号：US11024680
申请日：2004-12-30
CPC分类号： H01L23/3107 , H01L23/3121 , H01L23/48 , H01L23/49575 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/162 , H01L2224/0401 , H01L2224/05554 , H01L2224/05599 , H01L2224/0603 , H01L2224/16 , H01L2224/16225 , H01L2224/16245 , H01L2224/16265 , H01L2224/32245 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/484 , H01L2224/49175 , H01L2224/73207 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01074 , H01L2924/014 , H01L2924/10161 , H01L2924/12036 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19104 , H01L2924/3011 , H01L2924/30111 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.
摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。
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公开(公告)号：US5734616A
公开(公告)日：1998-03-31
申请号：US694059
申请日：1996-08-08
申请人： Hideto Kazama , Shuichi Miyaoka , Akihiko Emori , Kinya Mitsumoto , Tomoyuki Someya , Masahiro Iwamura , Noboru Akiyama
发明人： Hideto Kazama , Shuichi Miyaoka , Akihiko Emori , Kinya Mitsumoto , Tomoyuki Someya , Masahiro Iwamura , Noboru Akiyama
IPC分类号： G11C11/419 , G11C7/00
CPC分类号： G11C11/419
摘要： A static RAM includes pre-amplifiers, which are made up solely of emitter-follower transistors having their collectors supplied with the power voltage, in one-to-one correspondence to sub common data line pairs which are connected by column switches to complementary data line pairs of memory arrays. The pre-amplifier is provided with a first switch which turns on during the selected state to connect the sub common data line pair to the bases of the transistors and a second switch which turns on during the unselected state to provide the bases with a certain bias voltage lower than the readout signal voltage on the sub common data line pair. The emitter-follower transistors have their emitters connected commonly to form common emitter lines, which are connected to pairs of input terminals of main amplifiers made up of CMOS transistors.
摘要翻译： 静态RAM包括前置放大器，其仅由具有其电源电压的集电极的射极跟随器晶体管组成，与通过列开关连接到互补数据线的子公共数据线对一一对应 成对的存储器阵列。 前置放大器设置有在选择状态期间导通的第一开关，以将子公共数据线对连接到晶体管的基极;以及第二开关，其在未选择状态期间导通，以向基极提供一定的偏置 电压低于副公共数据线对上的读出信号电压。 射极跟随器晶体管的发射极共同连接形成共同的发射极线，其连接到由CMOS晶体管构成的主放大器的输入端对。
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