公开(公告)号：US20150137133A1

公开(公告)日：2015-05-21

申请号：US14537992

申请日：2014-11-11

Applicant: STMicroelectronics SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Michel Marty ,  Francois Roy

IPC: H01L21/02 ,  H01L31/0232 ,  H01L31/0376

CPC classification number: H01L21/02675 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0257 ,  H01L21/02592 ,  H01L21/268 ,  H01L27/1464 ,  H01L27/14698 ,  H01L31/02327 ,  H01L31/03762 ,  H01L31/1872 ,  Y02E10/548 ,  Y02P70/521

Abstract: A method of forming a heavily-doped silicon layer on a more lightly-doped silicon substrate including the steps of depositing a heavily-doped amorphous silicon layer; depositing a silicon nitride layer; and heating the amorphous silicon layer to a temperature higher than or equal to the melting temperature of silicon.

Abstract translation: 一种在更轻掺杂的硅衬底上形成重掺杂硅层的方法，包括沉积重掺杂非晶硅层的步骤; 沉积氮化硅层; 并将非晶硅层加热到高于或等于硅的熔融温度的温度。

公开(公告)号：US20150118805A1

公开(公告)日：2015-04-30

申请号：US14526081

申请日：2014-10-28

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics, Inc.

Inventor： Denis Rideau ,  Elise Baylac ,  Emmanuel Josse ,  Pierre Morin ,  Olivier Nier

IPC: H01L21/8234 ,  H01L21/324 ,  H01L29/78 ,  H01L21/265 ,  H01L21/84 ,  H01L21/762

CPC classification number: H01L21/823481 ,  H01L21/02356 ,  H01L21/02532 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/3081 ,  H01L21/3105 ,  H01L21/31155 ,  H01L21/324 ,  H01L21/76224 ,  H01L21/76237 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1203 ,  H01L29/7831 ,  H01L29/7846 ,  H01L29/7847

Abstract: The invention concerns a method of forming a semiconductor layer having uniaxial stress including: forming, in a semiconductor structure having a stressed semiconductor layer, one or more first isolation trenches in a first direction for delimiting a first dimension of at least one transistor to be formed in said semiconductor structure; forming, in the semiconductor structure, one or more second isolation trenches in a second direction for delimiting a second dimension of the at least one transistor, the first and second isolation trenches being at least partially filled with an insulating material; and before or after the formation of the second isolation trenches, decreasing the viscosity of the insulating material in the first isolation trenches by implanting atoms of a first material into the first isolation trenches, wherein atoms of the first material are not implanted into the second isolation trenches.

Abstract translation: 本发明涉及一种形成具有单轴应力的半导体层的方法，包括：在具有应力半导体层的半导体结构中形成在第一方向上的一个或多个第一隔离沟槽，以限定待形成的至少一个晶体管的第一维度 在所述半导体结构中; 在所述半导体结构中，在第二方向上形成用于限定所述至少一个晶体管的第二尺寸的一个或多个第二隔离沟槽，所述第一和第二隔离沟槽至少部分地填充有绝缘材料; 并且在形成第二隔离沟槽之前或之后，通过将第一材料的原子注入到第一隔离沟槽中来降低第一隔离沟槽中的绝缘材料的粘度，其中第一材料的原子未被注入第二隔离层 沟渠

公开(公告)号：US20150083900A1

公开(公告)日：2015-03-26

申请号：US14493553

申请日：2014-09-23

Applicant: STMicroelectronics (Research & Development) Limited ,  STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Crolles 2) SAS

Inventor： Adam Caley ,  Pierre-Jean Parodi-Keravec ,  Olivier Le Briz ,  Sandrine Lhostis

IPC: G01S17/46 ,  G01S7/481

CPC classification number: G01S7/4811 ,  G01S7/497 ,  G01S17/026 ,  G01S17/36

Abstract: A proximity sensor includes a radiation source configured to emit a primary radiation beam and a primary detector configured to pick up a reflected primary radiation beam. The radiation source is further configured to emit stray radiation. The sensor further includes a reference detector arranged to receive the stray radiation. The stray radiation may, for example, be emitted from either a side of the radiation source or a bottom of the radiation source.

Abstract translation: 接近传感器包括被配置为发射主辐射束的辐射源和被配置为拾取反射的一次辐射束的主检测器。 辐射源还被配置成发射杂散辐射。 传感器还包括布置成接收杂散辐射的参考检测器。 杂散辐射可以例如从辐射源的一侧或辐射源的底部发射。

公开(公告)号：US20150076573A1

公开(公告)日：2015-03-19

申请号：US14489698

申请日：2014-09-18

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Michel Marty ,  Sebastien Jouan ,  Laurent Frey

IPC: H01L27/146 ,  H01L31/107 ,  H01L29/49

CPC classification number: H01L27/14645 ,  H01L27/14614 ,  H01L27/14621 ,  H01L27/14636 ,  H01L27/14649 ,  H01L27/14685 ,  H01L27/14689 ,  H01L29/4916 ,  H01L31/107

Abstract: An integrated circuit includes a substrate and an interconnect part above the substrate, and further includes a photosensitive region in the substrate. A filter is provided aligned with the photosensitive region. The filter is formed by at least one layer of filter material. In one implementation for front side illumination, the layer of filter material is positioned above the photosensitive region between the interconnect part and the substrate. In another implementation for back side illumination, the layer of filter material is positioned below the photosensitive region opposite the interconnect part. The layer of filter material is configured such that a product of the thickness of the layer of filter material and the imaginary part of the refractive index of the layer of filter material is above 1 nm.

Abstract translation: 集成电路包括衬底和衬底上方的互连部分，并且还包括衬底中的感光区域。 提供与感光区域对准的过滤器。 过滤器由至少一层过滤材料形成。 在用于前侧照明的一个实施例中，过滤材料层位于互连部分和基板之间的感光区域上方。 在背面照明的另一实施方案中，过滤材料层位于与互连部分相对的光敏区域的下方。 过滤材料层被配置为使得过滤材料层的厚度与过滤材料层的折射率的虚部的乘积高于1nm。

公开(公告)号：US20150054140A1

公开(公告)日：2015-02-26

申请号：US14519832

申请日：2014-10-21

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Laurent-Luc Chapelon

IPC: H01L23/538 ,  H01L25/07 ,  H01L21/768 ,  H01L25/00

CPC classification number: H01L23/5384 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/7682 ,  H01L21/76843 ,  H01L21/76871 ,  H01L21/76879 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/5386 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2224/80141 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81141 ,  H01L2224/81815 ,  H01L2224/9201 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/20754 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/11 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A stack of a first and second semiconductor structures is formed. Each semiconductor structure includes: a semiconductor bulk, an overlying insulating layer with metal interconnection levels, and a first surface including a conductive area. The first surfaces of semiconductor structures face each other. A first interconnection pillar extends from the first surface of the first semiconductor structure. A housing opens into the first surface of the second semiconductor structure. The housing is configured to receive the first interconnection pillar. A second interconnection pillar protrudes from a second surface of the second semiconductor structure which is opposite the first surface. The second interconnection pillar is in electric contact with the first interconnection pillar.

Abstract translation: 形成第一和第二半导体结构的堆叠。 每个半导体结构包括：半导体本体，具有金属互连电平的上覆绝缘层，以及包括导电区域的第一表面。 半导体结构的第一表面彼此面对。 第一互连柱从第一半导体结构的第一表面延伸。 壳体通向第二半导体结构的第一表面。 壳体被配置为接收第一互连支柱。 第二互连柱从与第一表面相对的第二半导体结构的第二表面突出。 第二互连柱与第一互连柱电接触。

公开(公告)号：US20150053924A1

公开(公告)日：2015-02-26

申请号：US14464898

申请日：2014-08-21

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Michel Marty ,  Laurent Frey ,  Sebastien Jouan ,  Salim Boutami

IPC: H01L31/0352 ,  H01L27/146

CPC classification number: H01L31/035236 ,  G01T1/248 ,  H01L27/14625 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/02327 ,  H01L31/107

Abstract: A SPAD-type photodiode has a semiconductor substrate with a light-receiving surface. A lattice formed of interlaced strips made of a first material covers the light receiving surface. The lattice includes lattice openings with lateral walls covered by a spacer made of a second material. Then first and second materials have different optical indices, and further each optical index is less than or equal to the substrate optical index. A pitch of the lattice is of the order of a magnitude of an operating wavelength of the photodiode. The first and second materials are transparent at that operating wavelength. The lattice is made of a conductive material electrically coupled to an electrical connection node (for example, a bias voltage node).

Abstract translation: SPAD型光电二极管具有具有受光面的半导体基板。 由第一材料制成的交错条形成的格子覆盖光接收表面。 格子包括具有被由第二材料制成的间隔物覆盖的侧壁的格子开口。 然后第一和第二材料具有不同的光学指数，并且每个光学指数还小于或等于基底光学指数。 晶格的间距是光电二极管的工作波长大小的数量级。 第一和第二材料在该工作波长下是透明的。 晶格由电耦合到电连接节点（例如，偏压节点）的导电材料制成。

公开(公告)号：US08963273B2

公开(公告)日：2015-02-24

申请号：US14247084

申请日：2014-04-07

Applicant: STMicroelectronics S.A. ,  STMicroelectronics (Crolles 2) SAS

Inventor： Michel Marty ,  François Roy ,  Jens Prima

IPC: H01L31/00 ,  H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/1463 ,  H01L27/14683 ,  H01L27/14687 ,  H01L27/14689

Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.

Abstract translation: 一种用于形成背面照明图像传感器的方法，包括以下步骤：a）从前表面形成与衬底相反的导电类型的掺杂多晶硅区域，其垂直于正面延伸， 进入第一层; b）使衬底从其后表面变薄到达多晶硅区域，同时保持第一层的条带; c）在所述薄化衬底的后表面上沉积与所述衬底相反的导电类型的掺杂非晶硅层; 和d）在能够将非晶硅层转变成结晶层的温度下退火。

公开(公告)号：US20150021692A1

公开(公告)日：2015-01-22

申请号：US14220542

申请日：2014-03-20

Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives ,  STMicroelectronics (Crolles 2) SAS

Inventor： Frederic Boeuf ,  Olivier Weber

IPC: H01L29/06 ,  H01L21/02 ,  H01L27/12 ,  H01L21/84

CPC classification number: H01L29/7847 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02667 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1203 ,  H01L29/0611 ,  H01L29/0642 ,  H01L29/16 ,  H01L29/161 ,  H01L29/7838

Abstract: A substrate of the silicon on insulator type includes a semi-conducting film disposed on a buried insulating layer which is disposed on an unstressed silicon support substrate. The semi-conducting film includes a first film zone of tensile-stressed silicon and a second film zone of tensile-relaxed silicon. Openings through the buried insulating layer permit access to the unstressed silicon support substrate under the first and second film zones. An N channel transistor is formed from the first film zone and a P channel transistor is formed from the second film zone. The second film zone may comprise germanium enriched silicon forming a compressive-stressed region.

Abstract translation: 硅绝缘体型的衬底包括设置在埋置绝缘层上的半导电膜，该绝缘层设置在未受压的硅支撑衬底上。 半导电膜包括拉伸应力硅的第一膜区和拉伸松弛硅的第二膜区。 穿过掩埋绝缘层的开口允许在第一和第二膜区下方进入未受压的硅支撑基板。 由第一膜区形成N沟道晶体管，并且由第二膜区形成P沟道晶体管。 第二膜区可以包括形成压应力区域的富锗的硅。

公开(公告)号：US20150021668A1

公开(公告)日：2015-01-22

申请号：US14335565

申请日：2014-07-18

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy ,  Julien Michelot ,  Pascale Mazoyer

IPC: H01L27/146 ,  H01L27/148

CPC classification number: H01L27/14616 ,  H01L27/14689 ,  H01L27/14806

Abstract: An image sensor cell formed inside and on top of a substrate of a first conductivity type includes: a storage region of the second conductivity type; a read region of the second conductivity type; a transfer region located between the storage region and the read region; and a transfer gate topping the transfer region and which does not or does not totally top the storage region. The transfer region comprises a first area of the first conductivity type in the vicinity of the storage region, and a second area of the second conductivity type extending between the first area and the read region.

Abstract translation: 在第一导电类型的衬底内部和之上形成的图像传感器单元包括：第二导电类型的存储区域; 第二导电类型的读取区域; 位于所述存储区域和所述读取区域之间的传送区域; 以及转移栅极顶部转移区域，并且不会或不完全顶部存储区域。 传送区域包括在存储区域附近的第一导电类型的第一区域和在第一区域和读取区域之间延伸的第二导电类型的第二区域。

公开(公告)号：US20150021459A1

公开(公告)日：2015-01-22

申请号：US14335095

申请日：2014-07-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: H01L31/103 ,  H01L27/146 ,  H04N5/378

CPC classification number: H01L31/103 ,  H01L27/14612 ,  H01L27/14643 ,  H04N5/378

Abstract: An image sensor cell formed inside and on top of a substrate of a first conductivity type, including: a read region of the second conductivity type; and, adjacent to the read region, a storage region of the first conductivity type topped with a first insulated gate electrode. The first electrode is arranged to receive, in a first operating mode, a first voltage causing the inversion of the conductivity type of the storage region, so that the storage region behaves as an extension of the read region, and, in a second operating mode, a second voltage causing no inversion of the storage region.

Abstract translation: 在第一导电类型的衬底的内部和顶部形成的图像传感器单元，包括：第二导电类型的读取区域; 并且与读取区域相邻的第一导电类型的存储区域顶上第一绝缘栅电极。 第一电极被布置成在第一操作模式下接收导致存储区域的导电类型的反转的第一电压，使得存储区域表现为读取区域的延伸，并且在第二操作模式 ，不会导致存储区域的反转的第二电压。