公开(公告)号：US20110061232A1

公开(公告)日：2011-03-17

申请号：US12952537

申请日：2010-11-23

申请人： Yoichiro Kawamura ,  Shigeki Sawa ,  Katsuhiko Tanno ,  Hironori Tanaka ,  Naoaki Fujii

发明人： Yoichiro Kawamura ,  Shigeki Sawa ,  Katsuhiko Tanno ,  Hironori Tanaka ,  Naoaki Fujii

IPC分类号： H05K3/30

CPC分类号： H05K3/3478 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/3452 ,  H05K2201/0191 ,  H05K2201/099 ,  H05K2203/041 ,  H05K2203/0557 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

摘要： A method for manufacturing a printed wiring board including providing a structure having a wiring substrate having a conductor circuit, a build-up multilayer structure formed over the wiring substrate and having an outermost conductor circuit and an outermost insulative resin layer, and a solder resist layer formed over the outermost conductor circuit and outermost insulative resin layer and having openings with an opening diameter D for mounting electronic elements, forming conductor pads with a pitch of about 200 pm or less on the outermost conductor circuit in the openings of the solder resist layer, respectively, and forming solder bumps with a height H from a surface of the solder resist layer on the conductor pads on the conductor pads, respectively, such that a ratio H/D is about 0.55 to about 1.0.

摘要翻译： 一种印刷布线板的制造方法，其特征在于，具备具有布线基板的结构的布线基板，所述布线基板具有导体电路，在所述布线基板上形成的具有最外侧导体电路和最外层绝缘性树脂层的积层叠层结构，以及阻焊层 形成在最外导体电路和最外绝缘树脂层上，具有用于安装电子元件的开口直径D的开口，在阻焊层的开口中的最外导体电路上形成具有约200μm以下间距的导体焊盘， 并且分别在导体焊盘上的导体焊盘上形成具有高度H的阻焊层的焊料凸块，使得H / D的比率为约0.55至约1.0。

公开(公告)号：US07894163B2

公开(公告)日：2011-02-22

申请号：US12318947

申请日：2009-01-13

申请人： Masaru Inoue ,  Hiroshi Kawamata ,  Hironori Tanaka

发明人： Masaru Inoue ,  Hiroshi Kawamata ,  Hironori Tanaka

IPC分类号： G11B5/48

CPC分类号： B23K26/0738 ,  B21D11/20 ,  Y10T29/49041

摘要： Laser beam irradiation areas are provided in a load curve portion and an angle adjustment portion of a suspension. The laser beam irradiation areas are oriented in a direction in which the suspension is to be bent. A laser beam having a predetermined length and a predetermined shape is irradiated onto each laser beam irradiation area.

公开(公告)号：US07888803B2

公开(公告)日：2011-02-15

申请号：US11580928

申请日：2006-10-16

申请人： Takashi Kariya ,  Hironori Tanaka

发明人： Takashi Kariya ,  Hironori Tanaka

IPC分类号： H01L23/48

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/3011 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0352 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09827 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2224/05599

摘要： A printed circuit board including a conductor portion, an insulating layer formed over the conductor portion, a thin-film capacitor formed over the insulating layer and including a first electrode, a second electrode and a high-dielectric layer interposed between the first electrode and the second electrode, and a via-hole conductor structure formed through the second electrode and insulating layer and electrically connecting the second electrode and the conductor portion. The via-hole conductor structure has a first portion in the second electrode and a second portion in the insulating layer. The first portion of the via-hole conductor structure has a truncated-cone shape tapering toward the conductor portion.

摘要翻译： 一种印刷电路板，包括导体部分，在导体部分上形成的绝缘层，形成在绝缘层之上的薄膜电容器，并且包括第一电极，第二电极和介于第一电极和第二电极之间的高电介质层 第二电极和通过第二电极和绝缘层形成的通孔导体结构，并且电连接第二电极和导体部分。 通孔导体结构在第二电极中具有第一部分，在绝缘层中具有第二部分。 通孔导体结构的第一部分具有朝向导体部分逐渐变细的截锥形。

公开(公告)号：US07832028B2

公开(公告)日：2010-11-16

申请号：US11663740

申请日：2005-09-27

申请人： Toshihiko Yayama ,  Hisatsune Nashiki ,  Ichiro Teshiba ,  Tatsuhiko Takase ,  Hironori Tanaka ,  Takaaki Iwasaki

发明人： Toshihiko Yayama ,  Hisatsune Nashiki ,  Ichiro Teshiba ,  Tatsuhiko Takase ,  Hironori Tanaka ,  Takaaki Iwasaki

IPC分类号： A61H33/02

CPC分类号： A61H33/60 ,  A47K3/022 ,  A61H33/02 ,  A61H33/6026 ,  A61H35/006

摘要： A fine-bubble generator is capable of supplying a fluid mixed with a large quantity of fine bubbles into a fluid without causing an unnecessary liquid flow and turbulent flow in the objective fluid. The fine-bubble generator is constructed by arranging two fine-bubble generating sections in a rectangular parallelepiped casing with spouts of the fine-bubble generating sections facing each other. The fine-bubble generating sections have fluid rotating chambers each composed of a circumferential wall provided around an imaginary center line and partition walls arranged at both ends of the circumferential wall, liquid introducing passages provided so as to communicate with the fluid rotating chambers in order to introduce a liquid along a direction that forms a position twisted relative to the imaginary center line, gas introducing passages opened in the partition wall of each of the fluid rotating chambers in order to introduce a gas into each of the fluid rotating chambers, and spouts opened in the partition walls.

摘要翻译： 微气泡发生器能够将流入大量微小气泡的流体供给到流体中，而不会在物流中引起不必要的液体流动和湍流。 微气泡发生器通过将两个细气泡生成部分布置在长方体状的壳体中，其中微小气泡生成部分的喷口彼此面对。 细气泡发生部分具有流体旋转室，每个流体旋转室由围绕假想中心线设置的圆周壁和设置在周壁两端的隔壁构成，液体引入通道设置成与流体旋转室连通，以便 沿着形成相对于假想中心线扭曲的位置的方向引入液体，在每个流体旋转室的分隔壁中开口的气体导入通道，以将气体引入到每个流体旋转室中，并且喷口打开 在隔墙内。

公开(公告)号：US20100257411A1

公开(公告)日：2010-10-07

申请号：US12754789

申请日：2010-04-06

申请人： Kouichi Mase ,  Yoshiko Suenaga ,  Kazuto Oonuma ,  Katsuaki Nagata ,  Hironori Tanaka ,  Masamitsu Tsuchiya

发明人： Kouichi Mase ,  Yoshiko Suenaga ,  Kazuto Oonuma ,  Katsuaki Nagata ,  Hironori Tanaka ,  Masamitsu Tsuchiya

IPC分类号： G06F11/07 ,  G06F9/455 ,  G06F3/048

CPC分类号： G06K15/402

摘要： According to one embodiment, an emulation device includes a storing section that stores model information of an apparatus that can be emulated and an emulator corresponding to the model information, an obtaining section that obtains the model information of the apparatus, a detection section that detects, from the model information in the storing section, model information corresponding to the model information of the apparatus obtained by the obtaining section, and an executing section that activates an emulator of the apparatus corresponding to the detected model information.

摘要翻译： 根据一个实施例，一种仿真装置包括：存储部，其存储可以仿真的装置的模型信息和与模型信息对应的仿真器;获取部，其获取该装置的模型信息;检测部， 从所述存储部中的模型信息，对应于由获取部获得的装置的模型信息的模型信息，以及执行部，其激活与检测到的模型信息对应的装置的仿真器。

公开(公告)号：US20100043942A1

公开(公告)日：2010-02-25

申请号：US12614576

申请日：2009-11-09

申请人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

发明人： Hironori Tanaka ,  Kazuhiro Yoshikawa ,  Naoaki Fujii ,  Atsunari Yamashita

IPC分类号： B32B38/00 ,  B32B38/10

CPC分类号： H05K1/185 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K1/0231 ,  H05K1/188 ,  H05K3/382 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A printed wiring board is manufactured by a method in which a laminate body having a first insulation layer and a conductive film is provided. An alignment mark is formed in the laminate body by removing at least a portion of the conductive film. An electronic component is placed on an adhesive layer provided on the first insulation layer at a position determined based on the alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

摘要翻译： 通过提供具有第一绝缘层和导电膜的层叠体的方法制造印刷线路板。 通过去除导电膜的至少一部分，在层压体中形成对准标记。 将电子部件放置在基于对准标记确定的位置上设置在第一绝缘层上的粘合剂层上。 在将电子部件封装在第二绝缘层的开口内之后，在基于用于确定电子部件的位置的对准标记确定的位置处形成暴露电子部件的端子的通孔。 通孔导体形成在通孔中，导电层形成在导电膜上并被图案化以形成连接到通孔导体的导电电路。

公开(公告)号：US07628329B2

公开(公告)日：2009-12-08

申请号：US11448058

申请日：2006-06-07

申请人： Hironori Tanaka ,  Takahiro Saito ,  Yukio Iijima ,  Hideo Fujii ,  Hajime Ichida ,  Yuka Aoki ,  Junichi Matsunoshita ,  Takeshi Onishi

发明人： Hironori Tanaka ,  Takahiro Saito ,  Yukio Iijima ,  Hideo Fujii ,  Hajime Ichida ,  Yuka Aoki ,  Junichi Matsunoshita ,  Takeshi Onishi

IPC分类号： G06K7/10

CPC分类号： H04N1/32133 ,  H04N1/00867 ,  H04N1/00883 ,  H04N1/32144 ,  H04N1/32208 ,  H04N1/32229 ,  H04N1/32325 ,  H04N2201/3205 ,  H04N2201/3208 ,  H04N2201/3214 ,  H04N2201/3226 ,  H04N2201/3246 ,  H04N2201/3269 ,  H04N2201/3271

摘要： An image processing device includes a judgement section and a generation section. A latent image, which would be retained or eliminated by photocopying, is to be superposed with machine-readable code images, which are encoded supplementary information, to generate a superposed image. The judgement section judges overlapping of the latent image with the machine-readable code images. The generation section, on the basis of judgement results from the judgement section, determines an arrangement of the machine-readable code images and generates the superposed image.

摘要翻译： 图像处理装置包括判断部和生成部。 将通过复印保留或消除的潜像将与被编码的辅助信息的机器可读代码图像叠加以生成叠加的图像。 判断部判断潜像与机器可读代码图像的重叠。 生成部根据判断部的判断结果，确定机器可读代码图像的配置，生成叠加图像。

公开(公告)号：US20090242252A1

公开(公告)日：2009-10-01

申请号：US12325498

申请日：2008-12-01

申请人： Hironori Tanaka

发明人： Hironori Tanaka

IPC分类号： H05K3/32 ,  H05K1/16

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2223/54426 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/2518 ,  H01L2224/2919 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/0231 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09036 ,  H05K2201/09918 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2201/10727 ,  H05K2203/1469 ,  H05K2203/166 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/01028

摘要： A multilayer printed wiring board and method for manufacturing a multilayer printed wiring board. One method include a method for manufacturing a multilayer printed wiring board having an electronic component housed therein. The method includes forming a conduction circuit on a core substrate and forming an alignment mark on the core substrate separate from the conduction circuit. Also included is forming a concavity in the core substrate, the concavity being formed in an area of the core substrate not including the conductor circuit and alignment mark, and inserting the electronic component into the concavity in the core substrate by using the alignment mark on the core substrate to align the electronic component with the concavity.

摘要翻译： 一种多层印刷线路板及其制造方法。 一种方法包括制造其中容纳有电子部件的多层印刷线路板的方法。 该方法包括在芯基板上形成导通电路，并在芯基板上形成与导通电路分离的对准标记。 还包括在芯基板中形成凹部，凹部形成在不包括导体电路的芯基板的区域和对准标记中，并且通过使用在芯基板上的对准标记将电子部件插入芯基板的凹部 芯基板以使电子部件与凹部对准。

公开(公告)号：US20090139760A1

公开(公告)日：2009-06-04

申请号：US12216747

申请日：2008-07-10

申请人： Hironori Tanaka

发明人： Hironori Tanaka

IPC分类号： H01R12/04 ,  H05K3/00

CPC分类号： H05K1/162 ,  H05K1/0269 ,  H05K1/112 ,  H05K3/205 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0179 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/09918 ,  H05K2203/166

摘要： A multilayer printed wiring board including an insulation layer and a first interlayer resin insulation layer provided on the insulation layer. A layered capacitor section is provided on the first interlayer resin insulation layer and has a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. Also included is a second interlayer resin insulation layer provided on the first interlayer resin insulation layer and the layered capacitor section, and a metal thin-film layer provided over the layered capacitor section and on the second interlayer resin insulation layer. An outermost interlayer resin insulation layer is provided on the second interlayer resin insulation layer and the metal thin-film layer, and a mounting section is provided on the outermost interlayer resin insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each interlayer resin insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals, and second via conductors that electrically connect the second layered electrode to the second external terminals.

摘要翻译： 一种多层印刷线路板，包括设置在所述绝缘层上的绝缘层和第一层间树脂绝缘层。 层叠电容器部分设置在第一层间树脂绝缘层上，并且具有高电介质层和夹在高电介质层中的第一和第二层状电极。 还包括设置在第一层间树脂绝缘层和层状电容器部分上的第二层间树脂绝缘层和设置在层状电容器部分和第二层间树脂绝缘层上的金属薄膜层。 在第二层间树脂绝缘层和金属薄膜层上设置最外层的层间树脂绝缘层，并且在最外层的层间树脂绝缘层上设置安装部，并且具有安装半导体元件的第一和第二外部端子。 多个通孔导体穿过每个层间树脂绝缘层。 通孔导体包括将第一层状电极电连接到第一外部端子的第一通孔导体和将第二层状电极电连接到第二外部端子的第二通路导体。

公开(公告)号：US20070262778A1

公开(公告)日：2007-11-15

申请号：US11746584

申请日：2007-05-09

申请人： Hiroki Ando ,  Hironori Tanaka

发明人： Hiroki Ando ,  Hironori Tanaka

IPC分类号： G01N27/42

CPC分类号： G01N27/045

摘要： An object of the present invention is to provide a DC test apparatus capable of reducing wasteful standby power consumption. The DC test apparatus has a power amplifier circuit 130 for supplying a current to a DUT during a test. The power amplifier circuit 130 is provided with transistors 18 and 20 for generating an output current appropriate for an input voltage during current supply, resistors 54 and 56, and a variable resistance circuit 40 for setting a standby current flowing through these transistors 18 and 20 and the like during current supply to a smaller value at any time other than during current supply.

摘要翻译： 本发明的目的是提供一种能够减少浪费的待机功耗的DC测试装置。 直流测试装置具有用于在测试期间向DUT提供电流的功率放大器电路130。 功率放大器电路130设置有晶体管18和20，用于在电流供应期间产生适合于输入电压的输出电流，电阻器54和56，以及用于设置流过这些晶体管18和20的待机电流的可变电阻电路40，以及 在电流供给期间的任何时刻，除了在电流供给期间的任何时间，都将其提供给较小的值。