公开(公告)号：US20170154948A1

公开(公告)日：2017-06-01

申请号：US15431877

申请日：2017-02-14

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani ,  Alessandro Finocchiaro

IPC: H01L49/02 ,  H01L23/66 ,  H01L23/528 ,  G01R31/302 ,  H01L23/00 ,  H01L21/66 ,  G01R31/28 ,  H01L23/58 ,  H01L29/06

CPC classification number: H01L28/10 ,  G01R31/2834 ,  G01R31/2889 ,  G01R31/3025 ,  H01L22/32 ,  H01L22/34 ,  H01L23/528 ,  H01L23/544 ,  H01L23/564 ,  H01L23/585 ,  H01L23/66 ,  H01L24/05 ,  H01L25/0657 ,  H01L29/0642 ,  H01L2223/6677 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An integrated circuit on a substrate includes a peripheral portion that surrounds an active area and is positioned close to a scribe line providing separation with other integrated circuits realized on a same wafer. The integrated circuit includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations starting from the substrate and forms an integrated antenna. Another conductive structure extends in the peripheral portion on different planes of metallizations and forms a seal ring.

公开(公告)号：US20170082684A1

公开(公告)日：2017-03-23

申请号：US15367271

申请日：2016-12-02

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R31/28

CPC classification number: G01R31/2884 ,  H01L22/32 ,  H01L22/34 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05554 ,  H01L2924/12042 ,  H01L2924/00

Abstract: A testing architecture for integrated circuits on a wafer includes at least one first circuit of a structure TEG realized in a scribe line providing separation between first and second integrated circuits. At least one pad is shared by a second circuit inside at least one of the first and second integrated circuits and the first circuit. Switching circuitry is coupled to the at least one pad and to the first and second circuits.

公开(公告)号：US09530743B2

公开(公告)日：2016-12-27

申请号：US14752006

申请日：2015-06-26

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani ,  Giovanni Girlando

IPC: H01L23/64 ,  H01L23/66 ,  H01L23/522 ,  H01L23/48 ,  H01L25/065 ,  H01L25/10 ,  H01Q1/22 ,  H01Q1/36 ,  H01Q7/00 ,  H01L29/82 ,  H01L23/00 ,  H01L25/16 ,  G01R1/073 ,  G01R31/302

CPC classification number: H01L25/0657 ,  G01R1/07314 ,  G01R31/3025 ,  H01L23/48 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/16 ,  H01L28/10 ,  H01L29/82 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29199 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/29399 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01059 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19042 ,  H01L2924/207 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q7/00 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05552

Abstract: An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna.

公开(公告)号：US20160077130A1

公开(公告)日：2016-03-17

申请号：US14950171

申请日：2015-11-24

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: G01R3/00 ,  G01R1/073 ,  G01R1/067

CPC classification number: G01R3/00 ,  G01R1/06761 ,  G01R1/07307 ,  G01R1/07342 ,  G01R31/31905 ,  Y10T29/49002

Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.

Abstract translation: 制造悬臂式探针用于集成电子电路的测试装置。 探针被配置为在测试操作期间接触待测试的电子电路的相应端子。 探针体由导电材料形成。 在每个探针体的下部，其在使用中被引导到要接触的相应端子，形成具有等于或大于300HV的第一硬度值的导电接触区域; 每个接触区域和相应的探针体形成相应的探针。

公开(公告)号：US09256027B2

公开(公告)日：2016-02-09

申请号：US14145807

申请日：2013-12-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Alberto Pagani ,  Alessandro Motta ,  Sara Loi ,  Guido Chiaretti

IPC: G02B6/12 ,  G02B6/43 ,  H01L31/0232 ,  H01L31/103 ,  H01L31/12 ,  G02B6/42

CPC classification number: G02B6/12002 ,  G02B6/12004 ,  G02B6/42 ,  G02B6/4214 ,  G02B6/43 ,  H01L31/02327 ,  H01L31/103 ,  H01L31/125

Abstract: An integrated electronic device, delimited by a first surface and by a second surface and including: a body made of semiconductor material, formed inside which is at least one optoelectronic component chosen between a detector and an emitter; and an optical path which is at least in part of a guided type and extends between the first surface and the second surface, the optical path traversing the body. The optoelectronic component is optically coupled, through the optical path, to a first portion of free space and a second portion of free space, which are arranged, respectively, above and underneath the first and second surfaces.

公开(公告)号：US08967000B2

公开(公告)日：2015-03-03

申请号：US14027990

申请日：2013-09-16

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani ,  Federico Giovanni Ziglioli

IPC: G01L1/00 ,  H05K1/02

CPC classification number: G01L1/005 ,  G01N33/38 ,  H05K1/0239 ,  H05K1/0278 ,  H05K1/189 ,  H05K2201/09081 ,  H05K2201/10098 ,  H05K2201/10151 ,  Y10T156/1051

Abstract: A planar electric circuit board may include a planar support of a foldable material defining a base surface and wings coupled to the base surface along respective folding lines so that the wings, when folded along the folding lines, are erected with respect to the base surface and remain in that position. An auxiliary circuit is on the planar support and may include pairs of capacitive coupling plates defined on the wings and on the base surface, and electric communication lines coupled to corresponding ones of the pairs of capacitive coupling plates.

Abstract translation: 平面电路板可以包括限定基部表面的可折叠材料的平面支撑件和沿着各个折叠线连接到基座表面的翼片，使得当沿着折叠线折叠时的翼片相对于基部表面竖立，并且 保持在这个位置。 辅助电路在平面支撑件上，并且可以包括限定在翼部和基部表面上的成对的电容耦合板，以及耦合到成对的电容耦合板中的对应的电气通信线。

公开(公告)号：US08941108B2

公开(公告)日：2015-01-27

申请号：US13722684

申请日：2012-12-20

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: H01L23/58

CPC classification number: H01L22/14 ,  G01R31/2818 ,  G01R31/2884 ,  H01L22/32 ,  H01L23/481 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A method performs electrical testing and assembly of an electronic device on a wafer and comprising a pad made in an oxide layer covered by a passivation layer. The method includes connecting the electronic device to a testing apparatus; providing said electronic device with a metallization layer extending on the passivation layer from the pad to a non-active area of said wafer. The method comprises-performing the electrical testing on wafer of the electronic device by placing a probe of on a portion of the extended metallization layer; performing the cut of said wafer, reducing the extension of the metallization layer to the edge of the electronic device; embedding the device inside a package, forming on the metallization layer an electrical connection configured to connect the metallization layer to a circuit in said package.

Abstract translation: 一种方法执行电子装置在晶片上的电测试和组装，并且包括由钝化层覆盖的氧化物层中制成的焊盘。 该方法包括将电子设备连接到测试设备; 向所述电子设备提供在所述钝化层上从所述焊盘延伸到所述晶片的非有效区域的金属化层。 该方法包括：通过放置延伸的金属化层的一部分上的探针来对电子器件的晶片进行电测试; 执行所述晶片的切割，减少金属化层延伸到电子设备的边缘; 将器件嵌入封装内，在金属化层上形成电连接，该电连接被配置为将金属化层连接到所述封装中的电路。

公开(公告)号：US20140145804A1

公开(公告)日：2014-05-29

申请号：US14062698

申请日：2013-10-24

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: H01H50/00 ,  H01H50/16

CPC classification number: H01H50/16 ,  H01H1/0036 ,  H01H50/005 ,  H01H51/26 ,  H01H2001/0078 ,  H01H2001/0084 ,  H01H2050/007

Abstract: A magnetic relay device having a substrate of semiconductor material houses two through magnetic vias of electrically conductive ferromagnetic material. At least one coil is arranged underneath a first surface of the substrate in proximity of at least one between the first and second magnetic vias, and a contact structure, of ferromagnetic material, is arranged over a second surface of the substrate and is controlled by the magnetic field generated by the coil so as to switch between an open position, wherein the contact structure electrically disconnects the first and second magnetic vias, and a close position, wherein the contact structure electrically connects the first and second magnetic vias.

Abstract translation: 具有半导体材料的基板的磁继电器装置容纳两个通过导电铁磁材料的磁通孔。 至少一个线圈布置在衬底的第一表面的下方，靠近第一和第二磁通道之间的至少一个，并且铁磁材料的接触结构布置在衬底的第二表面上，并且由 所述线圈产生的磁场在所述接触结构电断开所述第一和第二磁通孔的打开位置与闭合位置之间切换，其中所述接触结构电连接所述第一和第二磁通孔。

公开(公告)号：US11169180B2

公开(公告)日：2021-11-09

申请号：US16130536

申请日：2018-09-13

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani

IPC: H05K3/30 ,  G01R3/00 ,  G01R31/319 ,  G01R1/067 ,  G01R1/073

Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.

公开(公告)号：US11069798B2

公开(公告)日：2021-07-20

申请号：US16377080

申请日：2019-04-05

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Alessandro Paolo Bramanti ,  Alberto Pagani

IPC: H01L29/76 ,  H01L29/778 ,  H01L29/423 ,  H01L29/10 ,  H01L29/06 ,  H01L29/66 ,  H01L29/20

Abstract: A device includes a particle propagation channel, a particle deflector, a particle source, and a particle sink. The particle deflector facilitates ballistic transport of particles from a particle inflow portion through a particle flow deflection portion to a particle outflow portion. The particle deflector is arranged at the particle flow deflection portion and is activatable to deflect particles in the flow deflection portion and is configured to selectively prevent the particles from reaching the particle outflow portion. The particle source and particle sink are configured to cause a current path of the particles through the device.