公开(公告)号：US20160343891A1

公开(公告)日：2016-11-24

申请号：US14971019

申请日：2015-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Kiyoung LEE ,  Sangyeob LEE ,  Eunkyu LEE ,  Jaeho LEE ,  Seongjun PARK

IPC: H01L31/032 ,  H01L31/0352 ,  H01L27/144 ,  H01L29/786 ,  H01L29/12 ,  H01L29/45 ,  H01L29/66 ,  H01L31/0224 ,  H01L29/24

CPC classification number: H01L31/032 ,  H01L27/1446 ,  H01L29/127 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66977 ,  H01L29/786 ,  H01L31/022408 ,  H01L31/022425 ,  H01L31/022466 ,  H01L31/035209 ,  H01L31/035218 ,  H01L31/035227 ,  H01L31/035281 ,  H01L31/1884 ,  Y02E10/50

Abstract: Example embodiments relate to semiconductor devices including two-dimensional (2D) materials, and methods of manufacturing the semiconductor devices. A semiconductor device may be an optoelectronic device including at least one doped 2D material. The optoelectronic device may include a first electrode, a second electrode, and a semiconductor layer between the first and second electrodes. At least one of the first electrode and the second electrode may include doped graphene. The semiconductor layer may have a built-in potential greater than or equal to about 0.1 eV, or greater than or equal to about 0.3 eV. One of the first electrode and the second electrode may include p-doped graphene, and the other may include n-doped graphene. Alternatively, one of the first electrode and the second electrode may include p-doped or n-doped graphene, and the other may include a metallic material.

Abstract translation: 示例实施例涉及包括二维（2D）材料的半导体器件以及制造半导体器件的方法。 半导体器件可以是包括至少一种掺杂的2D材料的光电子器件。 光电子器件可以包括第一电极，第二电极和第一和第二电极之间的半导体层。 第一电极和第二电极中的至少一个可以包括掺杂的石墨烯。 半导体层可具有大于或等于约0.1eV，或大于或等于约0.3eV的内置电位。 第一电极和第二电极之一可以包括p掺杂的石墨烯，另一个可以包括n掺杂的石墨烯。 或者，第一电极和第二电极中的一个可以包括p掺杂或n掺杂的石墨烯，另一个可以包括金属材料。

公开(公告)号：US20150364545A1

公开(公告)日：2015-12-17

申请号：US14600888

申请日：2015-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Taeho KIM ,  Kiyoung LEE ,  Seongjun PARK

IPC: H01L29/10 ,  H01L29/16 ,  H01L29/775 ,  H01L27/12 ,  H01L27/144 ,  H01L29/12 ,  H01L27/146

CPC classification number: H01L29/1033 ,  H01L27/1222 ,  H01L27/1443 ,  H01L27/156 ,  H01L29/0665 ,  H01L29/1606 ,  H01L29/267 ,  H01L29/778 ,  H01L29/78681 ,  H01L29/78684 ,  H01L31/028 ,  H01L31/035218 ,  H01L31/1136 ,  H01L33/0041 ,  H01L33/06 ,  H01L33/34 ,  Y02E10/547

Abstract: According to example embodiments, an electronic device includes channel layer including a graphene layer electrically contacting a quantum dot layer including a plurality of quantum dots, a first electrode and a second electrode electrically connected to the channel layer, respectively, and a gate electrode configured to control an electric current between the first electrode and the second electrode via the channel layer. A gate insulating layer may be between the gate electrode and the channel layer.

Abstract translation: 根据示例性实施例，电子设备包括沟道层，该沟道层包括与包括多个量子点的量子点层电接触的石墨烯层，分别与沟道层电连接的第一电极和第二电极，以及栅电极， 通过沟道层控制第一电极和第二电极之间的电流。 栅绝缘层可以在栅电极和沟道层之间。

公开(公告)号：US20150348794A1

公开(公告)日：2015-12-03

申请号：US14725390

申请日：2015-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon KIM ,  Hyeonjin SHIN ,  Seongjun PARK

IPC: H01L21/308 ,  H01L21/02 ,  H01L21/324

CPC classification number: H01L21/3081 ,  C09D1/00 ,  G03F7/16 ,  G03F7/168 ,  G03F7/2006 ,  G03F7/327 ,  G03F7/40 ,  H01L21/02115 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/324

Abstract: A hardmask composition may include a solvent and a 2-dimensional carbon nanostructure containing about 0.01 atom % to about 40 atom % of oxygen or a 2-dimensional carbon nanostructure precursor thereof. A content of oxygen in the 2-dimensional carbon nanostructure precursor may be lower than about 0.01 atom % or greater than about 40 atom %. The hardmask composition may be used to form a fine pattern.

Abstract translation: 硬掩模组合物可以包括溶剂和包含约0.01原子％至约40原子％的氧的二维碳纳米结构或其二维碳纳米结构前体。 二维碳纳米结构前体中的氧含量可以低于约0.01原子％或大于约40原子％。 硬掩模组合物可用于形成精细图案。

公开(公告)号：US20150155374A1

公开(公告)日：2015-06-04

申请号：US14528338

申请日：2014-10-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungeun BYUN ,  Jisoo KYOUNG ,  Seongjun PARK ,  Hyeonjin SHIN ,  Hyunjae SONG ,  Jaeho LEE

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/267

CPC classification number: H01L29/66977 ,  H01L29/456 ,  H01L29/78

Abstract: An electronic device includes a semiconductor layer, a tunneling layer formed of a material including a two-dimensional (2D) material so as to directly contact a certain region of the semiconductor layer, and a metal layer formed on the tunneling layer.

Abstract translation: 电子器件包括半导体层，由包括二维（2D）材料的材料形成的隧道层，以便直接接触半导体层的特定区域，以及形成在隧道层上的金属层。

公开(公告)号：US20210327817A1

公开(公告)日：2021-10-21

申请号：US17362308

申请日：2021-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae SONG ,  Seunggeol NAM ,  Yeonchoo CHO ,  Seongjun PARK ,  Hyeonjin SHIN ,  Jaeho LEE

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

Abstract: Example embodiments relate to a layer structure having a diffusion barrier layer, and a method of manufacturing the same. The layer structure includes first and second material layers and a diffusion barrier layer therebetween. The diffusion barrier layer includes a nanocrystalline graphene (nc-G) layer. In the layer structure, the diffusion barrier layer may further include a non-graphene metal compound layer or a graphene layer together with the nc-G layer. One of the first and second material layers is an insulating layer, a metal layer, or a semiconductor layer, and the remaining layer may be a metal layer.

公开(公告)号：US20190097215A1

公开(公告)日：2019-03-28

申请号：US16015835

申请日：2018-06-22

Applicant: Samsung Electronics Co., Ltd. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Minhyun LEE ,  Seongjun PARK ,  Hyunjae SONG ,  Hyeonjin SHIN ,  Ki-Bum KIM ,  Yunhho KANG ,  Sanghun LEE

IPC: H01M4/36 ,  H01M10/0525 ,  H01M4/133 ,  H01M4/587 ,  H01M4/38

Abstract: Provided are lithium ion batteries including a nano-crystalline graphene electrode. The lithium ion battery includes a cathode on a cathode current collector, an electrolyte layer on the cathode, an anode on the electrolyte layer, and an anode current collector on the anode. The anode and the cathode include a plurality of grains having a size in a range from about 5 nm to about 100 nm. The cathode has a double bonded structure in which a carbon of the graphene is combined with oxygen.

公开(公告)号：US20190033705A1

公开(公告)日：2019-01-31

申请号：US16004585

申请日：2018-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Hyeonjin SHIN ,  Seongjun JEONG ,  Seongjun PARK

IPC: G03F1/62

Abstract: A pellicle configured to protecting a photomask from external contaminants may include a metal catalyst layer and a pellicle membrane including a 2D material on the metal catalyst layer, wherein the metal catalyst layer supports edge regions of the pellicle membrane and does not support a central region of the pellicle membrane. The metal catalyst layer may be on a substrate, such that the substrate and the metal catalyst layer collectively support the edge region of the pellicle membrane and do not support the central region of the pellicle membrane. The pellicle may be formed based on growing the 2D material on the metal catalyst layer and etching an inner region of the metal catalyst layer that supports the central region of the formed pellicle membrane.

公开(公告)号：US20190019675A1

公开(公告)日：2019-01-17

申请号：US15874226

申请日：2018-01-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongwook LEE ,  Sangwon KIM ,  Minsu SEOL ,  Seongjun PARK ,  Hyeonjin SHIN ,  Yunseong LEE ,  Seongjun JEONG ,  Alum JUNG

IPC: H01L21/033 ,  H01L21/311 ,  C01B32/194

Abstract: Provided are a hardmask composition, a method of preparing the same, and a method of forming a patterned layer using the hardmask composition. The hardmask composition may include graphene quantum dots, a metal compound, and a solvent. The metal compound may be chemically bonded (e.g., covalently bonded) to the graphene quantum dots. The metal compound may include a metal oxide. The metal oxide may include at least one of zirconium (Zr) oxide, titanium (Ti) oxide, tungsten (W) oxide, or aluminum (Al) oxide. The graphene quantum dots may be bonded to the metal compound by an M-O—C bond or an M-C bond, where M is a metal element, O is oxygen, and C is carbon.

公开(公告)号：US20190013648A1

公开(公告)日：2019-01-10

申请号：US15962600

申请日：2018-04-25

Applicant: Samsung Electronics Co., Ltd. ,  President and Fellows Of Harvard College

Inventor： Jinseong HEO ,  Minhyun LEE ,  Seongjun PARK ,  Philip KIM ,  Hongkun PARK ,  Donhee HAM

IPC: H01S5/30 ,  H01S5/062 ,  H01S5/042 ,  H01S5/323

Abstract: A light-emitting device includes a substrate including a photonic cavity and configured to function as a gate, an active layer including a two-dimensional material, a first conductive contact, and a second conductive contact. The wavelength range of light generated by the light-emitting device may be narrowed based on the photonic cavity being included in the substrate, and the intensity and wavelength range of the generated light may be controlled based on the substrate functioning as a gate.

公开(公告)号：US20180212130A1

公开(公告)日：2018-07-26

申请号：US15933900

申请日：2018-03-23

Applicant: Research & Business Foundation SUNGKYUNKWAN UNIVERSITY ,  Samsung Electronics Co., Ltd.

Inventor： Seongjun PARK ,  Hyeonjin Shin ,  Sungwng Kim ,  Eunsung Kim ,  Jaeyeol Hwang Hwang

IPC: H01L35/16 ,  H01L35/18 ,  H01L21/02 ,  H01L35/34 ,  H01L35/10

CPC classification number: H01L35/16 ,  H01L21/02488 ,  H01L21/02502 ,  H01L35/10 ,  H01L35/18 ,  H01L35/34

Abstract: A thermoelectric structure that may be included in a thermoelectric device may include a thin-film structure that may include a plurality of thin-film layers. The thin-film structure may include Tellurium. The thin-film structure may be on a substrate. The substrate may include an oxide, and a buffer layer may be between the substrate and the thin-film structure. The thermoelectric structure may be manufactured via depositing material ablated from a target onto the substrate. Some material may react with the substrate to form the buffer layer, and thin film layers may be formed on the buffer layer. The thin film layers may be removed from the substrate and provided on a separate substrate. Removing the thin-film layers from the substrate may include removing the thin-film layers from the buffer layer.