Abstract:
A nano-electrode or nano-wire may be etched centrally to form a gap between nano-electrode portions. The portions may ultimately constitute a single electron transistor. The source and drain formed from the electrode portions are self-aligned with one another. Using spacer technology, the gap between the electrodes may be made very small.
Abstract:
Cross-shaped sub-resolution assist features may be utilized to print lithographic patterns in semiconductor fabrication processes. The crosses may be isolated structures or may be part of a grid arrangement. The main features, such as contacts, may be positioned on the mask so as to be intersected by the cross-shaped sub-resolution assist features. In some embodiments, the cross-shaped sub-resolution assist features may intersect the main feature at its center point in both the x and y directions.
Abstract:
The present invention relates to exposing a bond pad on a substrate. A bond pad is formed over a silicon substrate with the subsequent formation of a dielectric over the bond pad. A patterned resist is formed, and at least opening is processed to form a sloped sidewall profile. The sloped sidewall profile is subsequently etched and transferred to the dielectric layer, exposing the bond pad.
Abstract:
Self-aligned via and plug patterning for back end of line (BEOL) interconnects are described. In an example, a structure for directed self-assembly includes a substrate and a block co-polymer structure disposed above the substrate. The block co-polymer structure has a polystyrene (PS) component and a polymethyl methacrylate (PMMA) component. One of the PS component or the PMMA component is photosensitive.
Abstract:
Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target features that, when aggregated, substantially (e.g., fully) represent the original target feature without leaving an unrepresented remainder (e.g., a whole-number quantity of unidirectional target features). The unidirectional target features may he arbitrarily grouped such that, within a grouping, all unidirectional target features share a common target width value. Where multiple such groupings are provided, individual groupings may or may not have the same common target width value. In some cases, a series of reticles is provided, each reticle having a mask pattern correlating to a grouping of unidirectional target features. Exposure of a photoresist material via the aggregated series of reticles substantially (e.g., fully) produces the original target feature/pattern. The pattern decomposition techniques may be integrated into any number of patterning processes, such as litho-freeze-litho-etch and litho-etch-litho-etch patterning processes.
Abstract:
Techniques are disclosed for double patterning of a lithographic feature using a barrier layer between the pattern layers. In some cases, the techniques may be implemented with double patterning of a one- or two-dimensional photolithographic feature, for example. In some embodiments, the barrier layer is deposited to protect a first photoresist pattern prior to application of a second photoresist pattern thereon and/or to tailor (e.g., shrink) one or more of the critical dimensions of a trench, hole, or other etchable geometric feature to be formed in a substrate or other suitable surface via lithographic processes. In some embodiments, the techniques may be implemented to generate/print small features (e.g., less than or equal to about 100 nm) including one- and two-dimensional features/structures of varying complexity.
Abstract:
Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target features that, when aggregated, substantially (e.g., fully) represent the original target feature without leaving an unrepresented remainder (e.g., a whole-number quantity of unidirectional target features). The unidirectional target features may he arbitrarily grouped such that, within a grouping, all unidirectional target features share a common target width value. Where multiple such groupings are provided, individual groupings may or may not have the same common target width value. In some cases, a series of reticles is provided, each reticle having a mask pattern correlating to a grouping of unidirectional target features. Exposure of a photoresist material via the aggregated series of reticles substantially (e.g., fully) produces the original target feature/pattern. The pattern decomposition techniques may be integrated into any number of patterning processes, such as litho-freeze-litho-etch and litho-etch-litho-etch patterning processes.
Abstract:
A method of patterning a metal (141, 341, 841) on a vertical sidewall (132, 332, 832) of an excavated feature (130, 330, 830) includes placing a material (350) in the excavated feature such that a portion (435) of the metal is exposed in the excavated feature above the material, etching the exposed portion of the metal away from the vertical sidewall using a first wet etch chemistry, and removing the material from the excavated feature by etching it away using a second wet etch chemistry. The described method may be used to produce a MIM capacitor (800) suitable for an eDRAM device.
Abstract:
Techniques are disclosed for using sub-resolution phased assist features (SPAF) in a lithography mask to improve through process pattern fidelity and/or mitigate inverted aerial image problems. The technique also may be used to improve image contrast in non-inverted weak image sites. The use of SPAF in accordance with some such embodiments requires no adjustment to existing design rules, although adjustments can be made to enable compliance with mask inspection constraints. The use of SPAF also does not require changing existing fab or manufacturing processes, especially if such processes already comprehend phased shift mask capabilities. The SPAFs can be used to enhance aerial image contrast, without the SPAFs themselves printing. In addition, the SPAF phase etch depth can be optimized so as to make adjustments to a given predicted printed feature critical dimension.
Abstract:
A method of patterning a metal (141, 341, 841) on a vertical sidewall (132, 332, 832) of an excavated feature (130, 330, 830) includes placing a material (350) in the excavated feature such that a portion (435) of the metal is exposed in the excavated feature above the material, etching the exposed portion of the metal away from the vertical sidewall using a first wet etch chemistry, and removing the material from the excavated feature by etching it away using a second wet etch chemistry. The described method may be used to produce a MIM capacitor (800) suitable for an eDRAM device.