公开(公告)号：US20110049687A1

公开(公告)日：2011-03-03

申请号：US12942084

申请日：2010-11-09

申请人： Heap Hoe Kuan ,  Rui Huang ,  Yaojian Lin ,  Seng Guan Chow

发明人： Heap Hoe Kuan ,  Rui Huang ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L23/49861 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/495 ,  H01L23/49506 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of manufacturing a semiconductor package system includes: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer; attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer.

摘要翻译： 制造半导体封装系统的方法包括：形成具有无源器件的引线框架; 封装无源器件以形成密封介质; 将第一管芯附接到所述密封剂插入件; 形成具有第二管芯的基板插入件; 并且将所述密封剂插入物堆叠在所述基板插入件上。

公开(公告)号：US07843047B2

公开(公告)日：2010-11-30

申请号：US12276297

申请日：2008-11-21

申请人： Heap Hoe Kuan ,  Rui Huang ,  Yaojian Lin ,  Seng Guan Chow

发明人： Heap Hoe Kuan ,  Rui Huang ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L23/495

CPC分类号： H01L23/49861 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/495 ,  H01L23/49506 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of manufacturing a semiconductor package system including: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer; attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer.

摘要翻译： 一种制造半导体封装系统的方法，包括：形成具有无源器件的引线框架; 封装无源器件以形成密封介质; 将第一管芯附接到所述密封剂插入件; 形成具有第二管芯的基板插入件; 并且将所述密封剂插入物堆叠在所述基板插入件上。

公开(公告)号：US20100230806A1

公开(公告)日：2010-09-16

申请号：US12404134

申请日：2009-03-13

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L25/16 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5389 ,  H01L23/642 ,  H01L24/24 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by forming a plurality of conductive pillars vertically over a temporary carrier. A conformal insulating layer is formed over the conductive pillars. A conformal conductive layer is formed over the conformal insulating layer. A first conductive pillar, conformal insulating layer, and conformal conductive layer constitute a vertically oriented integrated capacitor. A semiconductor die or component is mounted over the carrier. An encapsulant is deposited over the semiconductor die or component and around the conformal conductive layer. A first interconnect structure is formed over a first side of the encapsulant. The first interconnect structure includes an integrated passive device. The first interconnect structure is electrically connected to the semiconductor die or component and vertically oriented integrated capacitor. The carrier is removed. A second interconnect structure is formed over a second side of the encapsulant opposite the first side of the encapsulant.

摘要翻译： 半导体器件通过在临时载体上垂直地形成多个导电柱而制成。 在导电柱上形成保形绝缘层。 在保形绝缘层上形成共形导电层。 第一导电柱，保形绝缘层和共形导电层构成垂直取向的集成电容器。 半导体管芯或部件安装在载体上。 密封剂沉积在半导体管芯或部件上并且在保形导电层周围。 第一互连结构形成在密封剂的第一侧上。 第一互连结构包括集成无源器件。 第一互连结构电连接到半导体管芯或部件和垂直取向的集成电容器。 载体被移除。 第二互连结构形成在与密封剂的第一侧相对的密封剂的第二侧上。

公开(公告)号：US20100127361A1

公开(公告)日：2010-05-27

申请号：US12276297

申请日：2008-11-21

申请人： Heap Hoe Kuan ,  Rui Huang ,  Yaojian Lin ,  Seng Guan Chow

发明人： Heap Hoe Kuan ,  Rui Huang ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L21/50 ,  H01L23/495

CPC分类号： H01L23/49861 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/495 ,  H01L23/49506 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of manufacturing a semiconductor package system including: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer; attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer.

摘要翻译： 一种制造半导体封装系统的方法，包括：形成具有无源器件的引线框架; 封装无源器件以形成密封介质; 将第一管芯附接到所述密封剂插入件; 形成具有第二管芯的基板插入件; 并且将所述密封剂插入物堆叠在所述基板插入件上。

公开(公告)号：US08476120B2

公开(公告)日：2013-07-02

申请号：US13421770

申请日：2012-03-15

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L21/00 ,  H01L21/20 ,  H01L21/02 ,  H01L23/02 ,  H01L23/28

CPC分类号： H01L23/3128 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5389 ,  H01L23/642 ,  H01L24/24 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes conductive pillars disposed vertically over a seed layer, a conformal insulating layer formed over the conductive pillars, and a conformal conductive layer formed over the conformal insulating layer. A first conductive pillar, the conformal insulating layer, and the conformal conductive layer constitute a vertically oriented integrated capacitor. The semiconductor device further includes a semiconductor die or component mounted over the seed layer, an encapsulant deposited over the semiconductor die or component and around the conformal conductive layer, and a first interconnect structure formed over a first side of the encapsulant. The first interconnect structure is electrically connected to a second conductive pillar, and includes an integrated passive device. The semiconductor device further includes a second interconnect structure formed over a second side of the encapsulant opposite the first side of the encapsulant.

摘要翻译： 半导体器件包括垂直设置在种子层上的导电柱，形成在导电柱上的保形绝缘层，以及形成在保形绝缘层上的共形导电层。 第一导电柱，保形绝缘层和共形导电层构成垂直取向的集成电容器。 半导体器件还包括安装在种子层上的半导体管芯或部件，沉积在半导体管芯或部件上并围绕保形导电层的密封剂，以及形成在密封剂的第一侧上的第一互连结构。 第一互连结构电连接到第二导电柱，并且包括集成的无源器件。 所述半导体器件还包括形成在所述密封剂的与密封剂的第一侧相对的第二侧上的第二互连结构。

公开(公告)号：US20130069241A1

公开(公告)日：2013-03-21

申请号：US13236952

申请日：2011-09-20

申请人： Yaojian Lin ,  Rui Huang ,  Heap Hoe Kuan ,  Seng Guan Chow

发明人： Yaojian Lin ,  Rui Huang ,  Heap Hoe Kuan ,  Seng Guan Chow

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/48

CPC分类号： H01L21/561 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/82385 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/92247 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/0665 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a first insulating layer formed over a carrier. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first conductive layer. Vias are formed through the second insulating layer. A second conductive layer is formed over the second insulating layer and extends into the vias. A semiconductor die is mounted to the second conductive layer. A bond wire is formed between a contact pad on the semiconductor die and the second conductive layer. The second conductive layer extends to a mounting site of the semiconductor die to minimize the bond wire span. An encapsulant is deposited over the semiconductor die. A portion of the first insulating layer is removed to expose the second conductive layer. A portion of the first conductive layer is removed to electrically isolate remaining portions of the first conductive layer.

摘要翻译： 半导体器件具有形成在载体上的第一绝缘层。 在第一绝缘层上形成第一导电层。 在第一导电层上形成第二绝缘层。 通过第二绝缘层形成通孔。 第二导电层形成在第二绝缘层上并延伸到通孔中。 半导体管芯安装到第二导电层。 在半导体管芯上的接触焊盘和第二导电层之间形成接合线。 第二导电层延伸到半导体管芯的安装位置，以使接合线跨距最小化。 密封剂沉积在半导体管芯上。 去除第一绝缘层的一部分以露出第二导电层。 去除第一导电层的一部分以电隔离第一导电层的剩余部分。

公开(公告)号：US08163597B2

公开(公告)日：2012-04-24

申请号：US12410312

申请日：2009-03-24

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L25/105 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/81 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/92 ,  H01L2224/96 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/03

摘要： A semiconductor device is made by forming a conductive layer over a first sacrificial carrier. A solder bump is formed over the conductive layer. A no-flow underfill material is deposited over the first carrier, conductive layer, and solder bump. A semiconductor die or component is compressed into the no-flow underfill material to electrically contact the conductive layer. A surface of the no-flow underfill material and first solder bump is planarized. A first interconnect structure is formed over a first surface of the no-flow underfill material. The first interconnect structure is electrically connected to the solder bump. A second sacrificial carrier is mounted over the first interconnect structure. A second interconnect structure is formed over a second side of the no-flow underfill material. The second interconnect structure is electrically connected to the first solder bump. The semiconductor devices can be stacked and electrically connected through the solder bump.

摘要翻译： 通过在第一牺牲载体上形成导电层制成半导体器件。 在导电层上形成焊料凸块。 在第一载体，导电层和焊料凸块上沉积无流动的底部填充材料。 将半导体管芯或部件压缩成无流动底部填充材料以与导电层电接触。 无流动底部填充材料和第一焊料凸块的表面被平坦化。 第一互连结构形成在无流动底部填充材料的第一表面上。 第一互连结构电连接到焊料凸块。 第二牺牲载体安装在第一互连结构上。 第二互连结构形成在无流动底部填充材料的第二侧上。 第二互连结构电连接到第一焊料凸块。 半导体器件可以通过焊料凸块堆叠和电连接。

公开(公告)号：US20110233726A1

公开(公告)日：2011-09-29

申请号：US13155312

申请日：2011-06-07

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L27/04

CPC分类号： H01L23/3128 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5389 ,  H01L23/642 ,  H01L24/24 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes conductive pillars disposed vertically over a seed layer, a conformal insulating layer formed over the conductive pillars, and a conformal conductive layer formed over the conformal insulating layer. A first conductive pillar, the conformal insulating layer, and the conformal conductive layer constitute a vertically oriented integrated capacitor. The semiconductor device further includes a semiconductor die or component mounted over the seed layer, an encapsulant deposited over the semiconductor die or component and around the conformal conductive layer, and a first interconnect structure formed over a first side of the encapsulant. The first interconnect structure is electrically connected to a second conductive pillar, and includes an integrated passive device. The semiconductor device further includes a second interconnect structure formed over a second side of the encapsulant opposite the first side of the encapsulant.

摘要翻译： 半导体器件包括垂直设置在种子层上的导电柱，形成在导电柱上的保形绝缘层，以及形成在保形绝缘层上的共形导电层。 第一导电柱，保形绝缘层和共形导电层构成垂直取向的集成电容器。 半导体器件还包括安装在种子层上的半导体管芯或部件，沉积在半导体管芯或部件上并围绕保形导电层的密封剂，以及形成在密封剂的第一侧上的第一互连结构。 第一互连结构电连接到第二导电柱，并且包括集成的无源器件。 所述半导体器件还包括形成在所述密封剂的与密封剂的第一侧相对的第二侧上的第二互连结构。

公开(公告)号：US20100244277A1

公开(公告)日：2010-09-30

申请号：US12411154

申请日：2009-03-25

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L23/28 ,  H01L21/56 ,  H01L23/52

CPC分类号： H01L21/563 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a sacrificial carrier assembly having a stack interconnector thereover; mounting an integrated circuit having a connector over the sacrificial carrier assembly with the connector over the stack interconnector; dispensing an underfill material between the sacrificial carrier assembly and the integrated circuit with the underfill material substantially free of a void; encapsulating the integrated circuit over the sacrificial carrier assembly and the underfill material; exposing the stack interconnector by removing the sacrificial carrier assembly; and forming a base array over the underfill material and the stack interconnector.

摘要翻译： 一种制造集成电路封装系统的方法包括：提供具有堆叠互连器的牺牲载体组件; 将具有连接器的集成电路安装在所述牺牲载体组件上，所述连接器穿过所述堆叠互连器; 在牺牲载体组件和集成电路之间将底部填充材料分配到基本上没有空隙的底部填充材料; 将集成电路封装在牺牲载体组件和底部填充材料上; 通过去除牺牲载体组件暴露堆叠互连器; 并在底部填充材料和堆叠互连器之上形成基底阵列。

公开(公告)号：US20100244216A1

公开(公告)日：2010-09-30

申请号：US12410312

申请日：2009-03-24

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L25/065 ,  H01L21/50

CPC分类号： H01L25/105 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/81 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/92 ,  H01L2224/96 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/03

摘要： A semiconductor device is made by forming a conductive layer over a first sacrificial carrier. A solder bump is formed over the conductive layer. A no-flow underfill material is deposited over the first carrier, conductive layer, and solder bump. A semiconductor die or component is compressed into the no-flow underfill material to electrically contact the conductive layer. A surface of the no-flow underfill material and first solder bump is planarized. A first interconnect structure is formed over a first surface of the no-flow underfill material. The first interconnect structure is electrically connected to the solder bump. A second sacrificial carrier is mounted over the first interconnect structure. A second interconnect structure is formed over a second side of the no-flow underfill material. The second interconnect structure is electrically connected to the first solder bump. The semiconductor devices can be stacked and electrically connected through the solder bump.

摘要翻译： 通过在第一牺牲载体上形成导电层制成半导体器件。 在导电层上形成焊料凸块。 在第一载体，导电层和焊料凸块上沉积无流动的底部填充材料。 将半导体管芯或部件压缩成无流动底部填充材料以与导电层电接触。 无流动底部填充材料和第一焊料凸块的表面被平坦化。 第一互连结构形成在无流动底部填充材料的第一表面上。 第一互连结构电连接到焊料凸块。 第二牺牲载体安装在第一互连结构上。 第二互连结构形成在无流动底部填充材料的第二侧上。 第二互连结构电连接到第一焊料凸块。 半导体器件可以通过焊料凸块堆叠和电连接。