公开(公告)号：US07868410B2

公开(公告)日：2011-01-11

申请号：US12040350

申请日：2008-02-29

申请人： Philippe M. Vereecken ,  Veeraraghavan S. Basker ,  Cyril Cabral, Jr. ,  Emanuel I. Cooper ,  Hariklia Deligianni ,  Martin M. Frank ,  Rajarao Jammy ,  Vamsi Krishna Paruchuri ,  Katherine L. Saenger ,  Xiaoyan Shao

发明人： Philippe M. Vereecken ,  Veeraraghavan S. Basker ,  Cyril Cabral, Jr. ,  Emanuel I. Cooper ,  Hariklia Deligianni ,  Martin M. Frank ,  Rajarao Jammy ,  Vamsi Krishna Paruchuri ,  Katherine L. Saenger ,  Xiaoyan Shao

IPC分类号： H01L21/70

CPC分类号： H01L21/2885 ,  C25D3/50 ,  C25D5/02 ,  C25D5/024 ,  C25D5/54 ,  C25D7/123 ,  C25D9/04 ,  C25F3/14 ,  H01L21/28079 ,  H01L21/28114 ,  H01L21/76885 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78648

摘要： A method is provided for electroplating a gate metal or other conducting or semiconducting material directly on a dielectric such as a gate dielectric. The method involves selecting a substrate, dielectric layer, and electrolyte solution or melt, wherein the combination of the substrate, dielectric layer, and electrolyte solution or melt allow an electrochemical current to be passed from the substrate through the dielectric layer into the electrolyte solution or melt. Methods are also provided for electrochemical modification of dielectrics utilizing through-dielectric current flow.

摘要翻译： 提供了一种用于将栅极金属或其它导电或半导体材料直接电镀在诸如栅极电介质的电介质上的方法。 该方法包括选择衬底，电介质层和电解质溶液或熔体，其中衬底，电介质层和电解质溶液或熔体的组合允许电化学电流从衬底通过电介质层进入电解质溶液或 熔化。 还提供了利用电介质电流流动的电介质电化学修饰方法。

公开(公告)号：US20100037933A1

公开(公告)日：2010-02-18

申请号：US12189839

申请日：2008-08-12

申请人： Harold John Hovel ,  Rainer Klaus Krause ,  Xiaoyan Shao ,  Steven Erik Steen

发明人： Harold John Hovel ,  Rainer Klaus Krause ,  Xiaoyan Shao ,  Steven Erik Steen

IPC分类号： H01L31/052 ,  H01L31/048 ,  H01L31/18

CPC分类号： H01L31/0504 ,  H01L31/0201 ,  H01L31/022433 ,  H01L31/0475 ,  H01L31/048 ,  H01L31/049 ,  H01L31/0508 ,  Y02E10/50

摘要： A solar cell panel and method of forming a solar cell panel. The method includes a: forming an electrically conductive bus bar on a top surface of a bottom cover plate; forming an electrically conductive contact frame proximate to a bottom surface of a top cover plate, the top cover plate transparent to visible light; and placing an array of rows and columns of solar cell chips between the bottom cover plate and the top cover plate, each solar cell chip of the array of solar cell chips comprising an anode adjacent to a top surface and a cathode adjacent to a bottom surface of the solar cell chip, the bus bar electrically contacting each anode of each solar cell chip of the array of solar cell chips and the contact frame contacting each anode of each solar cell chip of the array of solar cell chips.

摘要翻译： 太阳能电池板及其制造方法。 该方法包括：在底盖板的顶表面上形成导电母线; 形成靠近顶盖板的底表面的导电接触框架，顶盖板对可见光透明; 并且将太阳能电池芯片的行和列阵列放置在底盖板和顶盖板之间，太阳能电池芯片阵列的每个太阳能电池芯片包括与顶表面相邻的阳极和与底表面相邻的阴极 所述母线与所述太阳能电池芯片阵列的每个太阳能电池芯片的每个阳极电接触，并且所述接触框架接触所述太阳能电池芯片阵列的每个太阳能电池芯片的每个阳极。

公开(公告)号：US20090242869A1

公开(公告)日：2009-10-01

申请号：US12054886

申请日：2008-03-25

申请人： Harold J. Hovel ,  Qiang Huang ,  Xiaoyan Shao ,  James Vichiconti ,  George F. Walker

发明人： Harold J. Hovel ,  Qiang Huang ,  Xiaoyan Shao ,  James Vichiconti ,  George F. Walker

IPC分类号： H01L31/00 ,  H01L21/20 ,  H01L29/06

CPC分类号： H01L31/18 ,  B82Y10/00 ,  B82Y30/00 ,  C30B29/02 ,  C30B29/06 ,  C30B29/40 ,  C30B29/52 ,  C30B29/60 ,  C30B29/605 ,  C30B33/10 ,  H01L21/30604 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L31/0352 ,  H01L33/20

摘要： Segmented semiconductor nanowires are manufactured by removal of material from a layered structure of two or more semiconductor materials in the absence of a template. The removal takes place at some locations on the surface of the layered structure and continues preferentially along the direction of a crystallographic axis, such that nanowires with a segmented structure remain at locations where little or no removal occurs. The interface between different segments can be perpendicular to or at angle with the longitudinal direction of the nanowire.

摘要翻译： 在没有模板的情况下通过从两种或更多种半导体材料的层状结构中去除材料来制造分段半导体纳​​米线。 去除在层状结构的表面上的某些位置处发生，并且优选地沿着结晶轴的方向延伸，使得具有分段结构的纳米线保持在很少或不发生去除的位置。 不同片段之间的界面可以垂直于纳米线的纵向方向或与之相垂直。

公开(公告)号：US20090011577A1

公开(公告)日：2009-01-08

申请号：US11774105

申请日：2007-07-06

申请人： Qiang Huang ,  Xiaoyan Shao ,  John L. Stickney ,  Venkatram Venkatasamy

发明人： Qiang Huang ,  Xiaoyan Shao ,  John L. Stickney ,  Venkatram Venkatasamy

IPC分类号： H01L21/20

CPC分类号： C25D3/54 ,  C25D5/10 ,  C25D5/18 ,  C25D7/12 ,  H01L45/06 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1608

摘要： A method of making phase change materials on a substrate by electrochemical atomic layer deposition, which includes sequentially electrodepositing at least one atomic layer of a first element of a first solution and at least one atomic layer of a second element of a second solution on a substrate; and repeating the sequential electrodepositing until at least one film of a phase change material is formed on the substrate.

摘要翻译： 一种通过电化学原子层沉积在基底上制备相变材料的方法，其包括将至少一个原子层的第一溶液的第一元素和第二溶液的第二元素的至少一个原子层顺次电沉积在基底上 ; 并重复连续的电沉积，直到在基底上形成至少一相变材料膜。

公开(公告)号：US07405154B2

公开(公告)日：2008-07-29

申请号：US11308433

申请日：2006-03-24

申请人： Cyril Cabral, Jr. ,  Hariklia Deligianni ,  Randolph F. Knarr ,  Sandra G. Malhotra ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Anna Topol ,  Philippe M. Vereecken

发明人： Cyril Cabral, Jr. ,  Hariklia Deligianni ,  Randolph F. Knarr ,  Sandra G. Malhotra ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Anna Topol ,  Philippe M. Vereecken

IPC分类号： H01L21/4763

CPC分类号： H01L23/485 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/53252 ,  H01L2924/0002 ,  H01L2924/00

摘要： A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and making contact to the silicide or germanide layer on the bottom; a diffusion barrier layer located on top of the contact layer and inside the cavities; optionally a seed layer for plating located on top of the barrier layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer is electrodeposited with at least one member selected from the group consisting of copper, rhodium, ruthenium, iridium, molybdenum, gold, silver, nickel, cobalt, silver, gold, cadmium and zinc and alloys thereof. When the metal fill layer is rhodium, ruthenium, or iridium, an effective diffusion barrier layer is not required between the fill metal and the dielectric. When the barrier layer is platable, such as ruthenium, rhodium, platinum, or iridium, the seed layer is not required.

摘要翻译： 一种接触式冶金结构，包括在基底上具有空腔的图案化电介质层; 位于空腔底部的硅化物或锗化物层，例如钴和/或镍; 接触层，其包含位于介电层顶部并且在空腔内并与底部的硅化物或锗化物层接触的Ti或Ti / TiN; 位于所述接触层顶部和所述空腔内的扩散阻挡层; 可选地，位于阻挡层顶部的用于电镀的种子层; 提供通孔中的金属填充层以及制造方法。 金属填充层用选自铜，铑，钌，铱，钼，金，银，镍，钴，银，金，镉和锌中的至少一种电池和其合金电沉积。 当金属填充层是铑，钌或铱时，在填充金属和电介质之间不需要有效的扩散阻挡层。 当阻挡层是可镀的，例如钌，铑，铂或铱时，不需要种子层。

公开(公告)号：US07405153B2

公开(公告)日：2008-07-29

申请号：US11306932

申请日：2006-01-17

申请人： Sandra G. Malhotra ,  Hariklia Deligianni ,  Stephen M. Rossnagel ,  Xiaoyan Shao ,  Tsong-Lin Tai ,  Oscar van der Straten

发明人： Sandra G. Malhotra ,  Hariklia Deligianni ,  Stephen M. Rossnagel ,  Xiaoyan Shao ,  Tsong-Lin Tai ,  Oscar van der Straten

IPC分类号： H01L21/00 ,  H01L21/44

CPC分类号： H01L21/76843 ,  H01L21/28562 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873 ,  Y10S438/952

摘要： A process for the formation of an interconnect in a semiconductor structure including the steps of forming a dielectric layer on a substrate, forming a first barrier layer on the dielectric layer, forming a second barrier layer on the first barrier layer, wherein the second barrier layer is selected from the group consisting of ruthenium, platinum, palladium, rhodium and iridium and wherein the formation of the second barrier layer is manipulated so that the bulk concentration of oxygen in the second barrier layer is 20 atomic percent or less, and forming a conductive layer on the second barrier layer. The process may additionally include a step of treating the second barrier to reduce the amount of oxide on the surface of the second barrier layer.

摘要翻译： 一种在半导体结构中形成互连的方法，包括以下步骤：在衬底上形成电介质层，在电介质层上形成第一阻挡层，在第一阻挡层上形成第二阻挡层，其中第二阻挡层 选自钌，铂，钯，铑和铱，并且其中操作第二阻挡层的形成，使得第二阻挡层中的氧的体积浓度为20原子％以下，并且形成导电 层在第二阻挡层上。 该方法可以另外包括处理第二阻挡层以减少第二阻挡层表面上的氧化物的量的步骤。

公开(公告)号：US08936978B2

公开(公告)日：2015-01-20

申请号：US12955388

申请日：2010-11-29

申请人： Wilfried Haensch ,  Christian Lavoie ,  Christine Qiqing Ouyang ,  Xiaoyan Shao ,  Paul M. Solomon ,  Zhen Zhang ,  Bin Yang

发明人： Wilfried Haensch ,  Christian Lavoie ,  Christine Qiqing Ouyang ,  Xiaoyan Shao ,  Paul M. Solomon ,  Zhen Zhang ,  Bin Yang

IPC分类号： H01L29/06 ,  H01L29/417

CPC分类号： H01L29/0673 ,  H01L21/823814 ,  H01L29/41791

摘要： A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.

公开(公告)号：US08878259B2

公开(公告)日：2014-11-04

申请号：US13555383

申请日：2012-07-23

申请人： Harold J. Hovel ,  Qiang Huang ,  Xiaoyan Shao ,  James Vichiconti ,  George F. Walker

发明人： Harold J. Hovel ,  Qiang Huang ,  Xiaoyan Shao ,  James Vichiconti ,  George F. Walker

IPC分类号： H01L29/94 ,  H01L29/76 ,  H01L31/119 ,  H01L31/113 ,  H01L31/062 ,  H01L31/18 ,  B82Y10/00 ,  B82Y30/00 ,  C30B29/02 ,  C30B29/06 ,  C30B29/40 ,  C30B29/52 ,  C30B29/60 ,  C30B33/10 ,  H01L21/306 ,  H01L29/06 ,  H01L29/12 ,  H01L31/0352 ,  H01L33/20

CPC分类号： H01L31/18 ,  B82Y10/00 ,  B82Y30/00 ,  C30B29/02 ,  C30B29/06 ,  C30B29/40 ,  C30B29/52 ,  C30B29/60 ,  C30B29/605 ,  C30B33/10 ,  H01L21/30604 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L31/0352 ,  H01L33/20

摘要： Segmented semiconductor nanowires are manufactured by removal of material from a layered structure of two or more semiconductor materials in the absence of a template. The removal takes place at some locations on the surface of the layered structure and continues preferentially along the direction of a crystallographic axis, such that nanowires with a segmented structure remain at locations where little or no removal occurs. The interface between different segments can be perpendicular to or at angle with the longitudinal direction of the nanowire.

摘要翻译： 在没有模板的情况下通过从两种或更多种半导体材料的层状结构中去除材料来制造分段半导体纳​​米线。 去除在层状结构的表面上的某些位置处发生，并且优选地沿着结晶轴的方向延伸，使得具有分段结构的纳米线保持在很少或不发生去除的位置。 不同片段之间的界面可以垂直于纳米线的纵向方向或与之相垂直。

公开(公告)号：US08598018B2

公开(公告)日：2013-12-03

申请号：US12820487

申请日：2010-06-22

申请人： Ali Afzali-Azdakani ,  Shafaat Ahmed ,  Hariklia Deligianni ,  Dario L. Goldfarb ,  Stefan Harrer ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Gustavo A. Stolovitzky

发明人： Ali Afzali-Azdakani ,  Shafaat Ahmed ,  Hariklia Deligianni ,  Dario L. Goldfarb ,  Stefan Harrer ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Gustavo A. Stolovitzky

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L21/283

CPC分类号： C23C8/02 ,  C23C8/36 ,  C23C14/5853 ,  G01N33/48721

摘要： The present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A conductive layer is deposited on a substrate. The conductive layer is partially oxidized by an oxygen plasma process to convert a portion thereof to an oxide layer thereby forming the electrode. The oxide layer is free of surface defects and the thickness of the oxide layer is from about 0.09 nm to about 10 nm and ranges therebetween, controllable with 0.2 nm precision.

摘要翻译： 本发明提供一种在其表面上形成具有降低的腐蚀和水分解的电极的方法。 导电层沉积在基底上。 导电层被氧等离子体工艺部分地氧化，将其一部分转化成氧化层，从而形成电极。 氧化物层没有表面缺陷，氧化物层的厚度为约0.09nm至约10nm，并且其间的范围可以0.2nm精度控制。

公开(公告)号：US08426236B2

公开(公告)日：2013-04-23

申请号：US12775939

申请日：2010-05-07

申请人： Cyril Cabral, Jr. ,  Harold J. Hovel ,  Xiaoyan Shao

发明人： Cyril Cabral, Jr. ,  Harold J. Hovel ,  Xiaoyan Shao

IPC分类号： H01L21/00

CPC分类号： H01L31/18 ,  H01L31/022425 ,  Y02E10/50

摘要： A grid stack structure of a solar cell, which includes a silicon substrate, wherein a front side of the silicon is doped with phosphorus to form a n-emitter and a back side of the silicon is screen printed with aluminum (Al) metallization; a dielectric layer, which acts as an antireflection coating (ARC), applied on the silicon; a mask layer applied on the front side to define a grid opening of the dielectric layer, wherein an etching method is applied to open an unmasked grid area; a light-induced plated nickel or cobalt layer applied to the front side with electrical contact to the back side Al metallization; a silicide layer formed by rapid thermal annealing of the plated nickel (Ni) or cobalt (Co); an optional barrier layer electrodeposited on the silicide; a copper (Cu) layer electrodeposited on the silicide/barrier film layer; and a thin protective layer is chemically applied or electrodeposited on top of the Cu layer.

摘要翻译： 包括硅衬底的太阳能电池的栅格堆叠结构，其中硅的正面被磷掺杂以形成n发射极，硅的背面用铝（Al）金属化丝网印刷; 作为抗反射涂层（ARC）的介电层，施加在硅上; 施加在前侧的掩模层以限定电介质层的栅格开口，其中施加蚀刻方法以打开未屏蔽的栅格区域; 施加到前侧的光诱导的镀镍或钴层与后侧Al金属化电接触; 通过镀镍（Ni）或钴（Co）的快速热退火形成的硅化物层; 电沉积在硅化物上的可选阻挡层; 电沉积在硅化物/阻挡膜层上的铜（Cu）层; 并且将薄的保护层化学施加或电沉积在Cu层的顶部上。