公开(公告)号：US06353258B1

公开(公告)日：2002-03-05

申请号：US09603966

申请日：2000-06-26

申请人： Hirokazu Inoue ,  Ryuichi Saito ,  Mutsuhiro Mori ,  Yasutoshi Kurihara ,  Jin Onuki ,  Shin Kimura ,  Satoshi Shimada ,  Kazuhiro Suzuki ,  Yukio Kamita ,  Isao Kobayashi ,  Kazuji Yamada ,  Naohiro Momma

发明人： Hirokazu Inoue ,  Ryuichi Saito ,  Mutsuhiro Mori ,  Yasutoshi Kurihara ,  Jin Onuki ,  Shin Kimura ,  Satoshi Shimada ,  Kazuhiro Suzuki ,  Yukio Kamita ,  Isao Kobayashi ,  Kazuji Yamada ,  Naohiro Momma

IPC分类号： H01L2334

CPC分类号： H01L23/5386 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85447 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/16151 ,  H01L2924/16315 ,  H01L2924/181 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor module has a plurality of power semiconductor devices mounted on a substrate, and a metal foil for wiring is mounted on the substrate so that an asymmetric unit arrangement of the semiconductor devices is formed. In the device, all of the units are arranged in the same direction on the substrate, and all of the units are electrically connected with electrode terminal feet, and the electrode terminal feet are electrically connected with linkage terminal foot. The electrode terminal feet are disposed with a certain interval.

摘要翻译： 半导体模块具有安装在基板上的多个功率半导体器件，并且用于布线的金属箔安装在基板上，从而形成半导体器件的不对称单元布置。 在该装置中，所有单元在基板上沿相同的方向排列，并且所有单元与电极端子脚电连接，并且电极端子脚与联动端子脚电连接。 电极端子脚以一定间隔设置。

公开(公告)号：US5956231A

公开(公告)日：1999-09-21

申请号：US539075

申请日：1995-10-04

申请人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

发明人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

IPC分类号： H01L23/049 ,  H01L23/495 ,  H01L25/065 ,  H02M7/00 ,  H05K7/02 ,  H05K7/04

CPC分类号： H01L23/49562 ,  H01L23/049 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/18 ,  H02M7/003 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351

摘要： A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

摘要翻译： 一种半导体器件，其中多个半导体元件被结合到绝缘体衬底上的至少一个电极图案上，所述绝缘体衬底在主表面上形成多个电极图案，所述半导体元件的每个电极电连接到所述电极图案， 绝缘体基板的另一表面被结合到散热基底上，散热基座的上表面覆盖有用于从外部环境切断半导体元件的构件，将绝缘体基板上的电极与电极电连接的端子 设置在切断部件外侧，散热基体的材料的线膨胀系数大于半导体元件的线膨胀系数，小于半导体元件的线膨胀系数的3倍，导热系数 大于100 W / mK，半音 电感元件布置在至少一个电极表面上，并且在至少两个区域中被绝缘体基底上的另一个电极表面分隔。

公开(公告)号：US5641431A

公开(公告)日：1997-06-24

申请号：US408961

申请日：1995-03-23

申请人： Takeshi Kinsho ,  Takaaki Shimizu ,  Tsutomu Ogihara ,  Ryuichi Saito ,  Kazuyuki Asakura ,  Mutsuo Nakashima

发明人： Takeshi Kinsho ,  Takaaki Shimizu ,  Tsutomu Ogihara ,  Ryuichi Saito ,  Kazuyuki Asakura ,  Mutsuo Nakashima

IPC分类号： C07F7/08 ,  C09K19/40 ,  C09K19/30

CPC分类号： C07F7/0896 ,  C07F7/0818 ,  C09K19/406

摘要： A silacyclohexanone compound represented by the following general formula (I). ##STR1## wherein Ar denotes a phenyl group or a tolyl group. R denotes a tolyl group, a linear-chain alkyl group with a carbon number of 2-10, a mono- or di-fluoroalkyl group with a carbon number of 1-10, a branched-chain alkyl group with a carbon number of 3-8 or an alkoxyalkyl group with a carbon number of 2-7. Also, a method of manufacturing silacyclohexane-type liquid crystal compounds represented by the general formula (II) ##STR2## and the general formula (III) ##STR3## which are derived from this compound.

摘要翻译： 由以下通式（I）表示的硅环己酮化合物。 （I）其中Ar表示苯基或甲苯基。 R表示甲苯基，碳数为2-10的直链烷基，碳数为1〜10的单 - 或二 - 氟烷基，碳数为3的支链烷基 -8或碳数为2-7的烷氧基烷基。 另外，由该化合物衍生的由通式（II）表示的硅环己烷型液晶化合物的制造方法（II）和通式（III）的化合物（III）。

公开(公告)号：US5629888A

公开(公告)日：1997-05-13

申请号：US182503

申请日：1994-01-18

申请人： Ryuichi Saito ,  Hidekatsu Onose ,  Yutaka Kobayashi ,  Michio Ohue

发明人： Ryuichi Saito ,  Hidekatsu Onose ,  Yutaka Kobayashi ,  Michio Ohue

IPC分类号： G11C14/00 ,  G11C11/22 ,  G11C11/56 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L27/112 ,  H01L27/115

CPC分类号： H01L27/11502 ,  G11C11/22 ,  G11C11/5657 ,  G11C16/08 ,  G11C8/14 ,  H01L27/10805

摘要： A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.

摘要翻译： 半导体存储器件具有阵列中的多个存储器单元，存储器单元数据可写入其中，并且随后可以读取存储单元。 每个存储单元具有开关元件，一个端子连接到阵列的位线，另一个端子连接到至少一个铁电电容器，以及控制端子连接到字线。 然后可以操作电池以在施加电压时检测铁电电容器的极化变化，这不足以引起铁电电容器的状态改变。 或者，铁电电容器和除铁电电容器之外的电容器连接到开关元件。 在另一替代方案中，多个铁电电容器连接到开关元件，使得不同的数据可写入每个。

公开(公告)号：US5585672A

公开(公告)日：1996-12-17

申请号：US443453

申请日：1995-05-18

申请人： Yoshihiko Koike ,  Ryuichi Saito ,  Sigeki Sekine ,  Yuuji Wakisawa

发明人： Yoshihiko Koike ,  Ryuichi Saito ,  Sigeki Sekine ,  Yuuji Wakisawa

IPC分类号： H01L23/373 ,  H01L25/07 ,  H01L25/18 ,  H01L23/10 ,  H01L23/34

CPC分类号： H01L23/3735 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/351

摘要： A semiconductor module having heat sink plates and an insulating plate laminated under the semiconductor chips, wherein the thickness of the support base plate is set to be 2.5 times in thickness of the insulating plate, which is the maximum thickness among the heat sink plates and the insulating plate laminated in the semiconductor module, so that the thermal fatigue lives of the solder layers are balanced, and the life of the whole semiconductor module can be prolonged.

摘要翻译： 一种半导体模块，其具有层叠在半导体芯片下的散热板和绝缘板，其中，所述支撑基板的厚度设定为所述绝热板的厚度的2.5倍，所述绝缘板是所述散热板和所述散热板之间的最大厚度 绝缘板层叠在半导体模块中，使得焊料层的热疲劳寿命平衡，并且可以延长整个半导体模块的寿命。

公开(公告)号：US5543539A

公开(公告)日：1996-08-06

申请号：US388308

申请日：1995-02-14

申请人： Takaaki Shimizu ,  Takeshi Kinsho ,  Tsutomu Ogihara ,  Tatsushi Kaneko ,  Ryuichi Saito ,  Hideshi Kurihara

发明人： Takaaki Shimizu ,  Takeshi Kinsho ,  Tsutomu Ogihara ,  Tatsushi Kaneko ,  Ryuichi Saito ,  Hideshi Kurihara

IPC分类号： C07F7/08 ,  C07F7/12 ,  C09K19/40

CPC分类号： C09K19/406 ,  C07F7/0818 ,  C07F7/0896 ,  C07F7/12

摘要： There is provided a silacyclohexane compound and method of making same. The silacyclohexane compound has the following formula (1): ##STR1## wherein R denotes a linear-chain alkyl group with a carbon number of 1-10, a mono- or di-fluoroalkyl group with a carbon number of 1-10, a branched-chain alkyl group with a carbon number of 3-8, an alkoxyalkyl group with a carbon number of 2-7, or an alkenyl group with a carbon number of 2-8, ##STR2## denotes a trans-1-sila-1,4-cyclohexylene or a trans-4-sila-1,4-cyclohexylene group having silicon at positions 1 or 4 with substitutional group(s) of H, F, C1 or CH.sub.3 ; n denotes 0 or 1; L.sub.1 and L.sub.2 independently denote H.F, C1, CN or CH.sub.3 ; L.sub.3 denotes F; m denotes O, 1 or 2; and X denotes H, CN, F, C1, CF.sub.3, CC1F.sub.2, CHFC1, OCC1F.sub.2, OCHFC1, OCHF.sub.2, OCF.sub.3, R or OR group.

摘要翻译： 提供硅环己烷化合物及其制备方法。 硅环己烷化合物具有下式（1）：其中R表示碳原子数为1〜10的直链烷基，碳数为1〜1的单 - 或二 - 氟代烷基， 10，碳数为3-8的支链烷基，碳数为2-7的烷氧基烷基或碳数为2-8的烯基，表示反式-1 -S1-1,4-亚环己基或具有位置1或4的具有H，F，C1或CH3取代基的硅的反式-4-硅烷-1,4-亚环己基; n表示0或1; L1和L2独立地表示H.F，C1，CN或CH3; L3表示F; m表示O，1或2; X表示H，CN，F，C1，CF3，CC1F2，CHFC1，OCC1F2，OCHFC1，OCHF2，OCF3，R或OR基。

公开(公告)号：US4956693A

公开(公告)日：1990-09-11

申请号：US28140

申请日：1987-03-19

申请人： Yasuo Sawahata ,  Ryuichi Saito ,  Naohiro Momma

发明人： Yasuo Sawahata ,  Ryuichi Saito ,  Naohiro Momma

IPC分类号： H01L29/73 ,  H01L21/265 ,  H01L21/331 ,  H01L21/74 ,  H01L21/8234 ,  H01L27/06 ,  H01L29/10 ,  H01L29/167 ,  H01L29/78

CPC分类号： H01L21/26506 ,  H01L21/74 ,  H01L29/1079 ,  H01L29/167

摘要： Disclosed is a semiconductor device having a support region, an element-forming region (e.g., an epitaxial layer) and a buried layer between the support region and the element-forming region, with at least one of a MOS element and a bipolar element being formed in the element-forming region. The feature of the present invention resides in that atoms of at least one element selected from oxygen, nitrogen, carbon, argon, neon, krypton and helium is contained in a layer in at least one of the element-forming region and the buried layer, so as to suppress auto-doping of impurities from the buried layer into the element-forming region and suppress swelling of the buried layer.

摘要翻译： 公开了一种在支撑区域和元件形成区域之间具有支撑区域，元件形成区域（例如，外延层）和掩埋层的半导体器件，其中MOS元件和双极元件中的至少一个为 形成在元件形成区域中。 本发明的特征在于，选自氧，氮，碳，氩，氖，氪和氦中的至少一种元素的原子包含在元素形成区域和掩埋层中的至少一个中的层中， 从而抑制杂质从掩埋层自动掺杂到元件形成区域并抑制埋层的溶胀。

公开(公告)号：US4772927A

公开(公告)日：1988-09-20

申请号：US922347

申请日：1986-10-23

申请人： Ryuichi Saito ,  Naohiro Momma

发明人： Ryuichi Saito ,  Naohiro Momma

IPC分类号： H01L21/3215 ,  H01L21/336 ,  H01L27/092 ,  H01L27/11 ,  H01L29/04 ,  H01L29/167 ,  H01L29/786 ,  H01L29/78

CPC分类号： H01L29/66757 ,  H01L21/32155 ,  H01L27/0922 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1108 ,  H01L29/04 ,  H01L29/167 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78684

摘要： The present invention relates to a semiconductor device including a MOS transistor which is formed with a source region, a drain region and a channel region by the use of polycrystalline silicon, and a method of manufacturing the semiconductor device. Ions of carbon, oxygen or/and nitrogen are introduced into a polycrystalline silicon layer over the whole area thereof, and restrain conductive ions in the source and drain regions from diffusing into the channel region.

摘要翻译： 本发明涉及通过使用多晶硅形成有源区域，漏极区域和沟道区域的MOS晶体管的半导体器件以及半导体器件的制造方法。 碳，氧或/和氮的离子在其整个面积上被引入到多晶硅层中，并且抑制源区和漏区中的导电离子扩散到沟道区。

公开(公告)号：US11576084B2

公开(公告)日：2023-02-07

申请号：US17326817

申请日：2021-05-21

申请人： Ryuichi Saito

发明人： Ryuichi Saito

IPC分类号： H04L67/75 ,  H04W28/26 ,  H04B7/155 ,  H04L9/40 ,  H04W84/12

摘要： A resource management system includes a resource management device that manages a usage of a resource, a reservation management device that manages a reservation for the resource, and a communication relay device that communicates with the resource management device. The resource management device receives reservation information transmitted from the reservation management device. The reservation information is information on the reservation for the resource. The resource management device transmits, to the communication relay device, a request for identification information identifying the communication relay device. The resource management device receives the identification information, which is transmitted from the communication relay device in response to the request. The identification information is used to execute an event associated with the reservation information. The resource management device transmits, to an operation display terminal that displays a usage status of the resource, the identification information and a password that is associated with the identification information.

公开(公告)号：US20130168148A1

公开(公告)日：2013-07-04

申请号：US13822446

申请日：2011-11-24

申请人： Toshinobu Kanai ,  Ryuichi Saito ,  Hideki Higashitani

发明人： Toshinobu Kanai ,  Ryuichi Saito ,  Hideki Higashitani

IPC分类号： H05K1/02

CPC分类号： H05K1/0298 ,  H05K1/0269 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4638 ,  H05K2201/0191 ,  H05K2201/0355 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2203/068 ,  Y10T156/10

摘要： A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely.

摘要翻译： 多层布线基板包括双面布线板，堆叠在双面布线板上的绝缘基板，设置在绝缘基板中的通孔中的通孔，绝缘基板的上表面上的最外布线，第一基准 设置在双面布线板上的标记和设置在绝缘基板上的第二基准标记。 第一个基准标记包含双面接线板的布线。 第二个基准标记在通孔中至少包含一个通孔。 提供第一和第二基准标记用于将双面布线板和绝缘基板彼此定位。 这种多层布线板包括精确定位的层。