Abstract:
A method includes coupling two conducting rods between terminals of a battery cell of a battery having several branches coupled in parallel, each branch having several battery cells coupled in series. A force tending to squeeze the rods against each other is applied, with the rods being held apart from each other using an insulating block. At least one operating state signal of the cell is monitored, and the insulating block is removed based on the monitoring, allowing the rods to come into electrical contact and short-circuit the battery cell.
Abstract:
Metallization method for a porous material including deposition of a metallic material in the liquid phase using a solution containing metal ions, the conditions consisting of the solution temperature, the pH of the solution, and the concentration of metal ions in solution being chosen to result in a deposition rate of the metallic material less than or equal to 0.1 nm/min.
Abstract:
The transverse mechanical stress within the active region of a MOS transistor is relaxed by forming an insulating incursion, such as an insulated trench, within the active region of the MOS transistor. The insulated incursion is provided at least in a channel region of the MOS transistor so as to separate the channel region into two parts. The insulated incursion is configured to extend in a direction of a length of the MOS transistor. The insulated incursion may further extend into one or more of a source region or drain region located adjacent the channel region of the MOS transistor.
Abstract:
The invention concerns a circuit comprising: a first transistor (102) having first and second main current nodes, and a gate node adapted to receive a first timing signal (CLK) for causing the first transistor to transition between conducting and non-conducting states; a biasing circuit (108) coupled to a further node of said first transistor; and a control circuit (110) adapted to control said biasing circuit to apply a first control voltage (VCTRL) to said further node to adjust the timing of at least one of said transitions.
Abstract:
A chip provided with through vias wherein the vias are formed of an opening with insulated walls coated with a conductive material and filled with an easily deformable insulating material, elements of connection to another chip being arranged in front of the easily deformable insulating material.
Abstract:
A motion estimation method and device are provided for processing images to be inserted, between a preceding original image and a following original image, into a sequence of images. Each image is divided into pixel blocks associated with motion vectors. For a current block of an image being processed, motion vectors associated with blocks of the image being processed and/or associated with blocks of a processed image are selected. Candidate vectors are generated from selected motion vectors. An error is calculated for each candidate vector. A penalty is determined for a subset of candidate vectors on the basis of the values of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block and/or on the basis of the values of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block.
Abstract:
A device includes a transistor configured for operating in a hybrid mode, an element configured for generating and injecting a current into the substrate of the transistor in the presence of an ESD pulse, and a thyristor triggerable at least by the element.
Abstract:
An integrated circuit chip cooling device includes a network of micropipes. A first pipe portion and a second pipe portion of the network are connected by at least one valve. The valve is formed of a bilayer strip. In response to change in temperature, the shape of the bilayer strip changes to move the valve from a substantially closed position to an open position. In one configuration, the change is irreversible. In another configuration, the change is reversible in response to an opposite change in temperature.
Abstract:
A device and corresponding fabrication method includes a vertical stack having an intermediate layer between a lower region and an upper region. The intermediate layer is extended by a protection layer. The vertical stack has a free lateral face on which the lower region, the upper region and the protection layer are exposed.
Abstract:
A back side illumination photodiode includes a light-receiving back side surface of a semiconductor material substrate. An area of the light-receiving back side surface includes a recess. The recess is filled with a material having an optical index that is lower than an optical index of the semiconductor material substrate. Both the substrate and the filling material are transparent to an operating wavelength of the photodiode. The recess may be formed to have a ring shape.