公开(公告)号：US07459385B1

公开(公告)日：2008-12-02

申请号：US11604608

申请日：2006-11-27

Applicant: Charles W. C. Lin ,  Cheng-Chung Chen ,  Cheng-Lien Chiang

Inventor： Charles W. C. Lin ,  Cheng-Chung Chen ,  Cheng-Lien Chiang

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L23/3128 ,  H01L21/4832 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/056 ,  H01L2224/13008 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a filler, wherein the routing line is adjacent to the bumped terminal, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then grinding the bumped terminal to expose the filler.

Abstract translation: 制造半导体芯片组件的方法包括提供金属基底，布线线，凸起端子和填料，其中布线线与凸起端子相邻，然后机械地将半导体芯片附接到金属基底，布线线 ，凸起端子和填料，然后形成密封剂，然后蚀刻金属基底以暴露凸起的端子，然后研磨凸起的端子以暴露填料。

公开(公告)号：US07425759B1

公开(公告)日：2008-09-16

申请号：US11601892

申请日：2006-11-20

Applicant: Charles W. C. Lin ,  Cheng-Chung Chen

Inventor： Charles W. C. Lin ,  Cheng-Chung Chen

IPC: H01L23/48 ,  H01L23/495 ,  H01L23/12

CPC classification number: H01L23/3128 ,  H01L21/4832 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/056 ,  H01L2224/13008 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line contacts the bumped terminal and the filler and extends laterally beyond the bumped terminal and the filler, and the filler contacts the bumped terminal in a cavity that extends through the bumped terminal.

Abstract translation: 半导体芯片组件包括：半导体芯片，其包括导电焊盘，包括布线线，凸起端子和填充物的导电迹线，电连接布线线和焊盘的连接接头以及密封剂。 路由线路接触凸起端子和填充物，并横向延伸超过凸起的端子和填充物，并且填充物在延伸穿过凸起端子的空腔中与凸起的端子接触。

公开(公告)号：US07319265B1

公开(公告)日：2008-01-15

申请号：US11138812

申请日：2005-05-26

Applicant: Chia-Chung Wang ,  Charles W. C. Lin

Inventor： Chia-Chung Wang ,  Charles W. C. Lin

IPC: H01L23/48 ,  H01L23/495 ,  H01L23/12

CPC classification number: H01L23/3128 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48699 ,  H01L2224/48724 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00012

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The metal pillar includes tapered sidewalls with first and second sidewall portions and a spike, and the first and second sidewall portions are concave arcs that are adjacent to one another at the spike.

Abstract translation: 半导体芯片组件包括：半导体芯片，其包括导电焊盘，包括布线线和金属柱的导电迹线，电连接布线线和焊盘的连接接头以及密封剂。 金属柱包括具有第一和第二侧壁部分和尖峰的锥形侧壁，并且第一和第二侧壁部分是在尖峰处彼此相邻的凹弧。

公开(公告)号：US07071573B1

公开(公告)日：2006-07-04

申请号：US10985579

申请日：2004-11-10

Applicant: Charles W. C. Lin

Inventor： Charles W. C. Lin

IPC: H01L23/48

CPC classification number: H01L23/3128 ,  H01L21/4832 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48511 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/01004

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The chip and the metal pillar are embedded in the encapsulant, the routing line extends laterally beyond the metal pillar towards the chip, and the metal pillar is welded to the routing line.

Abstract translation: 半导体芯片组件包括：半导体芯片，其包括导电焊盘，包括布线线和金属柱的导电迹线，电连接布线线和焊盘的连接接头以及密封剂。 芯片和金属柱嵌入密封剂中，路由线横向延伸超过金属柱朝向芯片，金属柱焊接到路由线。

公开(公告)号：US07071089B1

公开(公告)日：2006-07-04

申请号：US10998338

申请日：2004-11-27

Applicant: Charles W. C. Lin ,  Cheng-Lien Chiang

Inventor： Charles W. C. Lin ,  Cheng-Lien Chiang

IPC: H01L21/44

CPC classification number: H01L24/83 ,  H01L21/4832 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/16 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L24/85 ,  H01L24/90 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05556 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45111 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83121 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83856 ,  H01L2224/85001 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/3651 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00015 ,  H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a metal filler, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the metal filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then grinding the bumped terminal to expose the metal filler.

Abstract translation: 制造半导体芯片组件的方法包括提供金属基底，布线线，凸起端子和金属填料，然后将半导体芯片机械地附接到金属基底，布线线，凸起端子和金属填料，然后 形成密封剂，然后蚀刻金属基底以暴露凸起的端子，然后研磨凸起端子以暴露金属填料。

公开(公告)号：US07067911B1

公开(公告)日：2006-06-27

申请号：US10966816

申请日：2004-10-15

Applicant: Charles W. C. Lin ,  Cheng-Lien Chiang

Inventor： Charles W. C. Lin ,  Cheng-Lien Chiang

IPC: H01L23/02

CPC classification number: H01L23/3128 ,  H01L21/4832 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48511 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/01004

Abstract: A three-dimensional stacked semiconductor package includes first and second semiconductor chip assemblies. The first semiconductor chip assembly includes a first chip, a first conductive trace and a first encapsulant, and the first conductive trace includes a first metal pillar. The second semiconductor chip assembly includes a second chip, a second conductive trace and a second encapsulant, and the second encapsulant includes a second aperture. The first metal pillar extends into the second aperture.

Abstract translation: 三维堆叠半导体封装包括第一和第二半导体芯片组件。 第一半导体芯片组件包括第一芯片，第一导电迹线和第一密封剂，并且第一导电迹线包括第一金属支柱。 第二半导体芯片组件包括第二芯片，第二导电迹线和第二密封剂，并且第二密封剂包括第二孔。 第一金属柱延伸到第二孔中。

公开(公告)号：US06908788B1

公开(公告)日：2005-06-21

申请号：US10639990

申请日：2003-08-13

Applicant: Charles W. C. Lin

Inventor： Charles W. C. Lin

IPC: H01L21/48 ,  H01L23/31 ,  H05K3/40 ,  H01L21/44 ,  H01L21/50

CPC classification number: H01L23/3114 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/82 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/19 ,  H01L2224/24227 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H05K3/4046 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/48 ,  H01L2224/18 ,  H01L2924/00012

Abstract: A method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip, a conductive trace and a metal base, wherein the chip includes a conductive pad, and the conductive trace is disposed between the metal base and the chip, then forming a through-hole that extends through the metal base and exposes the conductive trace and the pad, then forming a connection joint that contacts and electrically connects the conductive trace and the pad in the through-hole, and then etching the metal base, thereby reducing contact area between the metal base and another material. Preferably, the through-hole extends through an insulative adhesive that attaches the conductive trace to the chip, and etching the metal base reduces contact area between the metal base and the connection joint.

Abstract translation: 将导电迹线连接到半导体芯片的方法包括提供半导体芯片，导电迹线和金属基底，其中芯片包括导电焊盘，并且导电迹线设置在金属基底和芯片之间，然后形成 通孔延伸穿过金属基底并暴露导电迹线和焊盘，然后形成接触和电连接通孔中的导电迹线和焊盘的连接接头，然后蚀刻金属基底，从而减少接触 金属基底与另一种材料之间的区域。 优选地，通孔延伸穿过将导电迹线附接到芯片的绝缘粘合剂，并且蚀刻金属基底减小了金属基底和连接接头之间的接触面积。

公开(公告)号：US06876072B1

公开(公告)日：2005-04-05

申请号：US10653723

申请日：2003-09-02

Applicant: Chia-Chung Wang ,  Charles W. C. Lin

Inventor： Chia-Chung Wang ,  Charles W. C. Lin

IPC: H01L21/60 ,  H01L23/498 ,  H01L23/538 ,  H05K3/40 ,  H01L23/02

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/49838 ,  H01L24/18 ,  H01L24/82 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/18 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/82047 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15173 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H05K3/4046 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes first and second opposing major surfaces, wherein the first surface of the chip includes a conductive pad, a substrate that includes first and second opposing major surfaces, wherein the first and second surfaces of the substrate include a conductive terminal and a dielectric base, the conductive terminal extends through the dielectric base to the first and second surfaces of the substrate, a cavity extends from the first surface of the substrate into the substrate, the first surfaces of the chip and the substrate face in a first direction, the second surfaces of the chip and the substrate face in a second direction, and the chip extends into the cavity, a conductive trace in an electrically conductive path between the conductive terminal and the pad, and an adhesive disposed between the conductive trace and the chip, the conductive trace and the substrate, and the chip and the substrate.

Abstract translation: 半导体芯片组件包括包括第一和第二相对主表面的半导体芯片，其中芯片的第一表面包括导电焊盘，包括第一和第二相对主表面的基板，其中基板的第一和第二表面包括 导电端子和电介质基底，所述导电端子延伸穿过所述电介质基底到所述基板的所述第一和第二表面，空腔从所述基板的所述第一表面延伸到所述基板中，所述芯片的所述第一表面和所述基板面 在第一方向上，芯片和基板的第二表面在第二方向上面对，并且芯片延伸到空腔中，在导电端子和焊盘之间的导电路径中的导电迹线以及布置在第二方向之间的粘合剂 导电迹线和芯片，导电迹线和基板，以及芯片和基板。

公开(公告)号：US06544813B1

公开(公告)日：2003-04-08

申请号：US09878649

申请日：2001-06-11

Applicant: Charles W. C. Lin

Inventor： Charles W. C. Lin

IPC: H01L2144

CPC classification number: H01L21/2885 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05647 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A method of manufacturing a semiconductor chip assembly includes providing a semiconductor chip and a conductive metal, wherein the chip includes a conductive pad and the conductive metal includes routing line that is disposed above and overlaps the pad, etching the conductive metal on a side opposite the routing line to expose the routing line, and forming a connection joint that contacts and electrically connects the routing line and the pad.

Abstract translation: 一种制造半导体芯片组件的方法包括提供半导体芯片和导电金属，其中所述芯片包括导电焊盘，并且所述导电金属包括设置在所述焊盘上方并与所述焊盘重叠的布线线，在与所述导电焊盘相对的一侧蚀刻所述导电金属 路由线路以露出路由线路，并且形成一个连接接头，该连接接头与路由线路和接线盘电连接。

公开(公告)号：US06537851B1

公开(公告)日：2003-03-25

申请号：US09917339

申请日：2001-07-27

Applicant: Charles W. C. Lin ,  Cheng-Lien Chiang

Inventor： Charles W. C. Lin ,  Cheng-Lien Chiang

IPC: H01L2144

CPC classification number: H01L24/11 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/78301 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K3/4046 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48

Abstract: A method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip, a conductive trace and a base, wherein the chip includes a conductive pad, the conductive trace includes a bumped terminal, the base includes a recess, the conductive trace is disposed proximate to the pad, the base contacts and covers the conductive trace on a side opposite the chip, the bumped terminal is in the recess, and the conductive trace and the base are different metals, etching the base to expose the conductive trace, and forming a connection joint that contacts and electrically connects the conductive trace and the pad. Preferably, the bumped terminal is outside a periphery of the chip, and an encapsulant provides compressible mechanical support for the bumped terminal.

Abstract translation: 将导电迹线连接到半导体芯片的方法包括提供半导体芯片，导电迹线和基极，其中所述芯片包括导电焊盘，所述导电迹线包括凸起端子，所述基底包括凹部，所述导电迹线是 靠近焊盘设置，基座在与芯片相对的一侧接触并覆盖导电迹线，凸起的端子在凹槽中，导电迹线和基座是不同的金属，蚀刻基底以暴露导电迹线，以及 形成接触和电连接导电迹线和焊盘的连接接头。 优选地，凸起端子在芯片的外围之外，并且密封剂为凸起端子提供可压缩的机械支撑。