公开(公告)号：US20070012976A1

公开(公告)日：2007-01-18

申请号：US11522440

申请日：2006-09-18

申请人： Tetsuo Yaegashi ,  Kouichi Nagai

发明人： Tetsuo Yaegashi ,  Kouichi Nagai

IPC分类号： H01L29/94

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： A seal ring (102) is formed in a manner to surround each ferroelectric capacitor (101). Additionally, a seal ring (103) is formed in a manner to surround a plurality of ferroelectric capacitors (101). Further, a seal ring (104) is formed in a manner to surround all of the ferroelectric capacitors (101) and along a dicing line (110) inside the dicing line (110).

摘要翻译： 以围绕每个铁电电容器（101）的方式形成密封环（102）。 此外，密封环（103）以围绕多个铁电电容器（101）的方式形成。 此外，密封环（104）以围绕所有强电介质电容器（101）并且沿切割线（110）内部的切割线（110）的方式形成。

公开(公告)号：US20060220081A1

公开(公告)日：2006-10-05

申请号：US11189866

申请日：2005-07-27

申请人： Kouichi Nagai ,  Hitoshi Saito ,  Kaoru Sugawara ,  Makoto Takahashi ,  Masahito Kudo ,  Kazuhiro Asai ,  Yukimasa Miyazaki ,  Katsuhiro Sato ,  Kaoru Saigoh

发明人： Kouichi Nagai ,  Hitoshi Saito ,  Kaoru Sugawara ,  Makoto Takahashi ,  Masahito Kudo ,  Kazuhiro Asai ,  Yukimasa Miyazaki ,  Katsuhiro Sato ,  Kaoru Saigoh

IPC分类号： H01L29/76

CPC分类号： H01L27/11507 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76843 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57 ,  H01L28/65 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/05042 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/45099 ,  H01L2224/05552

摘要： After a ferroelectric capacitor is formed, an Al wiring (conductive pad) connected to the ferroelectric capacitor is formed. Then, a silicon oxide film and a silicon nitride film are formed around the Al wiring. Thereafter, as a penetration inhibiting film which inhibits penetration of moisture into the silicon oxide film, an Al2O3 film is formed.

摘要翻译： 在形成铁电电容器之后，形成连接到铁电电容器的Al布线（导电焊盘）。 然后，在Al布线周围形成氧化硅膜和氮化硅膜。 此后，作为抑制水分渗透到氧化硅膜中的渗透抑制膜，形成Al 2 O 3 3膜。

公开(公告)号：US20050127395A1

公开(公告)日：2005-06-16

申请号：US10835310

申请日：2004-04-30

申请人： Kaoru Saigoh ,  Kouichi Nagai

发明人： Kaoru Saigoh ,  Kouichi Nagai

IPC分类号： H01L23/52 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/8246 ,  H01L23/00 ,  H01L23/58 ,  H01L27/10 ,  H01L27/105 ,  H01L27/115 ,  H01L29/423

CPC分类号： H01L27/11502 ,  H01L23/564 ,  H01L23/585 ,  H01L24/49 ,  H01L27/11507 ,  H01L28/40 ,  H01L2224/02166 ,  H01L2224/05554 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device includes a semiconductor substrate, a circuit part formed on and above the semiconductor substrate, a passivation film covering the circuit part, an electrode pad provided outside the circuit part in such a manner that the electrode pad is exposed from the passivation film, and a guard ring pattern provided between the electrode pad and the circuit part such that the guard ring pattern surrounds the circuit part substantially. The guard ring pattern extends from a surface of the semiconductor substrate to the passivation film.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上方的电路部分，覆盖电路部分的钝化膜，以电极焊盘从钝化膜露出的方式设置在电路部分外侧的电极焊盘， 以及设置在电极焊盘和电路部分之间的保护环图案，使得保护环图案基本上包围电路部分。 保护环图形从半导体衬底的表面延伸到钝化膜。

公开(公告)号：US4474859A

公开(公告)日：1984-10-02

申请号：US346019

申请日：1982-02-05

申请人： Hiroyo Oshima ,  Yutaka Kojima ,  Yukio Kobayashi ,  Kouichi Nagai ,  Hajime Tani

发明人： Hiroyo Oshima ,  Yutaka Kojima ,  Yukio Kobayashi ,  Kouichi Nagai ,  Hajime Tani

IPC分类号： B41M5/26 ,  B41M5/395 ,  B41M5/52 ,  B32B27/10 ,  G03F7/00

CPC分类号： B41M5/395 ,  B41M5/5272 ,  Y10S428/913 ,  Y10T428/24893 ,  Y10T428/24901 ,  Y10T428/24934 ,  Y10T428/256 ,  Y10T428/258 ,  Y10T428/259 ,  Y10T428/3179 ,  Y10T428/31797

摘要： Thermal dye-transfer type recording sheet, having a coating layer which is placed on a base sheet, is contacted with a coloring material layer being solid or semisolid state at room temperature and on which a coloring material is transferred selectively by heating, wherein said coating layer comprises at least mixture of saturated polyester and polyvinyl pyrrolidone in a particular ratio. The sheet provides a very clear record with superior light fastness.

摘要翻译： 具有放置在基片上的涂层的热染料转印型记录片材在室温下与固态或半固态的着色材料层接触，并且着色材料通过加热选择性地转移，其中所述涂层 至少以特定比例包含饱和聚酯和聚乙烯吡咯烷酮的混合物。 该表提供了非常清晰的记录，具有出色的耐光性。

公开(公告)号：US08633036B2

公开(公告)日：2014-01-21

申请号：US13412939

申请日：2012-03-06

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： H01L21/00 ,  H01L21/8242 ,  H01L29/76

CPC分类号： H01L27/11509 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： Provided is a ferroelectric memory including a silicon substrate, a transistor formed on the silicon substrate, and a ferroelectric capacitor formed above the transistor. The ferroelectric capacitor includes a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film, and a metal film formed on the upper electrode.

摘要翻译： 提供了一种铁电存储器，其包括硅衬底，形成在硅衬底上的晶体管和形成在晶体管上方的铁电电容器。 铁电电容器包括下电极，形成在下电极上的铁电膜，形成在强电介质膜上的上电极和形成在上电极上的金属膜。

公开(公告)号：US08368132B2

公开(公告)日：2013-02-05

申请号：US12873720

申请日：2010-09-01

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： H01L29/76 ,  H01L21/00 ,  H01L21/8242

CPC分类号： H01L27/11509 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： Provided is a ferroelectric memory including a silicon substrate, a transistor formed on the silicon substrate, and a ferroelectric capacitor formed above the transistor. The ferroelectric capacitor includes a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film, and a metal film formed on the upper electrode.

摘要翻译： 提供了一种铁电存储器，其包括硅衬底，形成在硅衬底上的晶体管和形成在晶体管上方的铁电电容器。 铁电电容器包括下电极，形成在下电极上的铁电膜，形成在强电介质膜上的上电极和形成在上电极上的金属膜。

公开(公告)号：US08343830B2

公开(公告)日：2013-01-01

申请号：US12059754

申请日：2008-03-31

申请人： Hideaki Kikuchi ,  Kouichi Nagai

发明人： Hideaki Kikuchi ,  Kouichi Nagai

IPC分类号： H01L21/8242

CPC分类号： H01L28/40 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76897 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  H01L2924/3011

摘要： There is provided a method for manufacturing a semiconductor device, including, forming a first insulating film on a semiconductor substrate, forming a capacitor on the first insulating film, forming a second insulating film covering the capacitor, forming a metal wiring on the second insulating film, forming a first capacitor protective insulating film covering the metal wiring and the second insulating film, forming an insulating sidewall on a side of the metal wiring, forming a third insulating film on the insulating sidewall, forming a hole by etching the third insulating film under a condition that an etching rate of the insulating sidewall would be lower than that of the third insulating film, and forming a conductive plug inside the hole.

摘要翻译： 提供了一种制造半导体器件的方法，包括在半导体衬底上形成第一绝缘膜，在第一绝缘膜上形成电容器，形成覆盖电容器的第二绝缘膜，在第二绝缘膜上形成金属布线 形成覆盖所述金属布线和所述第二绝缘膜的第一电容器保护绝缘膜，在所述金属布线的侧面上形成绝缘侧壁，在所述绝缘侧壁上形成第三绝缘膜，通过蚀刻所述第三绝缘膜而形成孔 绝缘侧壁的蚀刻速度比第三绝缘膜低的条件，在孔内形成导电塞。

公开(公告)号：US20120228684A1

公开(公告)日：2012-09-13

申请号：US13475325

申请日：2012-05-18

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： H01L27/115

CPC分类号： H01L23/291 ,  H01L21/76834 ,  H01L24/05 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57 ,  H01L2224/02166

摘要： A transistor is formed on a semiconductor substrate, and thereafter a first insulating film is formed. Subsequently, a ferroelectric capacitor is formed on the first insulating film, and then a second insulating film is formed on the ferroelectric capacitor. Thereafter, the upper surface of the second insulating film is planarized. Subsequently, a contact hole which reaches one of impurity regions of the transistor is formed, and thus a plug is formed by embedding a conductor in the contact hole. Thereafter, a hydrogen barrier layer is formed of aluminum oxide or the like. Then, a third insulating film is formed on the hydrogen barrier layer. Subsequently, contact holes which are connected to the ferroelectric capacitor and the plug are formed. Thereafter, a conductor is embedded in the contact holes, and thus interconnections are formed.

摘要翻译： 在半导体衬底上形成晶体管，然后形成第一绝缘膜。 随后，在第一绝缘膜上形成铁电电容器，然后在铁电电容器上形成第二绝缘膜。 此后，第二绝缘膜的上表面被平坦化。 随后，形成到达晶体管的一个杂质区的接触孔，由此在接触孔中嵌入导体形成插头。 此后，由铝氧化物等形成氢阻挡层。 然后，在氢阻挡层上形成第三绝缘膜。 随后，形成与铁电电容器和插头连接的接触孔。 此后，导体嵌入在接触孔中，因此形成互连。

公开(公告)号：US08212300B2

公开(公告)日：2012-07-03

申请号：US12545469

申请日：2009-08-21

申请人： Kouichi Nagai

发明人： Kouichi Nagai

IPC分类号： H01L29/94

CPC分类号： H01L28/60 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： After the formation of a first interlayer insulating, an etching stopper film made of SiON is formed thereon. Subsequently, a contact hole extending from the upper surface of the etching stopper film and reaching a high concentration impurity region is formed, and a first plug is formed by filling W into the contact hole. Next, a ferroelectric capacitor, a second interlayer insulating film, and the like are formed. Thereafter, a contact hole extending from the upper surface of the interlayer insulating film and reaching the first plug is formed. Then, the contact hole is filled with W to form a second plug. With this, even when misalignment occurs, the interlayer insulating film is prevented from being etched.

摘要翻译： 在形成第一层间绝缘之后，在其上形成由SiON制成的蚀刻阻挡膜。 随后，形成从蚀刻阻止膜的上表面延伸并达到高浓度杂质区的接触孔，并且通过将W填充到接触孔中而形成第一插塞。 接下来，形成铁电电容器，第二层间绝缘膜等。 此后，形成从层间绝缘膜的上表面延伸并到达第一插塞的接触孔。 然后，接触孔填充有W以形成第二插头。 由此，即使发生不对准，也可以防止层间绝缘膜被蚀刻。

公开(公告)号：US20120056322A1

公开(公告)日：2012-03-08

申请号：US13293628

申请日：2011-11-10

申请人： Kaoru Saigoh ,  Kouichi Nagai

发明人： Kaoru Saigoh ,  Kouichi Nagai

IPC分类号： H01L23/48 ,  H01L21/8246

CPC分类号： H01L27/11507 ,  H01L23/3157 ,  H01L23/522 ,  H01L23/564 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/11509 ,  H01L28/55 ,  H01L28/65 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05124 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/13007 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13023 ,  H01L2224/13144 ,  H01L2224/45124 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48724 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device is provided having a pad with an improved moisture blocking ability. The semiconductor device has: a circuit portion including a plurality of semiconductor elements formed on a semiconductor substrate; lamination of insulator covering the circuit portion, including a passivation film as an uppermost layer having openings; ferro-electric capacitors formed in the lamination of insulator; wiring structure formed in the lamination of insulator and connected to the semiconductor elements and the ferro-electric capacitors; pad electrodes connected to the wiring structure, formed in the lamination of insulator and exposed in the openings of the passivation film; a conductive pad protection film, including a Pd film, covering each pad electrode via the opening of the passivation film, and extending on the passivation film; and stud bump or bonding wire connected to the pad electrode via the conductive pad protection film.

摘要翻译： 提供了一种具有改善的防潮能力的垫的半导体器件。 半导体器件具有：包括形成在半导体衬底上的多个半导体元件的电路部分; 覆盖电路部分的绝缘体层叠，包括具有开口的最上层的钝化膜; 在绝缘子层压中形成的铁电电容器; 在绝缘体层叠形成并连接到半导体元件和铁电电容器的布线结构; 连接到布线结构的焊盘电极，形成在绝缘体的层叠中并暴露在钝化膜的开口中; 包括Pd膜的导电焊盘保护膜，通过钝化膜的开口覆盖每个焊盘电极，并在钝化膜上延伸; 以及通过导电焊盘保护膜连接到焊盘电极的螺柱凸块或接合线。