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101 条记录 (耗时 0.033 秒)

    Laser excision of laminate chip carriers
    61.
    发明授权
    Laser excision of laminate chip carriers 失效
    激光切割层压芯片载体

    公开(公告)号：US06509546B1

    公开(公告)日：2003-01-21

    申请号：US09526034

    申请日：2000-03-15

    申请人： Frank D. Egitto ,  John S. Kresge

    发明人： Frank D. Egitto ,  John S. Kresge

    IPC分类号： B23K2618

    CPC分类号： H05K3/0038 ,  B23K26/40 ,  B23K2101/34 ,  B23K2103/02 ,  B23K2103/05 ,  B23K2103/08 ,  B23K2103/10 ,  B23K2103/12 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H01L21/78 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/44 ,  H05K2201/09036 ,  H05K2201/0909

    摘要： A method and associated structure for excising laminate chip carriers from a panel that has a thickness less than about 100 mils. A laser beam is focused on a surface of the panel, and the panel is moved relative to the laser beam in a geometric pattern, such that cells of the panel (e.g., chip carriers) are excised from the panel. The laser parameters include a wavelength between about 500 nanometers and about 600 nanometers, a pulse width greater than about 100 nanoseconds and less than about 350 nanoseconds, an average power of at least about 1 watt, a pulse repetition rate between about 5,000 pulses/sec and about 20,000 pulses/sec, and a target diameter (D) between about 2 microns and about 30 microns. The kerf width between adjacent excised cells is between about 2 microns and about 75 microns. The width of an excised cell is at least 5 mm. A displacement between successive pulses of the laser beam is less than about 2D. The panel may comprise a layered structure that includes an organic layer and a metal layer. The laser includes, inter alia, a lasant of Nd:YAG, Nd:YLF, Nd:YAP, or Nd:YVO4. The method of the present invention wastes less panel area by at least a factor of about 13 than does the mechanical excising techniques of the related art.

    摘要翻译： 一种用于从厚度小于约100密耳的面板切割层压芯片载体的方法和相关结构。 激光束聚焦在面板的表面上，并且面板以几何图案相对于激光束移动，使得面板的单元（例如，芯片载体）从面板上被切除。 激光参数包括约500纳米至约600纳米之间的波长，大于约100纳秒且小于约350纳秒的脉冲宽度，至少约1瓦特的平均功率，约5,000脉冲/秒之间的脉冲重复率 和约20,000脉冲/秒，目标直径（D）在约2微米至约30微米之间。 相邻切割细胞之间的切口宽度在约2微米至约75微米之间。 切除的细胞的宽度至少为5mm。 激光束的连续脉冲之间的位移小于约2D。 面板可以包括层状结构，其包括有机层和金属层。 激光器尤其包括Nd：YAG，Nd：YLF，Nd：YAP或Nd：YVO4的农民。 与现有技术的机械切除技术相比，本发明的方法比面板面积少了约13倍。

    METHOD FOR VIA PLATING IN ELECTRONIC PACKAGES CONTAINING FLUOROPOLYMER DIELECTRIC LAYERS
    65.
    发明申请
    METHOD FOR VIA PLATING IN ELECTRONIC PACKAGES CONTAINING FLUOROPOLYMER DIELECTRIC LAYERS 审中-公开
    用于在含有荧光体介质层的电子封装中进行镀覆的方法

    公开(公告)号：US20110260299A1

    公开(公告)日：2011-10-27

    申请号：US12765110

    申请日：2010-04-22

    申请人： Robert D. Edwards ,  Frank D. Egitto ,  Luis J. Matienzo ,  Susan Pitely ,  Daniel C. Van Hart

    发明人： Robert D. Edwards ,  Frank D. Egitto ,  Luis J. Matienzo ,  Susan Pitely ,  Daniel C. Van Hart

    IPC分类号： H01L23/50 ,  H05K3/00 ,  H01L21/441

    CPC分类号： H05K3/0055 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K2201/015 ,  H05K2201/09509 ,  H05K2203/095 ,  H01L2924/00

    摘要： A semiconductor printed circuit board assembly (PCBA) and method for making same for use in electronic packages having a core layer of copper-invar-copper (CIC) with a layer of dielectric substrate placed on the core layer. A second layer of dielectric substrate is placed on the lower surface of the core layer of CIC. The layers are laminated together. Blind vias are laser drilled into the layers of dielectric substrate. The partially completed PCBA is subjected to a reactive ion etch (RIE) plasma as a first step to clean blind vias in the PCBA. After the plasma etch, an acidic etchant liquid solution is used on the blind vias. Pre-plating cleaning of blind vias removes a majority of oxides from the blind vias. Seed copper layers are then applied to the PCBA, followed by a layer of copper plating that can be etched to meet the requirements of the PCBA.

    摘要翻译： 一种半导体印刷电路板组件（PCBA）及其制造方法，用于具有放置在芯层上的介电基片层的具有铜 - 铜 - 铜（CIC）芯层的电子封装。 第二层电介质基片放置在CIC芯层的下表面上。 层叠在一起。 盲孔通过激光钻入电介质基片的层中。 部分完成的PCBA经受反应离子蚀刻（RIE）等离子体作为清洁PCBA中的盲孔的第一步骤。 在等离子体蚀刻之后，在盲孔上使用酸性蚀刻剂液体溶液。 盲孔的电镀前清洁从盲孔中除去大部分氧化物。 然后将种子铜层施加到PCBA，随后是可以被蚀刻以满足PCBA的要求的一层镀铜层。

    High speed interposer
    66.
    发明授权
    High speed interposer 有权
    高速插入器

    公开(公告)号：US07629541B2

    公开(公告)日：2009-12-08

    申请号：US11454896

    申请日：2006-06-19

    申请人： David V. Caletka ,  Frank D. Egitto

    发明人： David V. Caletka ,  Frank D. Egitto

    IPC分类号： H05K1/16

    CPC分类号： H05K1/0219 ,  H01R12/523 ,  H01R13/2414 ,  H05K1/113 ,  H05K3/4046 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0959 ,  H05K2201/09809 ,  H05K2201/10303 ,  H05K2201/10378 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： A high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.

    摘要翻译： 高速插入器，其包括具有交替取向的介电层和导电层的基板，其形成基板，从基板的一个相对表面延伸到第二相对表面的开口，定位在开口内并且还从表面延伸到表面的导电构件 并且在一些实施例中超越）以及基本上围绕导电构件定位的多个屏蔽构件，从而在高频信号通过导电构件期间提供屏蔽。

    Method of making high speed interposer
    67.
    发明申请
    Method of making high speed interposer 审中-公开
    制作高速内插器的方法

    公开(公告)号：US20080120835A1

    公开(公告)日：2008-05-29

    申请号：US12010469

    申请日：2008-01-25

    申请人： David V. Caletka ,  Frank D. Egitto

    发明人： David V. Caletka ,  Frank D. Egitto

    IPC分类号： H05K3/42 ,  H05K3/10

    CPC分类号： H05K1/0219 ,  H01R12/523 ,  H01R13/2414 ,  H05K1/113 ,  H05K3/4046 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0959 ,  H05K2201/09809 ,  H05K2201/10303 ,  H05K2201/10378 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： A method of making a high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.

    摘要翻译： 一种制造高速插入器的方法，其包括具有交替取向的介电层和导电层的基板，其形成基板，从基板的一个相对表面延伸到第二相对表面的开口，位于开口内的导电构件也从 以及在高频信号通过导电构件的过程中基本上围绕导电构件定位的多个屏蔽构件，从而提供屏蔽。

    High speed interposer
    68.
    发明申请
    High speed interposer 有权
    高速插入器

    公开(公告)号：US20070289773A1

    公开(公告)日：2007-12-20

    申请号：US11454896

    申请日：2006-06-19

    申请人： David V. Caletka ,  Frank D. Egitto

    发明人： David V. Caletka ,  Frank D. Egitto

    IPC分类号： H05K1/11 ,  H01R12/04

    CPC分类号： H05K1/0219 ,  H01R12/523 ,  H01R13/2414 ,  H05K1/113 ,  H05K3/4046 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0959 ,  H05K2201/09809 ,  H05K2201/10303 ,  H05K2201/10378 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： A high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.

    摘要翻译： 高速插入器，其包括具有交替取向的介电层和导电层的基板，其形成基板，从基板的一个相对表面延伸到第二相对表面的开口，定位在开口内并且还从表面延伸到表面的导电构件 并且在一些实施例中超越）以及基本上围绕导电构件定位的多个屏蔽构件，从而在高频信号通过导电构件期间提供屏蔽。