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117 条记录 (耗时 0.037 秒)

    INSTANTANEOUS DECODER REFRESH FRAME ALIGNED MULTI-BITRATE TRANSCODER OUTPUT
    71.
    发明申请
    INSTANTANEOUS DECODER REFRESH FRAME ALIGNED MULTI-BITRATE TRANSCODER OUTPUT 有权
    瞬态解码器刷新帧对齐多位转换器输出

    公开(公告)号：US20130044803A1

    公开(公告)日：2013-02-21

    申请号：US13209490

    申请日：2011-08-15

    申请人： Yuval Fisher ,  Hain-Ching Liu ,  Dan R. Hunt ,  Shankar Venkataraman ,  Hsiang-Yun Alex Huang

    发明人： Yuval Fisher ,  Hain-Ching Liu ,  Dan R. Hunt ,  Shankar Venkataraman ,  Hsiang-Yun Alex Huang

    IPC分类号： H04N7/40 ,  G06F15/16

    CPC分类号： H04N21/2343 ,  H04N21/2402 ,  H04N21/242 ,  H04N21/6125 ,  H04N21/8455 ,  H04N21/8456

    摘要： A video stream is transcoded to provide a plurality of primary profiles. Individual frames of the video stream have a Presentation Time Stamp (PTS). A PTS is used as a token to identify particular frames to be encoded as Instantaneous Decoder Refresh (IDR) frames in each profile. An IDR frame period is determined, indicative of a desired number of video frames between two IDR frames. An IDR frame is inserted into each profile every IDR frame period. The IDR frames of each profile are aligned with the same IDR frames of the other profiles. The PTS of each IDR frame in each profile is monitored. Upon determining that a PTS is out of alignment, the next PTS of the affected profile is aligned with the corresponding PTS of remaining profiles. Backup transcoders produce backup profiles that are maintained in alignment with each other and with the primary profiles.

    摘要翻译： 视频流被转码以提供多个主要简档。 视频流的各个帧具有呈现时间戳（PTS）。 使用PTS作为令牌来识别要编码为每个配置文件中的瞬时解码器刷新（IDR）帧的特定帧。 确定IDR帧周期，表示两个IDR帧之间的期望数量的视频帧。 每个IDR帧周期将IDR帧插入每个配置文件。 每个配置文件的IDR帧与其他配置文件的相同IDR帧对齐。 监视每个配置文件中每个IDR帧的PTS。 在确定PTS不对齐时，受影响配置文件的下一个PTS与剩余配置文件的相应PTS对齐。 备份代码转换器产生保持彼此对齐和与主配置文件对齐的备份配置文件。

    Method for doping non-planar transistors
    72.
    发明授权
    Method for doping non-planar transistors 失效
    掺杂非平面晶体管的方法

    公开(公告)号：US08114761B2

    公开(公告)日：2012-02-14

    申请号：US12843726

    申请日：2010-07-26

    申请人： Tushar V. Mandrekar ,  Shankar Venkataraman ,  Zhong Qiang Hua ,  Manuel A. Hernandez

    发明人： Tushar V. Mandrekar ,  Shankar Venkataraman ,  Zhong Qiang Hua ,  Manuel A. Hernandez

    IPC分类号： H01L21/00

    CPC分类号： H01L21/2256 ,  H01L29/66803

    摘要： Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.

    摘要翻译： 公开了通过在非平面结构上形成共形掺杂的硅玻璃层来掺杂非平面结构的方法。 将其上形成有非平面结构的基板放置在化学气相沉积处理室中以沉积掺杂玻璃（例如BSG或PSG）的共形SACVD层。 然后将衬底暴露于RTP或激光退火步骤以将掺杂剂扩散到非平面结构中，然后通过蚀刻去除掺杂的玻璃层。

    POST-ASH SIDEWALL HEALING
    73.
    发明申请
    POST-ASH SIDEWALL HEALING 审中-公开
    后腰围护理

    公开(公告)号：US20120009796A1

    公开(公告)日：2012-01-12

    申请号：US12909167

    申请日：2010-10-21

    申请人： Zhenjiang Cui ,  Anchuan Wang ,  Mehul Naik ,  Nitin Ingle ,  Young Lee ,  Shankar Venkataraman

    发明人： Zhenjiang Cui ,  Anchuan Wang ,  Mehul Naik ,  Nitin Ingle ,  Young Lee ,  Shankar Venkataraman

    IPC分类号： H01L21/3065

    CPC分类号： H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76814

    摘要： Methods of decreasing the effective dielectric constant present between two conducting components of an integrated circuit are described. The methods involve the use of a gas phase etch which is selective towards the oxygen-rich portion of the low-K dielectric layer. The etch rate attenuates as the etch process passes through the relatively high-K oxygen-rich portion and reaches the low-K portion. The etch process may be easily timed since the gas phase etch process does not readily remove the desirable low-K portion.

    摘要翻译： 描述了降低集成电路的两个导电部件之间存在的有效介电常数的方法。 该方法包括使用对低K电介质层的富氧部分具有选择性的气相蚀刻。 当蚀刻工艺通过较高K富氧部分并达到低K部分时，蚀刻速率衰减。 由于气相蚀刻工艺不容易除去所需的低K部分，所以蚀刻工艺可以容易地定时。

    Stress management for tensile films
    74.
    发明授权
    Stress management for tensile films 有权
    拉伸薄膜的应力管理

    公开(公告)号：US07935643B2

    公开(公告)日：2011-05-03

    申请号：US12604332

    申请日：2009-10-22

    申请人： Jingmei Liang ,  Anjana M. Patel ,  Nitin K. Ingle ,  Shankar Venkataraman

    发明人： Jingmei Liang ,  Anjana M. Patel ,  Nitin K. Ingle ,  Shankar Venkataraman

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/31608 ,  C23C16/401 ,  C23C16/452 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02326 ,  H01L21/02362 ,  H01L21/3185 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76837

    摘要： The formation of a gap-filling silicon oxide layer with reduced tendency towards cracking is described. The deposition involves the formation of a flowable silicon-containing layer which facilitates the filling of trenches. Subsequent processing at high substrate temperature causes less cracking in the dielectric film than flowable films formed in accordance with methods in the prior art. A compressive liner layer deposited prior to the formation of the gap-filling silicon oxide layer is described and reduces the tendency for the subsequently deposited film to crack. A compressive capping layer deposited after a flowable silicon-containing layer has also been determined to reduce cracking. Compressive liner layers and compressive capping layers can be used alone or in combination to reduce and often eliminate cracking. Compressive capping layers in disclosed embodiments have additionally been determined to enable an underlying layer of silicon nitride to be transformed into a silicon oxide layer.

    摘要翻译： 描述了具有降低的开裂倾向的间隙填充氧化硅层的形成。 沉积涉及形成有助于填充沟槽的可流动的含硅层。 在基板温度高的情况下，与根据现有技术中的方法形成的可流动膜相比，电介质膜中的裂纹少。 描述在形成间隙填充氧化硅层之前沉积的压缩衬垫层，并且降低随后沉积的膜破裂的倾向。 在可流动的含硅层之后沉积的压缩覆盖层也被确定以减少开裂。 压缩衬里层和压缩覆盖层可以单独使用或组合使用以减少并经常消除开裂。 已经确定了所公开的实施例中的压缩覆盖层，以使氮化硅的下层能够转变成氧化硅层。

    Deposition-plasma cure cycle process to enhance film quality of silicon dioxide
    76.
    发明授权
    Deposition-plasma cure cycle process to enhance film quality of silicon dioxide 有权
    沉积 - 等离子体固化循环过程，以提高二氧化硅的膜质量

    公开(公告)号：US07902080B2

    公开(公告)日：2011-03-08

    申请号：US11753968

    申请日：2007-05-25

    申请人： Xiaolin Chen ,  Srinivas D. Nemani ,  Shankar Venkataraman

    发明人： Xiaolin Chen ,  Srinivas D. Nemani ,  Shankar Venkataraman

    IPC分类号： H01L21/302

    CPC分类号： C23C16/045 ,  C23C16/402 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/31633

    摘要： Methods of filling a gap on a substrate with silicon oxide are described. The methods may include the steps of introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber, reacting the precursors to form a first silicon oxide layer in the gap on the substrate, and etching the first silicon oxide layer to reduce the carbon content in the layer. The methods may also include forming a second silicon oxide layer on the first layer, and etching the second layer to reduce the carbon content in the second layer. The silicon oxide layers are annealed after the gap is filled.

    摘要翻译： 描述了用氧化硅填充衬底上的间隙的方法。 所述方法可以包括以下步骤：将有机硅前体和氧前体引入沉积室，使前体反应以在衬底上的间隙中形成第一氧化硅层，并蚀刻第一氧化硅层以还原碳 内容在图层中。 所述方法还可以包括在第一层上形成第二氧化硅层，并蚀刻第二层以降低第二层中的碳含量。 在填充间隙之后对氧化硅层进行退火。

    PROCESS SEQUENCE FOR FORMATION OF PATTERNED HARD MASK FILM (RFP) WITHOUT NEED FOR PHOTORESIST OR DRY ETCH
    77.
    发明申请
    PROCESS SEQUENCE FOR FORMATION OF PATTERNED HARD MASK FILM (RFP) WITHOUT NEED FOR PHOTORESIST OR DRY ETCH 有权
    用于形成图形硬片（RFP）的过程序列，不需要用于光刻胶或干蚀刻

    公开(公告)号：US20090208880A1

    公开(公告)日：2009-08-20

    申请号：US12034000

    申请日：2008-02-20

    申请人： SRINIVAS D. NEMANI ,  Shankar Venkataraman ,  Ellie Y. Yieh

    发明人： SRINIVAS D. NEMANI ,  Shankar Venkataraman ,  Ellie Y. Yieh

    IPC分类号： G03F7/00 ,  C23F1/00

    CPC分类号： G03F7/0757 ,  H01L21/02164 ,  H01L21/3086 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31612 ,  H01L21/6719 ,  H01L21/67207

    摘要： Method and systems for patterning a hardmask film using ultraviolet light is disclosed according to one embodiment of the invention. Embodiments of the present invention alleviate the processing problem of depositing and etching photoresist in order to produce a hardmask pattern. A hardmask layer, such as, silicon oxide, is first deposited on a substrate within a deposition chamber. In some cases, the hardmask layer is baked or annealed following deposition. After which, portions of the hardmask layer are exposed with ultraviolet light. The ultraviolet light produces a pattern of exposed and unexposed portions of hardmask material. Following the exposure, an etching process, such as a wet etch, may occur that removes the unexposed portions of the hardmask. Following the etch, the hardmask may be annealed, baked or subjected to a plasma treatment.

    摘要翻译： 根据本发明的一个实施方案公开了使用紫外光图案化硬掩膜的方法和系统。 本发明的实施例减轻了沉积和蚀刻光刻胶的处理问题，以产生硬掩模图案。 首先将诸如氧化硅的硬掩模层沉积在沉积室内的衬底上。 在一些情况下，硬掩模层在沉积之后被烘烤或退火。 之后，硬掩模层的一部分用紫外线照射。 紫外光产生硬掩模材料的暴露和未曝光部分的图案。 曝光后，可能会发生腐蚀过程，例如湿蚀刻，从而去除硬掩模的未曝光部分。 在蚀刻之后，可以对硬掩模进行退火，烘烤或进行等离子体处理。