公开(公告)号：US5512334A

公开(公告)日：1996-04-30

申请号：US301285

申请日：1994-09-06

Applicant: Rainer Leuschner ,  Recai Sezi ,  Michael Sebald

Inventor： Rainer Leuschner ,  Recai Sezi ,  Michael Sebald

IPC: G03F7/039 ,  G03F7/038 ,  G03F7/09 ,  G03F7/095 ,  G03F7/11 ,  G03F7/26 ,  H01L21/027 ,  B05D3/06

CPC classification number: G03F7/095 ,  G03F7/038 ,  G03F7/094

Abstract: A method for producing a bottom resist for a two-layer O.sub.2 /Reactive Ion Etching system which fulfills all the requirements set for such a resist. A varnish layer of a base polymer containing an aromatic, a cross-linking agent and an acid-forming agent is applied to a substrate. The varnish layer is flood-exposed to release a strong acid from the acid-forming agent in the surface region of the layer. This is followed by thermal curing.

Abstract translation: 一种二层O2 /反应离子蚀刻系统的底层抗蚀剂的制造方法，其满足对这种抗蚀剂的所有要求。 将含有芳族，交联剂和成酸剂的基础聚合物的清漆层施加到基材上。 清漆层被暴露以从该层的表面区域中的酸形成剂释放强酸。 然后进行热固化。

公开(公告)号：US5384220A

公开(公告)日：1995-01-24

申请号：US811706

申请日：1991-12-20

Applicant: Recai Sezi ,  Horst Borndoerfer ,  Rainer Leuschner ,  Michael Sebald ,  Siegfried Birkle ,  Hellmut Ahne

Inventor： Recai Sezi ,  Horst Borndoerfer ,  Rainer Leuschner ,  Michael Sebald ,  Siegfried Birkle ,  Hellmut Ahne

IPC: G03F7/004 ,  G03F7/027 ,  G03F7/029 ,  G03F7/039 ,  G03F7/26 ,  G03F7/36 ,  G03F7/38 ,  H01L21/027

CPC classification number: G03F7/265 ,  Y10S430/147 ,  Y10S430/167

Abstract: A method for the photolithographic production of structures in the submicron range including the following steps:- a photoresist layer comprising a polymer containing carboxylic acid anhydride and carboxylic acid tert. butyl ester groups, a photoinitiator which releases an acid when exposed, and a suitable solvent is applied to a substrate;- the photoresist layer is dried;- the photoresist layer is exposed in an imagewise manner;- the exposed photoresist layer is subjected to temperature treatment;- the photoresist layer treated in this way is subjected to liquid silylation;- the silylated photoresist layer is dry-developed in an anisotropic oxygen plasma;where the temperature treatment is handled in such a way that the photoresist becomes hydrophilic in the exposed areas.

Abstract translation: 一种用于在亚微米范围内光刻生产结构的方法，包括以下步骤： - 包含含有羧酸酐和羧酸叔丁酯的聚合物的光致抗蚀剂层。 丁基酯基，暴露时释放酸的光引发剂和合适的溶剂施加到基材上; - 将光致抗蚀剂层干燥; - 以成像方式曝光光致抗蚀剂层; 曝光的光致抗蚀剂层进行温度处理; - 以这种方式处理的光致抗蚀剂层进行液体甲硅烷基化; - 甲硅烷基化的光致抗蚀剂层在各向异性的氧等离子体中干式显影; 其中以这样的方式处理温度处理，使得光致抗蚀剂在曝光区域中变得亲水。

公开(公告)号：US5368901A

公开(公告)日：1994-11-29

申请号：US945766

申请日：1992-09-16

Applicant: Rainer Leuschner ,  Recai Sezi ,  Michael Sebald

Inventor： Rainer Leuschner ,  Recai Sezi ,  Michael Sebald

IPC: G03F7/039 ,  G03F7/038 ,  G03F7/09 ,  G03F7/095 ,  G03F7/11 ,  G03F7/26 ,  H01L21/027 ,  B05D2/06

CPC classification number: G03F7/095 ,  G03F7/038 ,  G03F7/094

Abstract: A method for producing a bottom resist for a two-layer O.sub.2 /Reactive Ion Etching system which fulfills all the requirements set for such a resist. A varnish layer of a base polymer containing an aromatic, a cross-linking agent and an acid-forming agent is applied to a substrate. The varnish layer is flood-exposed to release a strong acid from the acid-forming agent in the surface region of the layer. This is followed by thermal curing.

Abstract translation: 一种二层O2 /反应离子蚀刻系统的底层抗蚀剂的制造方法，其满足对这种抗蚀剂的所有要求。 将含有芳族，交联剂和成酸剂的基础聚合物的清漆层施加到基材上。 清漆层被暴露以从该层的表面区域中的酸形成剂释放强酸。 然后进行热固化。

公开(公告)号：US5173393A

公开(公告)日：1992-12-22

申请号：US513570

申请日：1990-04-24

Applicant: Recai Sezi ,  Michael Sebald ,  Rainer Leuschner ,  Siegfried Birkle ,  Hellmut Ahne

Inventor： Recai Sezi ,  Michael Sebald ,  Rainer Leuschner ,  Siegfried Birkle ,  Hellmut Ahne

IPC: G03F7/038 ,  G03F7/26 ,  G03F7/40 ,  H01L21/027

CPC classification number: G03F7/40

Abstract: A photoresist system that is easily structurable and, in particular, is suitable for the deep ultraviolet range is provided. An increased etching resistance to a halogen-containing plasma is produced in a lithographically generated photoresist structure by treatment with a reactant. The reactant comprises predominantly aromatic structures and includes reactive groups that are suitable for chemical reaction with further reactable groups of the photoresist. In an embodiment, the photoresist includes anhydride or epoxy groups that are suitable for structuring with deep ultraviolet light.

Abstract translation: 提供易于结构化并且特别适用于深紫外范围的光致抗蚀剂体系。 通过用反应物处理在光刻产生的光致抗蚀剂结构中产生对含卤素等离子体的耐腐蚀性提高。 反应物主要包含芳族结构，并且包括适于与光致抗蚀剂的其它可反应基团进行化学反应的反应性基团。 在一个实施方案中，光致抗蚀剂包括适于用深紫外光结构化的酸酐或环氧基团。

公开(公告)号：US08741690B2

公开(公告)日：2014-06-03

申请号：US13453787

申请日：2012-04-23

Applicant: Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

Inventor： Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

IPC: H01L21/00

CPC classification number: H01L21/568 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/82

Abstract: A method of manufacturing a semiconductor package includes embedding a semiconductor chip in an encapsulant. First contact pads are formed on a first main face of the semiconductor package and second contact pads are formed on a second main face of the semiconductor package opposite the first main face. A diameter d in micrometers of an exposed contact pad area of the second contact pads satisfies d≧(8/25)x+142 μm, where x is a pitch of the second contact pads in micrometers.

Abstract translation: 制造半导体封装的方法包括将半导体芯片嵌入密封剂中。 第一接触焊盘形成在半导体封装的第一主面上，并且第二接触焊盘形成在与第一主面相对的半导体封装的第二主面上。 第二接触焊盘的暴露的接触焊盘区域的直径d（以微米为单位）满足d≥（8/25）×+142μm，其中x是以微米为单位的第二接触焊盘的间距。

公开(公告)号：US20110024918A1

公开(公告)日：2011-02-03

申请号：US12904561

申请日：2010-10-14

Applicant: Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

Inventor： Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

IPC: H01L23/48

CPC classification number: H01L24/96 ,  H01L21/568 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/81

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides a method including a first substrate having a first surface and an opposing second surface. The first substrate includes an array of first connection elements on the first surface of the first substrate. A second substrate has a first surface and an opposing second surface. The second substrate includes an array of second connection elements on the first surface of the second substrate. The first connection elements is attached to the second connection elements; and is thinning at least one of the first substrate and the second substrate after the attachment of the first connection elements to the second connection elements.

Abstract translation: 公开了堆叠的半导体芯片。 一个实施例提供了包括具有第一表面和相对的第二表面的第一基底的方法。 第一衬底包括在第一衬底的第一表面上的第一连接元件的阵列。 第二基板具有第一表面和相对的第二表面。 第二衬底包括在第二衬底的第一表面上的第二连接元件的阵列。 第一连接元件附接到第二连接元件; 并且在将第一连接元件附接到第二连接元件之后使第一基板和第二基板中的至少一个变薄。

公开(公告)号：US07867878B2

公开(公告)日：2011-01-11

申请号：US11859329

申请日：2007-09-21

Applicant: Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

Inventor： Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

IPC: H01L21/30

CPC classification number: H01L24/96 ,  H01L21/568 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/81

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides a method including a first substrate having a first surface and an opposing second surface. The first substrate includes an array of first connection elements on the first surface of the first substrate. A second substrate has a first surface and an opposing second surface. The second substrate includes an array of second connection elements on the first surface of the second substrate. The first connection elements is attached to the second connection elements; and is thinning at least one of the first substrate and the second substrate after the attachment of the first connection elements to the second connection elements.

公开(公告)号：US20090014871A1

公开(公告)日：2009-01-15

申请号：US11777694

申请日：2007-07-13

Applicant: Thorsten Meyer ,  Markus Brunnbauer ,  Recai Sezi

Inventor： Thorsten Meyer ,  Markus Brunnbauer ,  Recai Sezi

IPC: H01L23/488 ,  H01L21/44

CPC classification number: H01L24/12 ,  B81B2207/07 ,  B81B2207/097 ,  B81C1/00301 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/013

Abstract: A semiconductor device is disclosed. One embodiment includes a semiconductor substrate and at least two insulating elements located above the semiconductor substrate or above a mold compound embedding the semiconductor substrate. The at least two insulating elements have a first face facing the semiconductor substrate or the mold compound and a second face facing away from the semiconductor substrate or the mold compound. A conductive element for each of the at least two insulating elements extends from the first face of the insulating element to the second face of the insulating element.

Abstract translation: 公开了一种半导体器件。 一个实施例包括半导体衬底和位于半导体衬底之上或在嵌入半导体衬底的模具化合物上方的至少两个绝缘元件。 所述至少两个绝缘元件具有面对半导体衬底或模具化合物的第一面和背离半导体衬底或模具化合物的第二面。 用于至少两个绝缘元件中的每一个的导电元件从绝缘元件的第一面延伸到绝缘元件的第二面。

公开(公告)号：US20080142774A1

公开(公告)日：2008-06-19

申请号：US11572950

申请日：2005-07-20

Applicant: Andreas Walter ,  Thomas Weitz ,  Reimund Engl ,  Recai Sezi ,  Anna Maltenberger ,  Joerg Schumann

Inventor： Andreas Walter ,  Thomas Weitz ,  Reimund Engl ,  Recai Sezi ,  Anna Maltenberger ,  Joerg Schumann

IPC: H01L45/00 ,  H01L51/40 ,  H01L51/30

CPC classification number: H01L27/285 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016 ,  H01L51/0035 ,  H01L51/0051 ,  H01L51/0074 ,  H01L51/0591 ,  H01L51/0595

Abstract: An integrated circuit having resistive memory is disclosed. In one embodiment, the memory includes novel memory cells which have two electrodes and a layer arranged in between and including an active material which contains [1,2]dithiolo[4,3-[c]-1,2-dithiol-3,6-dithione, (2,4,7-trinitro-9-fluorenylidene)malonodinitrile and a polymer are disclosed. In one embodiment, a process for the production of the cells according to the invention is provided, as well as the novel use of a composition which can be used as active material for the memory cells.

Abstract translation: 公开了一种具有电阻性存储器的集成电路。 在一个实施例中，存储器包括新颖的存储单元，其具有两个电极和布置在其中并且包括含有[1,2]二硫基[4,3-c] -1,2-二硫醇-3的活性材料的层， （2,4,7-三硝基-9-亚芴基）丙二腈和聚合物。 在一个实施方案中，提供了根据本发明的细胞的制备方法，以及可用作记忆细胞的活性物质的组合物的新用途。

公开(公告)号：US07273821B2

公开(公告)日：2007-09-25

申请号：US10098845

申请日：2002-03-14

Applicant: Recai Sezi

Inventor： Recai Sezi

IPC: H01L21/469 ,  H01L21/31

CPC classification number: C08L71/02 ,  B05D3/107 ,  B05D5/00 ,  C08J9/26 ,  C08J2201/042 ,  C08K3/36 ,  C08L71/00 ,  C09D7/61 ,  H01L21/02118 ,  H01L21/02203 ,  H01L21/31695 ,  H05K3/381

Abstract: The present invention relates to a process for producing a porous layer adhering to a substrate, which comprises the steps: a. preparation of a composition comprising an organic polymer constituent and an inorganic-organic constituent and/or an inorganic constituent, b. application of this composition to a substrate and formation of a layer on the substrate, and c. removal of the inorganic-organic constituent and/or the inorganic constituent from the layer to form a porous layer adhering to the substrate.

Abstract translation: 本发明涉及一种生产附着在基底上的多孔层的方法，该方法包括以下步骤：a。 制备包含有机聚合物成分和无机 - 有机成分和/或无机成分的组合物，b。 将该组合物施用于基材和在基材上形成层，以及c。 从层中除去无机 - 有机组分和/或无机组分以形成粘附到衬底的多孔层。