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公开(公告)号：US20180069007A1
公开(公告)日：2018-03-08
申请号：US15797208
申请日：2017-10-30
IPC分类号： H01L27/092 , H01L29/78 , H01L21/02 , H01L29/66 , H01L29/417 , H01L29/08 , H01L27/12 , H01L21/84 , H01L21/8238 , H01L21/311
CPC分类号： H01L21/823864 , H01L21/0257 , H01L21/31111 , H01L21/31116 , H01L21/823814 , H01L21/823821 , H01L21/823828 , H01L21/845 , H01L27/092 , H01L27/0924 , H01L27/1203 , H01L27/1211 , H01L29/0847 , H01L29/41783 , H01L29/4983 , H01L29/517 , H01L29/6653 , H01L29/66628 , H01L29/66636 , H01L29/78
摘要： Semiconductor structures with different devices each having spacers of equal thickness and methods of manufacture are disclosed. The method includes forming a first gate stack and a second gate stack. The method further includes forming sidewall spacers of equal thickness for both the first gate stack and the second gate stack by depositing a liner material over spacer material on sidewalls of the first gate stack and the second gate stack and within a space formed between the spacer material and source and drain regions of the first gate stack.
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公开(公告)号：US20180061981A1
公开(公告)日：2018-03-01
申请号：US15669322
申请日：2017-08-04
申请人： Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
发明人： Fei ZHOU
CPC分类号： H01L29/7816 , H01L21/823821 , H01L21/845 , H01L27/0886 , H01L27/0924 , H01L29/0653 , H01L29/1095 , H01L29/66659 , H01L29/66681 , H01L29/66689 , H01L29/66795 , H01L29/7835 , H01L29/785
摘要： The present disclosure provides a laterally diffused metal-oxide-semiconductor (LDMOS) device. The LDMOS device includes a plurality of fin structures formed on a substrate including a first device region, a second device region, and an isolation region sandwiched between the two regions. An opening is formed in the fin structures in the isolation region. The LDMOS device further includes an isolation layer formed in the opening and covering the sidewall of the opening formed by a portion of each fin structure in the first device region. The isolation layer exposes top surfaces of the plurality of fin structures. Moreover, the LDMOS device also includes a gate structure formed across each fin structure in the first device region. The gate structure covers a portion of the sidewall and the top surfaces of the fin structure formed in the first device region and also covers the top surface of the isolation layer.
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公开(公告)号：US09899264B2
公开(公告)日：2018-02-20
申请号：US15198730
申请日：2016-06-30
发明人： Ruqiang Bao , Dechao Guo , Vijay Narayanan
IPC分类号： H01L21/82 , H01L27/08 , H01L21/8234 , H01L27/088 , H01L29/49
CPC分类号： H01L27/0922 , H01L21/82345 , H01L21/823487 , H01L21/823821 , H01L21/823828 , H01L21/845 , H01L27/0886 , H01L27/0924 , H01L27/1211 , H01L29/4925 , H01L29/4966
摘要： A semiconductor device comprises a first semiconductor fin arranged on a substrate, the first semiconductor fin having a first channel region, and a second semiconductor fin arranged on the substrate, the second semiconductor fin having a second channel region. A first gate stack is arranged on the first channel region. The first gate stack comprises a first metal layer arranged on the first channel region, a work function metal layer arranged on the first metal layer, and a work function metal arranged on the work function metal layer. A second gate stack is arranged on the second channel region, the second gate stack comprising a work function metal arranged on the second channel region.
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公开(公告)号：US09892979B2
公开(公告)日：2018-02-13
申请号：US14744198
申请日：2015-06-19
申请人： GLOBALFOUNDRIES INC.
CPC分类号： H01L22/12 , H01L21/845 , H01L22/30 , H01L29/66795
摘要： A semiconductor device or article includes a substrate including a feature and divided into a feature region in which the feature is formed and a pad region in which the substrate is substantially unmodified, and a layer of interest applied over the substrate and feature. The pad and feature regions are irradiated and resulting photoelectron intensities are recorded and used to determine a thickness of the layer of interest over the feature. In addition, if the layer of interest includes an atomic species distinct from any in the substrate, an actual dose of the atomic species can be determined.
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75.发明申请公开(公告)号：US20180040618A1
公开(公告)日：2018-02-08
申请号：US15789488
申请日：2017-10-20
发明人： Tung Ying Lee , Wen-Huei Guo , Chih-Hao Chang , Shou-Zen Chang
IPC分类号： H01L27/088 , H01L21/84 , H01L21/8234 , H01L27/06 , H01L29/06 , H01L29/66
CPC分类号： H01L27/0886 , H01L21/823431 , H01L21/845 , H01L27/0629 , H01L29/0642 , H01L29/66636 , H01L29/6681
摘要： Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.
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公开(公告)号：US09887198B2
公开(公告)日：2018-02-06
申请号：US15272874
申请日：2016-09-22
IPC分类号： H01L21/311 , H01L21/8238 , H01L27/092 , H01L29/66 , H01L29/08 , H01L29/417 , H01L29/78 , H01L21/02 , H01L21/84 , H01L27/12
CPC分类号： H01L21/823864 , H01L21/0257 , H01L21/31111 , H01L21/31116 , H01L21/823814 , H01L21/823821 , H01L21/823828 , H01L21/845 , H01L27/092 , H01L27/0924 , H01L27/1203 , H01L27/1211 , H01L29/0847 , H01L29/41783 , H01L29/4983 , H01L29/517 , H01L29/6653 , H01L29/66628 , H01L29/66636 , H01L29/78
摘要： Semiconductor structures with different devices each having spacers of equal thickness and methods of manufacture are disclosed. The method includes forming a first gate stack and a second gate stack. The method further includes forming sidewall spacers of equal thickness for both the first gate stack and the second gate stack by depositing a liner material over spacer material on sidewalls of the first gate stack and the second gate stack and within a space formed between the spacer material and source and drain regions of the first gate stack.
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公开(公告)号：US20180033698A1
公开(公告)日：2018-02-01
申请号：US15727626
申请日：2017-10-08
发明人： Che-Cheng CHANG , Chih-Han LIN , Wei-Ting CHEN
IPC分类号： H01L21/8234 , H01L29/66 , H01L27/088 , H01L21/84 , H01L29/78 , H01L27/12
CPC分类号： H01L21/823431 , H01L21/823481 , H01L21/845 , H01L27/0886 , H01L27/1211 , H01L29/66477 , H01L29/66545 , H01L29/66795 , H01L29/7848
摘要： A semiconductor device includes a substrate, a first gate, a second gate, and an insulating structure. The substrate includes a first fin and a second fin. The first gate is disposed over the first fin. The second gate is disposed over the second fin. A gap is formed between the first gate and the second gate, and the gap gets wider toward the substrate. The insulating structure is disposed in the gap. The insulating structure has a top surface and a bottom surface opposite to each other. The bottom surface faces the substrate. An edge of the top surface facing the first gate is curved inward the top surface.
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公开(公告)号：US09882002B2
公开(公告)日：2018-01-30
申请号：US14987351
申请日：2016-01-04
发明人： Hsiang-Jen Tseng , Ting-Wei Chiang , Wei-Yu Chen , Kuo-Nan Yang , Ming-Hsiang Song , Ta-Pen Guo
IPC分类号： H01L29/78 , H01L21/336 , H01L27/088 , H01L27/092 , H01L21/8234 , H01L21/8238 , H01L21/84 , H01L21/20 , H01L29/66 , H01L29/08 , H01L21/283 , H01L21/306 , H01L29/417
CPC分类号： H01L29/0847 , H01L21/283 , H01L21/30604 , H01L21/823418 , H01L21/823431 , H01L21/823814 , H01L21/845 , H01L27/0886 , H01L27/0924 , H01L29/41758 , H01L29/66477 , H01L29/66545 , H01L29/6656 , H01L29/66795 , H01L29/6681 , H01L29/7835 , H01L29/785
摘要： Embodiments of the present disclosure are a semiconductor device, a FinFET device, and a method of forming a FinFET device. An embodiment is a semiconductor device comprising a first semiconductor fin extending above a substrate, a first source region on the first semiconductor fin, and a first drain region on the first semiconductor fin. The first source region has a first width and the first drain region has a second width with the second width being different than the first width.
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公开(公告)号：US09881797B2
公开(公告)日：2018-01-30
申请号：US14149088
申请日：2014-01-07
IPC分类号： H01L21/28 , H01L29/51 , H01L21/8238 , H01L27/092 , H01L23/485 , H01L21/84
CPC分类号： H01L21/28229 , H01L21/823842 , H01L21/823871 , H01L21/845 , H01L23/485 , H01L27/092 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： Gate electrodes having different work functions can be provided by providing conductive metallic nitride layers having different thicknesses in a replacement gate scheme. Upon removal of disposable gate structures and formation of a gate dielectric layer, at least one incremental thickness conductive metallic nitride layer is added within some gate cavities, while not being added in some other gate cavities. A minimum thickness conductive metallic nitride layer is subsequently added as a contiguous layer. Conductive metallic nitride layers thus formed have different thicknesses across different gate cavities. A gate fill conductive material layer is deposited, and planarization is performed to provide multiple gate electrode having different conductive metallic nitride layer thicknesses. The different thicknesses of the conductive metallic nitride layers can provide different work functions having a range of about 400 mV.
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公开(公告)号：US20180025911A1
公开(公告)日：2018-01-25
申请号：US15652786
申请日：2017-07-18
申请人： IMEC VZW
IPC分类号： H01L21/18 , H01L23/00 , H01L21/02 , H01L25/00 , H01L23/535 , H01L21/768 , H01L29/04 , H01L25/065
CPC分类号： H01L21/187 , H01L21/02387 , H01L21/76251 , H01L21/76895 , H01L21/845 , H01L23/535 , H01L23/66 , H01L24/32 , H01L25/0655 , H01L25/50 , H01L29/04 , H01L29/20 , H01L29/365 , H01L29/66462 , H01L29/7781 , H01L29/7787 , H01L29/7851 , H01L2224/32501
摘要： A method for forming a semiconductor structure by bonding a donor substrate to a carrier substrate is disclosed herein. The donor substrate may include a plurality of semiconductor layers epitaxially grown on top of one another in, and optionally above, a trench of the donor substrate. The carrier substrate may include a first semiconductor device thereon. The method may include removing at least part of the donor substrate in such a way as to expose a semiconductor layer grown on the bottom of the trench, removing at least part of the exposed semiconductor layer, thereby modifying the plurality of semiconductor layers, and forming a second semiconductor device from the modified plurality of semiconductor layers.
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