公开(公告)号：US11742314B2

公开(公告)日：2023-08-29

申请号：US17208695

申请日：2021-03-22

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

发明人： Cyprian Emeka Uzoh ,  Pawel Mrozek

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

CPC分类号： H01L24/80 ,  H01L24/08 ,  H01L2224/08145 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80031 ,  H01L2224/80895 ,  H01L2224/80896

摘要： Reliable hybrid bonded apparatuses are provided. An example process cleans nanoparticles from at least the smooth oxide top layer of a surface to be hybrid bonded after the surface has already been activated for the hybrid bonding. Conventionally, such an operation is discouraged. However, the example cleaning processes described herein increase the electrical reliability of microelectronic devices. Extraneous metal nanoparticles can enable undesirable current and signal leakage from finely spaced traces, especially at higher voltages with ultra-fine trace pitches. In the example process, the extraneous nanoparticles may be both physically removed and/or dissolved without detriment to the activated bonding surface.

公开(公告)号：US20190241430A1

公开(公告)日：2019-08-08

申请号：US16384066

申请日：2019-04-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hung-Hua Lin ,  Chang-Ming Wu ,  Chung-Yi Yu ,  Ping-Yin Liu ,  Jung-Huei Peng

IPC分类号： B81C1/00 ,  H01L23/00 ,  B81B7/00

CPC分类号： B81C1/00238 ,  B81B7/008 ,  B81B2207/07 ,  B81C1/00333 ,  B81C2201/0132 ,  B81C2203/0109 ,  B81C2203/0785 ,  B81C2203/0792 ,  H01L24/09 ,  H01L24/89 ,  H01L2224/091 ,  H01L2224/80013 ,  H01L2224/80895

摘要： A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

公开(公告)号：US20190051628A1

公开(公告)日：2019-02-14

申请号：US16160572

申请日：2018-10-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ping-Yin Liu ,  Shih-Wei Lin ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/74 ,  H01L24/94 ,  H01L2224/02215 ,  H01L2224/0361 ,  H01L2224/03616 ,  H01L2224/0381 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75101 ,  H01L2224/7565 ,  H01L2224/75753 ,  H01L2224/75824 ,  H01L2224/80 ,  H01L2224/80004 ,  H01L2224/80007 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80014 ,  H01L2224/80065 ,  H01L2224/80075 ,  H01L2224/80097 ,  H01L2224/80121 ,  H01L2224/80136 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/83889 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/351 ,  Y10T156/15 ,  Y10T156/1744 ,  H01L2924/00012 ,  H01L2924/05442 ,  H01L2924/00

摘要： Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.

公开(公告)号：US20180218997A1

公开(公告)日：2018-08-02

申请号：US15746041

申请日：2016-07-26

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

发明人： Frank FOURNEL ,  Xavier BAILLIN ,  Séverine CHERAMY ,  Patrick LEDUC ,  Loic SANCHEZ

IPC分类号： H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/0381 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/05686 ,  H01L2224/08148 ,  H01L2224/08238 ,  H01L2224/80004 ,  H01L2224/80013 ,  H01L2224/80143 ,  H01L2224/80205 ,  H01L2224/80894 ,  H01L2224/80896 ,  H01L2224/80948 ,  H01L2224/95146 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/05442

摘要： A method for direct bonding an electronic chip onto a substrate or another electronic chip, the method including: carrying out a hydrophilic treatment of a portion of, a surface of the electronic chip and of a portion of a surface of the substrate or of the other electronic chip; depositing an aqueous fluid on the portion of the surface of the substrate or of the second electronic chip; depositing the portion of the surface of the electronic chip on the aqueous fluid; drying the aqueous fluid until the portion of the surface of the electronic chip is rigidly connected to the portion of the surface of the substrate or of the other electronic chip: and during at least part of the drying of the aqueous fluid, emitting ultrasound into the aqueous fluid through the substrate or the other electronic chip.

公开(公告)号：US10038024B2

公开(公告)日：2018-07-31

申请号：US15228860

申请日：2016-08-04

申请人： Sony Corporation

发明人： Yoshihisa Kagawa ,  Kenichi Aoyagi ,  Yoshiya Hagimoto ,  Nobutoshi Fujii

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/146 ,  H01L21/768 ,  H01L23/00 ,  H04N5/369 ,  H01L23/528 ,  H01L23/532 ,  H01L27/06

CPC分类号： H01L27/14636 ,  H01L21/76807 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L24/83 ,  H01L27/0688 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/1469 ,  H01L2221/1031 ,  H01L2224/02245 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05546 ,  H01L2224/05547 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/0903 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80035 ,  H01L2224/80091 ,  H01L2224/80097 ,  H01L2224/80203 ,  H01L2224/80345 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80935 ,  H01L2224/83345 ,  H01L2924/00014 ,  H01L2924/053 ,  H01L2924/12043 ,  H01L2924/13091 ,  H04N5/369 ,  H01L2924/00012 ,  H01L2924/05442 ,  H01L2924/05042 ,  H01L2924/049 ,  H01L2924/00 ,  H01L2224/05552

摘要： Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

公开(公告)号：US10037968B2

公开(公告)日：2018-07-31

申请号：US15589513

申请日：2017-05-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Xin-Hua Huang ,  Xiaomeng Chen ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC分类号： H01L21/68 ,  H01L23/00 ,  H01L21/67

CPC分类号： H01L24/94 ,  H01L21/67092 ,  H01L21/681 ,  H01L24/08 ,  H01L24/74 ,  H01L24/80 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75702 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80019 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80986 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2924/00015 ,  H01L2224/80121 ,  H01L2924/00

摘要： Alignment systems, and wafer bonding alignment systems and methods are disclosed. In some embodiments, an alignment system for a wafer bonding system includes means for monitoring an alignment of a first wafer and a second wafer, and means for adjusting a position of the second wafer. The alignment system includes means for feeding back a relative position of the first wafer and the second wafer to the means for adjusting the position of the second wafer before and during a bonding process for the first wafer and the second wafer.

公开(公告)号：US20170358551A1

公开(公告)日：2017-12-14

申请号：US15689982

申请日：2017-08-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ping-Yin Liu ,  Shih-Wei Lin ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/74 ,  H01L24/94 ,  H01L2224/02215 ,  H01L2224/0361 ,  H01L2224/03616 ,  H01L2224/0381 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75101 ,  H01L2224/7565 ,  H01L2224/75753 ,  H01L2224/75824 ,  H01L2224/80004 ,  H01L2224/80007 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80014 ,  H01L2224/80065 ,  H01L2224/80075 ,  H01L2224/80097 ,  H01L2224/80121 ,  H01L2224/80136 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/83889 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/351 ,  Y10T156/15 ,  Y10T156/1744 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/05442 ,  H01L2924/00

摘要： Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.

公开(公告)号：US09842785B2

公开(公告)日：2017-12-12

申请号：US15333098

申请日：2016-10-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Xin-Hua Huang ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC分类号： H01L21/66 ,  H01L23/492 ,  H01L21/768 ,  H01L23/00

CPC分类号： H01L22/34 ,  H01L21/768 ,  H01L22/20 ,  H01L22/30 ,  H01L23/492 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/89 ,  H01L24/94 ,  H01L2224/0237 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80075 ,  H01L2224/80121 ,  H01L2224/802 ,  H01L2224/80203 ,  H01L2224/80894 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/94 ,  H01L2224/80 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Presented herein is a device comprising a common node disposed in a first wafer a test node disposed in a first wafer and having a plurality of test pads exposed at a first surface of the first wafer. The test node also has test node lines connected to the test pads and that are separated by a first spacing and extend to a second surface of the first wafer. A comb is disposed in a second wafer and has a plurality of comb lines having a second spacing different from the first spacing. Each of the comb lines has a first surface exposed at a first side of the second wafer. The comb lines provide an indication of an alignment of the first wafer and second wafer by a number or arrangement of connections made by the plurality of comb lines between the test node lines and the common node.

公开(公告)号：US09748198B2

公开(公告)日：2017-08-29

申请号：US14725266

申请日：2015-05-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ping-Yin Liu ,  Shih-Wei Lin ,  Xin-Hua Huang ,  Lan-Lin Chao ,  Chia-Shiung Tsai

IPC分类号： H01L21/30 ,  H01L21/46 ,  H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/74 ,  H01L24/94 ,  H01L2224/02215 ,  H01L2224/0361 ,  H01L2224/03616 ,  H01L2224/0381 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75101 ,  H01L2224/7565 ,  H01L2224/75753 ,  H01L2224/75824 ,  H01L2224/80004 ,  H01L2224/80007 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80014 ,  H01L2224/80065 ,  H01L2224/80075 ,  H01L2224/80097 ,  H01L2224/80121 ,  H01L2224/80136 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/83889 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/351 ,  Y10T156/15 ,  Y10T156/1744 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/05442 ,  H01L2924/00

摘要： Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.

公开(公告)号：US09646860B2

公开(公告)日：2017-05-09

申请号：US13963741

申请日：2013-08-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Xin-Hua Huang ,  Xiaomeng Chen ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC分类号： H01L21/68 ,  H01L21/67 ,  H01L23/00

CPC分类号： H01L24/94 ,  H01L21/67092 ,  H01L21/681 ,  H01L24/08 ,  H01L24/74 ,  H01L24/80 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75702 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80019 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80986 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2924/00015 ,  H01L2224/80121 ,  H01L2924/00

摘要： Alignment systems, and wafer bonding alignment systems and methods are disclosed. In some embodiments, an alignment system for a wafer bonding system includes means for monitoring an alignment of a first wafer and a second wafer, and means for adjusting a position of the second wafer. The alignment system includes means for feeding back a relative position of the first wafer and the second wafer to the means for adjusting the position of the second wafer before and during a bonding process for the first wafer and the second wafer.