公开(公告)号：US09859246B2

公开(公告)日：2018-01-02

申请号：US14917318

申请日：2014-12-18

申请人： EV GROUP E. THALLNER GMBH

发明人： Andreas Fehkuhrer

IPC分类号： H01L21/00 ,  H01L23/00 ,  B32B37/00 ,  H01L21/18 ,  H01L21/304 ,  H01L21/67 ,  H01L21/683 ,  H01L25/065 ,  H01L25/00 ,  H01L23/544 ,  B32B38/18

CPC分类号： H01L24/80 ,  B32B37/0046 ,  B32B38/1841 ,  B32B38/1858 ,  B32B2309/105 ,  B32B2457/14 ,  H01L21/187 ,  H01L21/304 ,  H01L21/67092 ,  H01L21/6831 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/544 ,  H01L24/08 ,  H01L24/74 ,  H01L24/75 ,  H01L24/94 ,  H01L24/95 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/0224 ,  H01L2224/0381 ,  H01L2224/0382 ,  H01L2224/03831 ,  H01L2224/0384 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/75251 ,  H01L2224/75272 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75704 ,  H01L2224/75705 ,  H01L2224/75724 ,  H01L2224/75725 ,  H01L2224/75734 ,  H01L2224/75735 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/80 ,  H01L2224/80003 ,  H01L2224/80006 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/8002 ,  H01L2224/80047 ,  H01L2224/80051 ,  H01L2224/80093 ,  H01L2224/80099 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80209 ,  H01L2224/80213 ,  H01L2224/80801 ,  H01L2224/80894 ,  H01L2224/80907 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2221/68304

摘要： A method for bonding a first substrate with a second substrate, characterized in that the first substrate and/or the second substrate is/are thinned before the bonding.

公开(公告)号：US20170221856A1

公开(公告)日：2017-08-03

申请号：US15519542

申请日：2015-10-19

申请人： BONDTECH CO., LTD.

发明人： Akira YAMAUCHI

IPC分类号： H01L23/00 ,  H01L21/683 ,  H01L21/67

CPC分类号： H01L24/83 ,  B23K20/023 ,  B23K20/233 ,  B23K20/24 ,  B23K37/0408 ,  B23K37/047 ,  B23K2101/40 ,  B23K2103/50 ,  H01L21/187 ,  H01L21/67092 ,  H01L21/67259 ,  H01L21/68 ,  H01L21/6831 ,  H01L21/6838 ,  H01L21/68735 ,  H01L23/544 ,  H01L24/75 ,  H01L24/80 ,  H01L24/94 ,  H01L2223/54426 ,  H01L2224/08145 ,  H01L2224/08146 ,  H01L2224/7501 ,  H01L2224/75102 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75272 ,  H01L2224/75303 ,  H01L2224/75305 ,  H01L2224/757 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75704 ,  H01L2224/75705 ,  H01L2224/75724 ,  H01L2224/75725 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/759 ,  H01L2224/75901 ,  H01L2224/7592 ,  H01L2224/75981 ,  H01L2224/80012 ,  H01L2224/80013 ,  H01L2224/8003 ,  H01L2224/80047 ,  H01L2224/8009 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80203 ,  H01L2224/80213 ,  H01L2224/80893 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80907 ,  H01L2224/80908 ,  H01L2224/80986 ,  H01L2224/83009 ,  H01L2224/8309 ,  H01L2224/83896 ,  H01L2224/83908 ,  H01L2224/94 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/00014 ,  H01L2224/8001 ,  H01L2224/80009 ,  H01L2224/80121

摘要： A production of voids between substrates is prevented when the substrates are bonded together, and the substrates are bonded together at a high positional precision while suppressing a strain. A method for bonding a first substrate and a second substrate includes a step of performing hydrophilization treatment to cause water or an OH containing substance to adhere to bonding surface of the first substrate and the bonding surface of the second substrate, a step of disposing the first substrate and the second substrate with the respective bonding surfaces facing each other, and bowing the first substrate in such a way that a central portion of the bonding surface protrudes toward the second substrate side relative to an outer circumferential portion of the bonding surface, a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate at the respective central portions, and a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate across the entirety of the bonding surfaces, decreasing a distance between the outer circumferential portion of the first substrate and an outer circumferential portion of the second substrate with the respective central portions abutting each other at a pressure that maintains a non-bonded condition.

公开(公告)号：US20170186733A1

公开(公告)日：2017-06-29

申请号：US15457744

申请日：2017-03-13

申请人： IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

发明人： Vikas Dubey ,  Ingrid De Wolf ,  Eric Beyne

IPC分类号： H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L23/00 ,  H01L23/528

CPC分类号： H01L25/0657 ,  H01L23/3157 ,  H01L23/3192 ,  H01L23/528 ,  H01L24/02 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/0213 ,  H01L2224/0214 ,  H01L2224/02145 ,  H01L2224/0217 ,  H01L2224/02175 ,  H01L2224/0218 ,  H01L2224/02185 ,  H01L2224/0224 ,  H01L2224/0225 ,  H01L2224/02255 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/0903 ,  H01L2224/10135 ,  H01L2224/10145 ,  H01L2224/10165 ,  H01L2224/10175 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/80004 ,  H01L2224/80007 ,  H01L2224/80121 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80143 ,  H01L2224/80203 ,  H01L2224/80894 ,  H01L2224/80907 ,  H01L2224/81002 ,  H01L2224/81007 ,  H01L2224/81121 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81141 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/81894 ,  H01L2224/81907 ,  H01L2224/83143 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.

公开(公告)号：US20160365136A1

公开(公告)日：2016-12-15

申请号：US15175933

申请日：2016-06-07

申请人： Rambus Inc.

发明人： Frederick A. Ware

IPC分类号： G11C11/4093 ,  H01L25/065

CPC分类号： G11C11/4093 ,  G11C5/04 ,  G11C11/4096 ,  G11C17/16 ,  G11C17/18 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05552 ,  H01L2224/05568 ,  H01L2224/08148 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80897 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00

摘要： A stacked semiconductor device is disclosed that includes a plurality of semiconductor dies. Each die has oppositely disposed first and second surfaces, with pads formed on each of the surfaces. A plurality of through-vias connect respective pads on the first surface to respective pads on the second surface. The through-vias include a first group of through-vias coupled to respective I/O circuitry on the semiconductor die and a second group of through-vias not coupled to I/O circuitry on the semiconductor die. The plurality of semiconductor dies are stacked such that the first group of through-vias in a first one of the plurality of semiconductor dies are aligned with respective ones of at least a portion of the second group of through-vias in a second one of the plurality of semiconductor dies.

公开(公告)号：US20150048523A1

公开(公告)日：2015-02-19

申请号：US14397038

申请日：2013-04-24

申请人： Tadatomo SUGA ,  BONDTECH CO., LTD.

发明人： Tadatomo Suga ,  Akira Yamauchi

IPC分类号： H01L25/065 ,  B23K31/02 ,  H01L21/66 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  B23K37/04 ,  B23K37/00

CPC分类号： H01L25/0652 ,  B23K31/02 ,  B23K37/00 ,  B23K37/0408 ,  B23K2101/40 ,  H01L21/6836 ,  H01L22/10 ,  H01L23/10 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/74 ,  H01L24/742 ,  H01L24/743 ,  H01L24/75 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/94 ,  H01L24/95 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0384 ,  H01L2224/03845 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06134 ,  H01L2224/0615 ,  H01L2224/06177 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/09181 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/13009 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14134 ,  H01L2224/1415 ,  H01L2224/14177 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/27009 ,  H01L2224/2755 ,  H01L2224/27823 ,  H01L2224/2784 ,  H01L2224/27845 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73103 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75101 ,  H01L2224/75102 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75283 ,  H01L2224/753 ,  H01L2224/75301 ,  H01L2224/7531 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/7565 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75753 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/75842 ,  H01L2224/7598 ,  H01L2224/80003 ,  H01L2224/8001 ,  H01L2224/80013 ,  H01L2224/80065 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80143 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/8022 ,  H01L2224/8023 ,  H01L2224/80447 ,  H01L2224/8083 ,  H01L2224/80907 ,  H01L2224/81002 ,  H01L2224/8101 ,  H01L2224/81013 ,  H01L2224/81065 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/8122 ,  H01L2224/8123 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/81805 ,  H01L2224/8183 ,  H01L2224/81907 ,  H01L2224/83002 ,  H01L2224/8301 ,  H01L2224/83013 ,  H01L2224/83048 ,  H01L2224/83051 ,  H01L2224/83065 ,  H01L2224/83091 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83136 ,  H01L2224/83143 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/8322 ,  H01L2224/8323 ,  H01L2224/83234 ,  H01L2224/83355 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/8383 ,  H01L2224/83894 ,  H01L2224/83907 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01322 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2224/80 ,  H01L2224/83 ,  H01L2924/00

摘要： [Problem] Provided is a technique for bonding chips efficiently onto a wafer to establish an electrical connection and raise mechanical strength between the chips and the wafer or between the chips that are chips laminated onto each other in the state that resin and other undesired residues do not remain on a bond interface therebetween.[Solution] A method for bonding plural chips each having a chip-side-bond-surface having metal regions to a substrate having plural bond portions has the step (S1) of subjecting the metal regions of the chip-side-bond-surface to surface activating treatment and hydrophilizing treatment; the step (S2) of subjecting the bond portions of the substrate to surface activating treatment and hydrophilizing treatment; the step (S3) of fitting the chips subjected to the surface activating treatment and the hydrophilizing treatment onto the corresponding bond portions of the substrate subjected to the surface activating treatment and the hydrophilizing treatment to bring the metal regions of the chips into contact with the bond portions of the substrate; and the step (S4) of heating the resultant structure, which includes the substrate, and the chips fitted onto the substrate.

摘要翻译： [问题]提供了一种将芯片有效地接合到晶片上以建立电连接并提高芯片和晶片之间或芯片之间的机械强度的技术，该芯片是在树脂和其它不期望的残留物的状态下彼此层压的芯片 不保留在它们之间的结合界面上。 [解决方案]将具有金属区域的具有芯片侧接合面的多个芯片接合到具有多个结合部的基板的方法具有将芯片侧接合面的金属区域 表面活化处理和亲水处理; 对所述基板的所述接合部进行表面活化处理和亲水化处理的工序（S2） 将经过表面活化处理和亲水化处理的芯片装配到经过表面活化处理的基板的相应接合部分和亲水化处理上以使芯片的金属区域与键接触的步骤（S3） 基板的一部分; 以及加热包括基板的所得结构和安装在基板上的芯片的步骤（S4）。

公开(公告)号：US20150044786A1

公开(公告)日：2015-02-12

申请号：US13963741

申请日：2013-08-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Xin-Hua Huang ,  Xiaomeng Chen ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC分类号： H01L21/66 ,  H01L23/00 ,  H01L21/67

CPC分类号： H01L24/94 ,  H01L21/67092 ,  H01L21/681 ,  H01L24/08 ,  H01L24/74 ,  H01L24/80 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75702 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80019 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80986 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2924/00015 ,  H01L2224/80121 ,  H01L2924/00

摘要： Alignment systems, and wafer bonding alignment systems and methods are disclosed. In some embodiments, an alignment system for a wafer bonding system includes means for monitoring an alignment of a first wafer and a second wafer, and means for adjusting a position of the second wafer. The alignment system includes means for feeding back a relative position of the first wafer and the second wafer to the means for adjusting the position of the second wafer before and during a bonding process for the first wafer and the second wafer.

摘要翻译： 对准系统和晶片接合对准系统和方法被公开。 在一些实施例中，用于晶片接合系统的对准系统包括用于监测第一晶片和第二晶片的对准的装置，以及用于调整第二晶片的位置的装置。 对准系统包括用于将第一晶片和第二晶片的相对位置反馈到用于调整第一晶片和第二晶片的接合工艺之前和期间的第二晶片的位置的装置的装置。

公开(公告)号：US11916031B2

公开(公告)日：2024-02-27

申请号：US17745225

申请日：2022-05-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Chia Hu ,  Ching-Pin Yuan ,  Sung-Feng Yeh ,  Sen-Bor Jan ,  Ming-Fa Chen

IPC分类号： H01L23/00 ,  H01L23/544 ,  H01L25/065 ,  H01L23/522

CPC分类号： H01L24/06 ,  H01L23/522 ,  H01L23/544 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/80 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/06051 ,  H01L2224/06132 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/091 ,  H01L2224/0913 ,  H01L2224/09051 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80203 ,  H01L2224/80357 ,  H01L2224/80815 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80905 ,  H01L2224/80986 ,  H01L2924/3511 ,  H01L2224/091 ,  H01L2924/00012 ,  H01L2224/05555 ,  H01L2924/00012 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.

公开(公告)号：US11682652B2

公开(公告)日：2023-06-20

申请号：US17197254

申请日：2021-03-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chan Li ,  Cheng-Hsien Chou ,  Sheng-Chau Chen ,  Cheng-Yuan Tsai

IPC分类号： H01L23/00 ,  H01L23/544 ,  H01L25/065 ,  H01L21/02 ,  H01L21/67

CPC分类号： H01L24/94 ,  H01L21/02164 ,  H01L21/67121 ,  H01L23/544 ,  H01L24/80 ,  H01L25/0657 ,  H01L2224/80007 ,  H01L2224/80132 ,  H01L2224/80895 ,  H01L2224/80896

摘要： Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method comprises forming a plurality of semiconductor devices over a central region of a semiconductor wafer. The semiconductor wafer comprises a peripheral region laterally surrounding the central region and a circumferential edge disposed within the peripheral region. The semiconductor wafer comprises a notch disposed along the circumferential edge. Forming a stack of inter-level dielectric (ILD) layers over the semiconductor devices and laterally within the central region. Forming a bonding support structure over the peripheral region such that the bonding support structure comprises a bonding structure notch disposed along a circumferential edge of the bonding support structure. Forming the bonding support structure includes disposing the semiconductor wafer over a lower plasma exclusion zone (PEZ) ring that comprises a PEZ ring notch disposed along a circumferential edge of the lower PEZ ring.

公开(公告)号：US20180114767A1

公开(公告)日：2018-04-26

申请号：US15789065

申请日：2017-10-20

申请人： Kulicke and Soffa Industries, Inc.

发明人： Matthew B. Wasserman

IPC分类号： H01L23/00

CPC分类号： H01L24/75 ,  H01L23/544 ,  H01L24/80 ,  H01L24/81 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/75305 ,  H01L2224/75702 ,  H01L2224/75753 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/8113 ,  H01L2224/81132

摘要： A bond head assembly for a bonding machine is provided. The bond head assembly includes a body portion and a bonding tool for bonding a semiconductor element to a substrate. The bonding tool is secured to the body portion. The bond head assembly also includes at least one reflective optical element carried by the bond head assembly. The at least one reflective optical element is configured to be positioned along an optical path of the bonding machine such that a vision system of the bonding machine is configured to view a portion of the semiconductor element while being carried by the bonding tool prior to bonding of the semiconductor element to the substrate.

公开(公告)号：US20180019226A1

公开(公告)日：2018-01-18

申请号：US15644379

申请日：2017-07-07

申请人： TOKYO ELECTRON LIMITED

发明人： Masataka MATSUNAGA ,  Takahiro MASUNAGA ,  Yasutaka SOMA ,  Takashi KOGA ,  Shogo HARA ,  Masaaki UMITSUKI ,  Kazutoshi ISHIMARU ,  Fumio SAKATA

IPC分类号： H01L23/00 ,  B32B37/00 ,  B32B41/00

CPC分类号： H01L24/83 ,  B32B37/025 ,  B32B41/00 ,  B32B2457/14 ,  H01L24/74 ,  H01L24/75 ,  H01L24/80 ,  H01L24/94 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/7565 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75724 ,  H01L2224/75725 ,  H01L2224/75743 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/75901 ,  H01L2224/80009 ,  H01L2224/80013 ,  H01L2224/8002 ,  H01L2224/80123 ,  H01L2224/80129 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80894 ,  H01L2224/80908 ,  H01L2224/83031 ,  H01L2224/83122 ,  H01L2224/83896 ,  H01L2224/94 ,  H01L2224/80 ,  H01L2924/00012

摘要： A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate to a bonding apparatus, a first holding plate configured to hold the first substrate from an upper surface side, and a second holding plate disposed below the first holding plate and configured to hold the second substrate from a lower surface side so that the second substrate faces the first substrate. The substrate transfer device includes a first holding part capable of holding the first substrate from the upper surface side, and a second holding part disposed below the first holding part and capable of holding the second substrate from the lower surface side. The first holding part and the second holding part are configured to receive and hold the first substrate and the second substrate at the same time from the first holding plate and the second holding plate.